CN1826671A - 压缩型阻抗变换电路 - Google Patents

压缩型阻抗变换电路 Download PDF

Info

Publication number
CN1826671A
CN1826671A CNA2004800210131A CN200480021013A CN1826671A CN 1826671 A CN1826671 A CN 1826671A CN A2004800210131 A CNA2004800210131 A CN A2004800210131A CN 200480021013 A CN200480021013 A CN 200480021013A CN 1826671 A CN1826671 A CN 1826671A
Authority
CN
China
Prior art keywords
circuit
impedance inverter
inverter circuit
contact disc
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004800210131A
Other languages
English (en)
Other versions
CN1826671B (zh
Inventor
伊格尔·I·布莱达诺夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samba Holdco Netherlands BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of CN1826671A publication Critical patent/CN1826671A/zh
Application granted granted Critical
Publication of CN1826671B publication Critical patent/CN1826671B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H03H7/383—Impedance-matching networks comprising distributed impedance elements together with lumped impedance elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0033—Printed inductances with the coil helically wound around a magnetic core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/02—Fixed inductances of the signal type  without magnetic core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/02—Coupling devices of the waveguide type with invariable factor of coupling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6611—Wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4801—Structure
    • H01L2224/48011—Length
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/4813—Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20753—Diameter ranges larger or equal to 30 microns less than 40 microns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H01L2924/30111—Impedance matching

Abstract

本发明涉及一种阻抗变换电路(10；11a；11b；12)，其具有在衬底(20)上形成的分隔开的第一接触盘(51)和第二接触盘(52)。该阻抗变换电路(10；11a；11b；12)包括至少一个第一电路元件(40)，用于提供在衬底(20)上形成的接触区域(41)，并且在第一接触盘(51)和第二接触盘(52)之间与这两个接触盘相邻布置。第一线元件(31)在衬底(20)上延伸，用于连接第一接触盘(51)和第一电路元件(40)的接触区域的第一端部分(41a)，至少一个第二线元件(32)在衬底(20)上延伸，用于连接第二接触盘(52)和第一电路元件(40)的接触区域的第二端部分(41b)。第一电路元件(40)的接触区域的形状用于提供在接触区域和固定参考电位之间具有预设电容值的电容连接。整个电路的组装密度可以通过使第一线元件(31)和至少第二线元件(32)具有相同形状并且将它们相互基本平行排列来有利地提高，还可以通过使第一接触盘(51)和第二接触盘(52)位于至少第一电路元件(40)的接触区域的相对两侧来有利地提高。本发明的多个阻抗变换电路可以有利地组合成一个多耦合线阻抗变换电路(12)。

Description

压缩型阻抗变换电路
本发明涉及如权利要求1所述的压缩型阻抗变换电路、如权利要求13所述的多耦合线阻抗变换电路和如权利要求15所述的射频装置。
移动通信继续朝着更小和压缩单元的方向发展，例如在用户端的手持单元和在网络基本设施端的基站收发信机(BTS)设备越来越复杂。这导致对用于诸如移动电话、寻呼机、GPS接收机和无线通信装置这样的移动通信装置中的电子元件和结构的小型化的需求增加。所有这些装置包括的一些电路由于使用0.1-10GHz范围的高频，需要为电路结构选择特殊的电路元件和电路设计，即与高频相关的部分必须经过处理。
射频(RF)电路小型化问题对于使用RF频带的较低部分(0.8-2.2GHz)的移动通信设备尤其重要，其中，诸如阻抗变换、延迟线、RF去耦网络等分布电路占用了相当大的设计部分。例如，在具有相对较高E＝6.15的印刷电路板上，一条四分之一波长50欧姆的1GHz微带线所占的面积约为(5×37)mm2。而且，通常用于功率放大器设计的具有阻抗Z0＝10欧姆的相同微带线，将占用甚至大于如约(12×32.4)mm2的面积。
高频电路设计的一个主要关注点是需要阻抗变换电路。在RF电路中，这样的阻抗变换电路占了如RF放大器的相当大的面积。这对于RF功率电路装置的输入和输出阻抗很低如0.5-3欧姆的功率放大器尤其重要。这样，在离散功率晶体管情况下，在RF设备的连接电路级的阻抗预匹配和后匹配中需要相当大的等效电感用于阻抗变换。
图4示出了众所周知的常用的单个单元预匹配电路100，在线环131和132之间具有部分反向电感耦合。电路100用于诸如具有低输入和输出阻抗的高功率装置的阻抗匹配中。在那里，这些电路通常用于多路并行结构中。阻抗变换电路100用于在第一个接触盘151和第二个接触盘152之间进行阻抗变换，这两个接触盘在衬底121、122上形成并间隔一定距离。也就是，第一接触盘151为变换电路100提供输入连接端，第二个接触盘152提供输出连接端。具有板141的如MOS电容的电容140提供线环131、132之间的电连接。MOS电容140形成在衬底123上，并且设置在第一和第二接触盘151、152之间。此外，线环131在衬底121、123之间形成，并且通过线环131连接第一个接触盘151和MOS电容140的板141。此外，线环132在衬底123、122之间形成，并且通过线环132连接第二接触盘152和MOS电容140的板141。
从图4可以看出，线环131和线环132具有弧形形状并且尽可能地相互间隔排列以避免两个线环131、132之间的互感。然而，在线环131、132之间仍然有部分互感。由于在变换电路的线环131、132的基本相邻部分以相反方向流动的电流，这两个线环131、132的互感降低了两个线环131、132的总电感。这样，互感是这种阻抗变换电路100的电路设计中的一个限制。此外，由于两个线环131、132需要间隔排列，所以阻抗变换电路100需要大的面积和大的接合线长度，这是生产成本中尤其是如果使用黄金作为线材料情况下的一个重要因素。
在线环131、132之间的寄生电感耦合问题降低了有效总电感的最终值，该问题例如在Josef A Edminister于1972年由McGraw-Hill国际图书公司出版的“Theory and problems of electronic circuits in SIunits”(《SI单元中电子电路的理论和问题》)一书中作了充分描述。因此，假设在工作频带内第一线环21具有电感L1且第二线环22具有电感L2，则寄生电感耦合被描述为两个接合的线环21、22之间的互感M的电感。事实上，最终电感值是L1、L2的和减去两倍互感M。即与整个电路的最大可能电感值相比，有明显的损耗。
如上所述，为了减少线间非期望的耦合，使这些线相互远离。然而，这在设计中需要更大空间和更大线长，增加了需要的线材料。而且，这意味着电路设计尤其在需要较高电感值的低频时受到限制。如图4所示的传统阻抗变换电路的经验已经说明，所需变换率越高，工作频率越接近低通滤波器的截止频率，并且该低通变换电路引入更高的相位和信号群时间延迟失真。结果，该电路可以提供较低宽带的阻抗变换特性。
在EP 1202296 A1中，介绍了使用接合线的板外(out-of-plane)微线圈。该板外微线圈包括在衬底上形成的导电轨道。通过使用标准的线接合技术连接导电轨道。每个微线圈的导电轨道包括第一和第二分离接触盘以及位于第一和第二接触盘之间的延长互连线。进行线接合，使得第一线在衬底表面上从第一接触盘延伸到互连线的第一端，并且第二线在衬底上从第二接触盘延伸到互连线的第二端。EP1202296 A1公布了具有很大值的微线圈，然而，为了在RF应用的电路中提供具有期望属性的阻抗变换，其没有作用。
在RF设计中需要更加压缩的阻抗变换电路，从而不会导致阻抗变换电路占用如RF放大器的较大面积。因此，本发明的一个目标是具有一种压缩型阻抗变换电路，即它应当以高组装密度实现。另一个目标是具有一种可以在宽带射频应用中使用的阻抗变换电路。
因此，本发明的阻抗变换电路为在衬底上形成的间隔开的第一接触盘和第二接触盘之间提供了阻抗变换。第一接触盘至少用作阻抗变换电路的输入连接端，第二接触盘至少用作阻抗变换电路的输出连接端。该阻抗变换电路还包括至少一个第一电路元件，该第一电路元件提供了在衬底上形成的一个接触区域，该第一电路元件布置在第一和第二接触盘之间并与这两个接触盘相邻。此外，连接第一接触盘和第一电路元件的接触区域的第一端部分的第一线元件在衬底上延伸。此外，连接第二接触盘和第一电路元件的接触区域的第二端部分的至少一个第二线元件在衬底上延伸。例如，可以在电路生产中接合处理步骤期间使用接合线来形成这些线元件。第一电路元件的接触区域的形状用于提供在接触区域和固定参考电位之间具有预设电容值的电容连接。该固定参考电位可以是任意固定电位，然而优选是整个电路的地电位。应该明白也可以连接到整个电路的电源电压的电位。
在本发明的一个优选实施例中，第一线元件和至少第二线元件形成相同的形状并且基本相互平行排列。此外，第一接触盘和第二接触盘可以有利地位于至少第一电路元件的接触区域的相对侧。这也有助于增加阻抗变换电路的组装密度。
而且，在第一和第二线元件根据本发明的结构相互排列的情况下，在阻抗变换电路中流动的电流在相同方向上平行流过这两个线元件。这样，两个线元件之间的互感有助于增加这两个线元件的总电感，即互感不再是这种阻抗变换电路的电路设计中的问题。
至于在接触区域和固定参考电位之间具有预设电容值的电容连接，发明人由经验可知，第一电路元件可以通过沉积在衬底上的金属层或者通过可以在衬底上轻易实现的氧化物半导体(MOS)电容有效地实现。
与图4中所示的传统设计相比，本发明的阻抗变换电路需要较短的接合线长度。此外，它通常在衬底占用少于两倍的空间，并且以相同的接合线形状提供较大的相移。此外，利用以下所述的根据进一步改进的微小修改，它提供了具有平滑特性阻抗和线性相位响应的几倍宽的带宽，并且在频带内具有平滑群延迟响应。而且，它在不匹配状况下提供更加稳定的相位响应。最后但重要的是，它是一种在非常紧凑的设计中获得具有极低损耗和例如从1Ω到200Ω的宽特性阻抗Z0范围的理想传输线的方法。
在本发明的阻抗变换电路的进一步改进中，有一个也可以置于衬底上的第二电路元件。该第二电路元件具有第一端子和第二端子，并且在第一和第二端子之间提供了预设电容值。第二电路元件被布置成在阻抗变换电路的第一接触盘和第二接触盘之间提供电容连接。也就是说，第一端子连接到第一接触盘上，第二端子连接到第二接触盘上。不用说，在进一步改进的阻抗变换电路的电路设计中，也可能使用第二电路元件的第一端子和第二端子中的一个或者两个分别作为阻抗变换电路的输入连接端或者输出连接端。
为了有利地提高阻抗变换电路的组装密度，第二电路元件的第一端子和第二端子中至少之一经由在衬底上延伸的线元件连接到第一和第二接触盘中对应的一个。这样，第二电路元件可以置于阻抗变换电路附近，并且不需要在整个阻抗变换电路周围布连接线。而且，如同阻抗变换电路的第一和第二线元件，上述线元件也可以由接合线实现。通过该附加的第二电路元件，整个阻抗变换电路提供了具有平滑阻抗特性的几倍大的频带，这通过结合第一个电路元件预设第二个电路元件的电容值非常容易控制。
为了提供阻抗变换电路的第一接触盘和第二接触盘之间的电容连接，第二电路元件可以是薄膜电容器，或者是由衬底上的耦合带状线或提供期望电容值的任何其它适当方式形成的电容器。注意，使用两条耦合带状线实现阻抗变换电路的宽带解决方法也提供了各个应用需要的更大灵活性。
在本发明的进一步改进中，通过将本发明的至少两个阻抗变换电路平行地布置进行组合，形成多耦合线阻抗变换电路。换言之，本发明阻抗变换电路的耦合线元件和第一电路元件的数目是可扩展的。因此，期望具有较高变换后RF电流和功率的变换电路具有较低的扩展后的特性阻抗是可以实现的，其本质上取决于阻抗变换电路的总电感和连接到地的总电容连接，从而可以通过本发明的压缩型电路布置方便地设计。
本发明的阻抗变换电路可以有利地用于从移动手持设备到高功率RF晶体管模块的多种射频装置中，在这些射频装置中该阻抗变换电路可以作为用于阻抗匹配和频率滤波的被动电路块实现。这样的RF装置可以是诸如移动电话、无线接入网的基站或者有线电视(CATV)接收机中的信号变换器。
根据以下结合附图对优选实施例的描述，本发明的上述和其它目的、特征和优点将变得更加清楚。注意，相同或者等效部分在附图中始终保持相同参考标号。所有附图旨在说明本发明的一些方面和实施例。而且，应该注意，在不同实施例的情况下仅详细描述其差异。为了清楚，以简化方式描述电路。应该明白，并不是所有可提供的选择和方法都表示出来，因此本发明不局限于附图的内容。
以下，将通过参考附图举例的方式详细描述本发明，其中：
图1a示出了本发明的在衬底上形成的阻抗变换电路的第一实施例，该阻抗变换电路具有两条接合线，这两条接合线与MOS电容板的各端连接在一起，并且平行排列以使每条接合线内的电流在相同方向上流动，以及该MOS电容具有预设电容值，用于提供连接到阻抗变换电路地电位的电容连接；
图1b是图1a所示阻抗变换电路的等效电路(图2a和图2b也是如此)；
图2a是本发明的阻抗变换电路的进一步改进的一个实施例，其中在衬底上形成第二电容，该第二电容提供在阻抗变换电路的输入盘和输出盘之间的预设电容连接；
图2b是阻抗变换电路的进一步改进的另一个具有更少寄生元件的实施例；
图3描述了图1a的阻抗变换电路的进一步改进的另一个例子，其中两个阻抗变换电路在衬底上相邻排列并且相互并联电连接；
图4示出了一个传统预匹配电路，该电路设计中，在两个接合线环和MOS电容之间具有部分耦合，该MOS电容在两条接合线的中间点接地。
图1a说明了在衬底20上形成的阻抗变换电路10的第一实施例，该阻抗变换电路10具有与电容40的板41的各端连接在一起的两条接合线31、32。这两条接合线31、32相邻且平行排列，使得每条接合线31、32内的电流在相同方向上流动。衬底20上的电容40可能是MOS电容或者任何其它应用类型的电容，该电容40被设计为具有预设电容值，用于提供与整个电路的地电位的电容连接。
图1a的阻抗变换电路10提供了在衬底20上形成的分开的第一接触盘51和第二接触盘52之间的阻抗变换。第一接触盘51可以用作阻抗变换电路10的输入连接端，第二接触盘52可以用作输出连接端。电容40对应于本发明的至少第一电路元件，其板41提供了本发明的接触区域。电容40在衬底上形成，并且在第一和第二接触盘51、52之间与这两个接触盘相邻排列。
此外，接合线31对应于本发明的第一线元件，并且在衬底20上延伸。接合线31连接第一接触盘51和电容40的板41的第一端部分41a。此外，接合线32对应于本发明的至少第二线元件。接合线32在衬底20上延伸，并且连接第二接触盘52和电容40的板41的第二端部分41b。
从图1a可以看出，接合线31和接合线32具有相同形状。此外，接合线31、32基本平行且相互接近。此外，第一接触盘51和第二接触盘52位于电容40的板41的相对两侧。由于接合线31、32的排列，变换电路中的电流(在图1a中，该电流路径用点箭头符号指示)在相同方向上基本平行地流过两条接合线31、32。因此，这两条接合线31、32之间的互感增加了这两条接合线31、32的总电感。这样，阻抗变换电路10的电路设计中，互感不再是问题。
图1b描述了图1a的阻抗变换电路的一个可能的等效电路(10*)。等效电路10*具有输入连接端51*和输出连接端52*。此外，存在对应于图1a中第一接合线31的第一电感31*、对应于图1a中第二接合线32的第二电感32*和对应于图1a中电容40的电容40*。电容40*的一端连接到等效电路10*的地，并且电容40*的另一端连接到第一电感31*的一端和第二电感32*的一端。第一电感31*的未连接到电容40*的一端连接到输入连接端51*，并且第二电感32*的未连接到电容40*的一端连接到输出连接端52*。
在等效电路10*中，两个电感31*、32*之间的松电感耦合由两个元件的平行排列表示。在等效电路10*中，在相同方向上平行流动的电流由电感31*、32*旁边的小圆点指示。还有电容60*，其代表图1a所示接合线31、32的总电容耦合。
图2a和图2b说明了本发明进一步改进的阻抗变换电路的实施例11a、11b，其中在衬底20上形成第二电容60，该第二电容60在阻抗变换电路11a、11b的输入盘51和输出盘52之间提供更好的预设电容连接。由于图2a和2b的阻抗变换电路11a、11b的基本布置与图1a非常相似，故以下仅描述其一般差异。
图2a和2b的阻抗变换电路在衬底20上所占的区域与图1a中建议的阻抗变换电路10几乎相同。也就是，电容40的板41与图1a的形状有些不同。不过，电容40的板41在第一和第二接合线31、32之间提供了到阻抗变换电路地电位的预设电容连接。除了图1a之外，还有第二电容60，在所示的另外实施例11a、11b中是薄膜电容。注意，也可能使用电容耦合带状线来实现第二电容60，或者使用提供期望电容连接的任何其它高频相关电路设计。
在图2a中，第二电容60电容连接阻抗变换电路11a的第一接触盘51和第二接触盘52。薄膜电容60包括第一板61，该第一板61对应于本发明第一端子并且与第一接触盘51相连接。此外，薄膜电容60包括第二板62，该第二板62对应于本发明第二端子并且与第三接触盘56相连接。电介质63位于第一板61和第二板62之间。第三接触盘56经由接合线36连接到第二接触盘52，也可以在生产接合线31、32的相同步骤中制造该接合线36。这样，通过第二电容60提供第一和第二接触盘51、52之间的预设电容性连接。
在图2b中，第二电容60电容连接阻抗变换电路11a的第一接触盘51和第二接触盘52。薄膜电容60包括第一板61，该第一板61对应于本发明第一端子并且与第一接触盘51相连接。此外，薄膜电容60包括第二板62，该第二板62对应于本发明的第二端子。电介质(未示出)位于第一板61和第二板62之间。第二板62经由接合线36连接到第二接触盘52的第一部分52a，也可以在生产接合线31、32的相同步骤中制造该接合线36。这样，通过第二电容60提供第一和第二接触盘51、52之间的预设电容连接。
在图2b的实施例中，第一接触盘51的形状使得阻抗变换电路11b的输入连接端的位置不同于与第一接合线31相连接的位置。这样，第一接触盘51包括第一部分51a，该第一部分51a提供电容60的第一板61，还提供阻抗变换电路11b的输入连接端。此外，第一接触盘51包括与第一接合线31相连接的单独第二部分51c。第一部分51a和第二部分51c经由带状线51b相连接。这样，与图1a和图2a相比，图2b中第一接触盘51包括第一部分51a、第二部分51c和带状线51b。同样，第二接触盘52的形状使得阻抗变换电路11b的输出连接端的位置不同于与第二接合线32相连接的位置。因此，第二接触盘52包括与接合线36的一端相连接的第一部分52a。第一部分52a还提供了阻抗变换电路11b的输出连接端。该第二接触盘还包括与第二接合线32相连接的第二部分52c。第二接触盘52的第一部分52a和第二部分52c经由带状线52b相连接。这样，与图1a和图2a相比，图2b中第二接触盘52包括第一部分52a、第二部分52c和带状线52b。发明人由经验得知图2b的电路设计与图2a一样具有较少寄生元件，因此可以根据应用需要更加精确地修改和设计该电路。
图2a、2b的阻抗变换电路11a、11b的可能等效电路与图1b非常相似。因此，在此不对该等效电路进行详细描述。然而，应该明白，电容60在图2a、2b所示的阻抗变换电路11a、11b的第一接触盘51和第二接触盘52之间提供了定义明确的电容耦合。这样，类似图1b所示的等效电路，在图2a、2b阻抗变换电路情况下的电容60*主要代表图2a、2b中的电容60。
图3描述了图1a所示阻抗变换电路的的进一步改进，其中本发明的两个阻抗变换电路16、18在衬底20上相邻排列。这两个阻抗变换电路16、18组成一个多耦合线阻抗变换电路12。阻抗变换电路16、18在单个衬底20上相邻排列，其中，阻抗变换电路16、18的输入和输出联合在一起具有相同电位，从而相互并联电连接。因此，两个阻抗变换电路16、18共享单个公共输入端和单个公共输出端。显然，图2a或者图2b的阻抗变换电路也可以排列在一起，构造根据本发明的多耦合线阻抗变换电路。
在图3中，第一阻抗变换电路16的第一接触盘51通过在先前电路级中的公共电路点(未示出)连接到第二阻抗变换电路18的第一接触盘53上。此外，第一阻抗变换电路16的第二接触盘52通过在之后电路级中的公共电路点(未示出)连接到第二阻抗变换电路18的第二接触盘54上。这样，第一阻抗变换电路16和第二阻抗变换电路18相互并联电连接。换言之，假如最终特性阻抗约按因子2减小，则本发明的阻抗变换电路按因子2减小。
根据多耦合线效应，有四个耦合线元件31、32、33、34。接合线31、32、33、34相互之间可以被布置成，在各个相邻接合线如31和32、32和33、33和34之间提供预设电容和电感耦合。这样，整个阻抗变换电路在接合线31、32、33、34之间具有强电感和电容耦合，有助于更宽频带操作。因此，通过该压缩的电路布置可以方便地设计阻抗变换电路的期望特性，该阻抗变换电路本质上取决于阻抗变换电路的总电感，以及分别连接到地和整个阻抗变换电路的输入和输出连接端之间的总电容。
发明人通过实验说明了，在线元件之间需要的和可获得的最小耦合范围是0.4-0.7。例如，具有10Ω特性阻抗Z0和90度相移的多耦合线阻抗变换电路可以用十对耦合线元件即本发明的五个并联连接的阻抗变换电路来实现。在该设计中，在如图2所示的50Ω变换单元中耦合线元件之间的距离是0.12mm，线直径是0.038mm，并且线材料是黄金。一个线元件的长度是2.8mm。MOS电容的电容值是23pF。期望2.14GHz的具有90度相移的10Ω线的设计仅需要2×4mm2的空间。
比较而言，利用图4的传统阻抗变换电路获得相同特性阻抗的话，由于负互感，需要每个线元件的长度必须约为3.8mm，每单个阻抗变换电路的第一电路元件的电容C＝1.5pF。然而，这导致电路设计中的困难，并且占用的空间至少是本发明电路的两倍。此外，传统电路具有较窄带宽的特性阻抗。此外，尤其是在不匹配或者输入和输出连接端之一负载变化的情况下，传统电路在频带内具有相位和群时间延迟传播。
应该注意，本发明不限于本发明的上述多个实施例；具体而言，本发明不限于在说明书中为了举例所使用的电路。此外，本发明的原理可以用于在高频环境中需要提供阻抗变换和/或频率滤波特性的电路的任何应用。
有利地，本发明的RF阻抗变换电路的布置可以作为多种功能如输入阻抗匹配、输出阻抗匹配、级间阻抗匹配和窄带带通滤波器的无源组件使用。它优选地用于宽带RF应用。它也可以用在包括功率放大器和/或收发器的模块中，该模块用于移动电话、无线接入网络的基站、CATV应用，例如实现从电缆或者光信号到电信号的变换和放大。
简言之，本发明介绍了一种阻抗变换电路，该阻抗变换电路具有在衬底上形成的分隔开的第一接触盘和第二接触盘。该阻抗变换电路包括至少一个第一电路元件，该第一电路元件提供在衬底上形成的接触区域，该接触区域在第一和第二接触盘之间与这两个接触盘相邻布置。第一线元件在衬底上延伸，用于连接第一接触盘和第一电路元件的接触区域的第一端部分，至少一个第二线元件在衬底上延伸，用于连接第二接触盘和第一电路元件的接触区域的第二端部分。第一电路元件的接触区域的形状使得它在接触区域和固定参考电位之间提供了具有预设电容值的电容连接。整个电路的组装密度可以通过使第一线元件和所述至少第二线元件具有相同形状并且使它们基本上相互平行排列来有利地提高，还可以通过使第一接触盘和第二接触盘位于至少第一电路元件的接触区域的相对两侧来有利地提高。本发明的多个阻抗变换电路可以有利地组合成一个多耦合线阻抗变换电路。

Claims (16)

1、一种阻抗变换电路(10；11a；11b；12)，其具有在衬底(20)上形成的分隔开的第一接触盘(51)和第二接触盘(52)，该阻抗变换电路(10；11a；11b；12)包括：至少一个第一电路元件(40)，用于提供在所述衬底(20)上形成的接触区域(41)，并且所述第一电路元件在所述第一接触盘(51)和所述第二接触盘(52)之间与这两个接触盘相邻布置；第一线元件(31)，其在所述衬底(20)上延伸，连接所述第一接触盘(51)和所述第一电路元件(40)的所述接触区域(41)的第一端部分(41a)；和至少一个第二线元件(32)，其在所述衬底(20)上延伸，连接所述第二接触盘(52)和所述第一电路元件(40)的所述接触区域(41)的第二端部分(41b)，其中所述第一电路元件(40)的所述接触区域(41)的形状用于提供在所述接触区域(41)和固定参考电位之间具有预设电容值的电容连接。
2、如权利要求1所述的阻抗变换电路(10；11a；11b；12)，其中所述第一线元件(31)和所述至少第二线元件(32)具有相同形状并且基本上相互平行排列。
3、如权利要求1或2所述的阻抗变换电路(10；11a；11b；12)，其中所述第一接触盘(51)和所述第二接触盘(52)位于所述至少第一电路元件(40)的所述接触区域(41)的相对两侧。
4、如权利要求1至3之一所述的阻抗变换电路(10；11a；11b；12)，其中所述第一电路元件(40)是金属氧化物半导体(MOS)电容。
5、如前述权利要求之一所述的阻抗变换电路(11b)，其中所述衬底(20)布置在连接到固定参考电位的金属层(22)上。
6、如前述权利要求之一所述的阻抗变换电路，其中所述固定参考电位是地电位。
7、如前述权利要求之一所述的阻抗变换电路(10；11a；11b；12)，其中所述线元件(31、32；31、32、36；31、32、33、34)是接合线。
8、如前述权利要求之一所述的阻抗变换电路(10；11a；11b；12)，其中，所述第一接触盘(51)是所述阻抗变换电路(10；11a；11b；12)的输入连接端，所述第二接触盘(52)是所述阻抗变换电路(10；11a；11b；12)的输出连接端。
9、如权利要求1至8之一所述的阻抗变换电路(11a；11b)，还包括位于所述衬底(20)上并且具有第一端子和第二端子的第二电路元件(60)，所述第二电路元件(60)具有预设电容值并且被布置成在所述第一接触盘(51)和所述第二接触盘(52)之间提供电容连接，其中所述第一端子连接到所述第一接触盘(51)上，所述第二端子连接到所述第二接触盘(52)上。
10、如权利要求9所述的阻抗变换电路(11a；11b)，其中所述第一端子和所述第二端子中至少之一经由在所述衬底上延伸的线元件(36)连接到所述第一和第二接触盘(51；52)的相应一个接触盘上。
11、如权利要求9或10所述的阻抗变换电路(11a；11b)，其中所述第二电路元件(60)是薄膜电容。
12、如权利要求9或10所述的阻抗变换电路(11a；11b)，其中所述第二电路元件是在所述衬底上由耦合带状线形成的电容。
13、一种多耦合线阻抗变换电路(12)，至少包括如权利要求1至12之一所述的第一(16)和第二(18)阻抗变换电路，该第一(16)和第二(18)阻抗变换电路在单个衬底(20)上相邻排列，其中所述第一(16)和第二(18)阻抗变换电路通过所述第一(16)和第二(18)阻抗变换电路的各个所述第一接触盘(51、53)和第二接触盘(52、54)相互并联电连接。
14、如权利要求13所述的多耦合线阻抗变换电路(12)，其中所述线元件(31、32、33、34)相互之间布置成在相邻线元件之间提供预设电容和电感耦合。
15、一种包括功能射频电路的射频装置，其具有用于阻抗匹配和频率滤波中至少之一的至少一个被动电路块，所述被动电路块包括如权利要求1至14之一所述的阻抗变换电路。
16、如权利要求15所述的射频装置，其中所述射频装置是移动电话、无线接入网的基站、或者有线电视(CATV)接收机中的信号变换器。
CN2004800210131A 2003-07-23 2004-07-13 压缩型阻抗变换电路 Expired - Fee Related CN1826671B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP03102260.1 2003-07-23
EP03102260 2003-07-23
PCT/IB2004/051202 WO2005008694A1 (en) 2003-07-23 2004-07-13 Compact impedance transformation circuit

Publications (2)

Publication Number Publication Date
CN1826671A true CN1826671A (zh) 2006-08-30
CN1826671B CN1826671B (zh) 2011-07-27

Family

ID=34072676

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2004800210131A Expired - Fee Related CN1826671B (zh) 2003-07-23 2004-07-13 压缩型阻抗变换电路

Country Status (7)

Country Link
US (1) US7443264B2 (zh)
EP (1) EP1652198B1 (zh)
JP (1) JP2006528854A (zh)
CN (1) CN1826671B (zh)
AT (1) ATE484063T1 (zh)
DE (1) DE602004029469D1 (zh)
WO (1) WO2005008694A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393863A (zh) * 2011-06-15 2012-03-28 西安电子科技大学 金丝键合线的阻抗匹配方法
CN105874594A (zh) * 2013-12-23 2016-08-17 高通股份有限公司 三维线焊电感器

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101391890B1 (ko) * 2007-12-04 2014-05-07 교세미 가부시키가이샤 광전변환모듈
JP4735670B2 (ja) * 2008-06-11 2011-07-27 富士ゼロックス株式会社 プリント基板および画像処理装置
EP2458730B8 (en) * 2010-11-29 2015-08-05 Nxp B.V. Radiofrequency amplifier
EP2463905B1 (en) 2010-12-10 2014-10-01 Nxp B.V. Packaged RF transistor with special supply voltage leads
US9735117B2 (en) 2012-01-20 2017-08-15 Skyworks Solutions, Inc. Devices and methods related to interconnect conductors to reduce de-lamination
CN107004669A (zh) 2014-09-30 2017-08-01 天工方案公司 具有减小面积的屏蔽射频模块
US9893025B2 (en) * 2014-10-01 2018-02-13 Analog Devices Global High isolation wideband switch
US10432164B2 (en) * 2016-12-08 2019-10-01 Electronics And Telecommunications Research Institute Impedance matching circuit of communication apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100530871B1 (ko) * 1998-08-14 2006-06-16 이해영 본딩와이어인덕터와그것을이용한본딩와이어인덕터배열구조,칩인덕터,커플러및변압기
US6194774B1 (en) * 1999-03-10 2001-02-27 Samsung Electronics Co., Ltd. Inductor including bonding wires
JP2002164214A (ja) * 2000-10-27 2002-06-07 Xerox Corp ボンディングワイヤを使用する非同一面マイクロコイル及びその製造方法
US6621141B1 (en) * 2002-07-22 2003-09-16 Palo Alto Research Center Incorporated Out-of-plane microcoil with ground-plane structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393863A (zh) * 2011-06-15 2012-03-28 西安电子科技大学 金丝键合线的阻抗匹配方法
CN102393863B (zh) * 2011-06-15 2013-06-12 西安电子科技大学 金丝键合线的阻抗匹配方法
CN105874594A (zh) * 2013-12-23 2016-08-17 高通股份有限公司 三维线焊电感器
CN105874594B (zh) * 2013-12-23 2019-06-04 高通股份有限公司 三维线焊电感器

Also Published As

Publication number Publication date
JP2006528854A (ja) 2006-12-21
EP1652198B1 (en) 2010-10-06
ATE484063T1 (de) 2010-10-15
WO2005008694A1 (en) 2005-01-27
DE602004029469D1 (de) 2010-11-18
CN1826671B (zh) 2011-07-27
EP1652198A1 (en) 2006-05-03
US7443264B2 (en) 2008-10-28
US20080055015A1 (en) 2008-03-06

Similar Documents

Publication Publication Date Title
CN1663120B (zh) 具有一个多层衬底的电子组件
US6424223B1 (en) MMIC power amplifier with wirebond output matching circuit
EP1573813B1 (en) Rf power transistor with internal bias feed
CN1111948C (zh) 双频带发送器
KR100624554B1 (ko) 안테나 스위치 회로와 그것을 이용한 복합 고주파 부품 및이동체 통신기기
CN1211858C (zh) 高频功率晶体管器件
US7982557B2 (en) Layered low-pass filter capable of producing a plurality of attenuation poles
EP2458730A1 (en) Radiofrequency amplifier
US10381984B2 (en) Amplifiers and amplifier modules with shunt inductance circuits that include high-Q capacitors
US20070057731A1 (en) On-chip harmonic termination for RF power amplifier applications
US7479847B2 (en) Filter using piezoelectric resonator
US20040227666A1 (en) Antenna switch module, all-in-one communication module, communication apparatus and method for manufacturing antenna switch module
US7206551B2 (en) High frequency switch module and multi-layer substrate for high frequency switch module
KR20070014087A (ko) 반도체 전력 디바이스 및 광대역 고주파 (ｒｆ) 신호증폭기
CN1826671B (zh) 压缩型阻抗变换电路
US6633209B2 (en) Filter
US20060284705A1 (en) Bandpass filter having increased out-of-band signal rejection characteristic
DE102004032928B4 (de) RF-Modul mit verbesserter Integration
JP4534405B2 (ja) 高周波スイッチ回路およびそれを用いた電子装置
KR20220078688A (ko) 도허티 증폭기
CN220732768U (zh) 一种射频模组
CN210405240U (zh) 一种5g带通滤波器
WO2021157402A1 (ja) アンテナ整合回路
CN117353694A (zh) 一种差分阻抗变换器及电子设备
CN113964468A (zh) 一种基于ipd技术的小型化宽带功分器

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20090206

Address after: Holland Ian Deho Finn

Applicant after: Koninkl Philips Electronics NV

Address before: Holland Ian Deho Finn

Applicant before: Koninklijke Philips Electronics N.V.

ASS Succession or assignment of patent right

Owner name: NXP CO., LTD.

Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V.

Effective date: 20090206

C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20151029

Address after: Holland Ian Deho Finn

Patentee after: NXP BV

Address before: Holland Ian Deho Finn

Patentee before: Koninkl Philips Electronics NV

C56 Change in the name or address of the patentee
CP03 Change of name, title or address

Address after: Nijmegen

Patentee after: AMPLEON NETHERLANDS B.V.

Address before: Holland Ian Deho Finn

Patentee before: NXP BV

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110727

Termination date: 20200713