CN1750318A - 平面电路用箱体 - Google Patents
平面电路用箱体 Download PDFInfo
- Publication number
- CN1750318A CN1750318A CNA2005101030908A CN200510103090A CN1750318A CN 1750318 A CN1750318 A CN 1750318A CN A2005101030908 A CNA2005101030908 A CN A2005101030908A CN 200510103090 A CN200510103090 A CN 200510103090A CN 1750318 A CN1750318 A CN 1750318A
- Authority
- CN
- China
- Prior art keywords
- planar circuit
- casing
- circuit substrate
- planar
- cavity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1417—Mounting supporting structure in casing or on frame or rack having securing means for mounting boards, plates or wiring boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/20—Frequency-selective devices, e.g. filters
- H01P1/201—Filters for transverse electromagnetic waves
- H01P1/203—Strip line filters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/20—Frequency-selective devices, e.g. filters
- H01P1/201—Filters for transverse electromagnetic waves
- H01P1/205—Comb or interdigital filters; Cascaded coaxial cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6683—High-frequency adaptations for monolithic microwave integrated circuit [MMIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/165—Containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
- H01L2924/1616—Cavity shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/163—Connection portion, e.g. seal
- H01L2924/16315—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Casings For Electric Apparatus (AREA)
Abstract
本发明提供一种平面电路用箱体,该箱体内部的空腔为例如长方体形状那样的简单形状。一种平面电路用箱体,用于收纳平面电路,其特征在于,具有支撑部,其用于在与平面电路基板基本垂直的箱体内面的至少一部分上支撑平面电路基板的端部,平面电路基板的上方的空腔和下方的空腔在与平面电路基板平行的方向上基本为相同尺寸。
Description
技术领域
本发明主要涉及微波段、毫米波段的平面电路用箱体,特别涉及平面电路基板的上方的空腔和下方的空腔在与平面电路基板平行的方向上基本上为相同尺寸的平面电路用箱体。
背景技术
图1表示现有的平面电路的箱体100的正视剖面图。在箱体100的内部,如图1所示放置有电路基板120。电路基板120由玻璃环氧树脂、陶瓷等电介质形成。电路基板120的平面形状通常是长方形形状,但也有圆形形状的情况。
在电路基板120的上面、下面或两面设置有平面电路(未图示)。在设置于电路基板120上的平面电路中包含可在微波段和毫米波段等中使用的、例如高频滤波器等平面电路。平面电路通常使用导体薄膜形成,但也可使用由高温超导材料形成的薄膜等来构成平面电路。
箱体100通常由铜等金属导体形成,但有时也可以是在内部具有空间或空腔180、182的箱形的部件,由金薄膜覆盖其外表面。在箱体100的内壁,如图所示,设置有2级的阶梯部141。箱体100的下部为基座部142,使基座部142的下面接触冷却台(未图示),可冷却包含基板的箱体100整体。
在箱体100的上部,盖有盖子部144。可通过摘下盖子部144,将电路基板120设置在箱体100内壁的阶梯部141上,然后安上盖子部144,来进行封装。
如图1所示,通过接合部160使地导体126和作为地的金属箱体100的阶梯部141导通。接合部160例如可用金线(Au线)等良导体形成。
由于具有这种结构,可从外部将平面电路电磁屏蔽。作为具有这种结构的现有技术的一例,可列举在特开平10-13105(专利文献1)中所公开的技术。
专利文献1特开平10-13105号公报。
在上述的现有的平面电路的箱体100中,当要获得电路基板140的特性时,存在如下问题:因为在基板上部180和基板下部182空腔的宽度和长度不同,所以很难预测不需要的波导传播方式的发生。
发明内容
本发明就是鉴于这种现有技术的问题点而提出的,其目的在于,提供一种箱体内部的空腔为例如长方体形状那样的简单的形状的平面电路用箱体。
而且,本发明的目的在于,提供一种能稳定平面电路设备的特性以高精度地测定或利用的平面电路用箱体。
另外,本发明的目的在于,在假定测定或利用极低温度下的平面电路的情况下,应对由平面电路基板和箱体的热膨胀率的差异引起的平面电路基板的破损,以及确保温度变化时的基板地导体/箱体间的导通单元。
为了实现上述课题,本发明的一个特征在于,用于收纳平面电路的平面电路用箱体具有支撑部,其用于在与平面电路基板基本垂直的箱体内面中的至少一部分上支撑平面电路基板的端部,平面电路基板的上方的空腔和下方的空腔在与平面电路基板平行的方向上基本为相同尺寸。
上述平面电路基板用箱体,该箱体被分割成2个或2个以上,它们的接合面可由曲面或多个平面构成。
上述平面电路用箱体还可进一步包括固定件,其弹性地固定被收纳在该箱体内的平面电路基板。
上述平面电路用箱体可包括导通单元,其将设置在收纳于该箱体内的平面电路基板上的导体部分与该箱体电连接。
上述平面电路用箱体也可构成为使上述固定件作为导通单元来发挥功能。
上述平面电路用箱体还可包括隔板,其用于将设置上述导通单元的部位从上述空腔隔离。
上述平面电路用箱体也可构成为使该箱体的下部部分成为用于提高热传导量的基座部。
上述支撑部也可以是为了收容平面电路基板而在箱体内面设置的槽。
根据基于本发明的一实施例的平面电路用箱体,通过使平面电路基板的端部收容于箱体的内面,设箱体内面为简单的平面,可防止不需要的波导传播方式的发生。另外,不需要进行接合等复杂的加工即可使平面电路上的地导体与箱体导通,同时将平面电路基板固定在箱体内。
根据基于本发明的其他实施例的平面电路用箱体,可获得如下效果:在使用2个或2个以上的部件组装成箱体的情况下,通过用曲面或多个平面来构成这种情况下的接合部,可屏蔽来自外界的电磁场的影响,而且不会使箱体内部的能量泄漏到外界。
根据基于本发明的其他实施例的平面电路用箱体,在根据箱体和平面电路基板的热膨胀率的差异来预先进行设计使得尺寸在目标的极低温度下变得合适的情况下,即使在直至达到要求的温度的期间,也能将平面电路基板固定在箱体内的要求的位置上。
根据基于本发明的其他实施例的平面电路用箱体,包括导通单元,在极低温度下测定或利用平面电路的情况下,该导通单元不管在怎样的温度下也使箱体/平面电路基板上地导体间的电位差为零,该导通单元能够消除热膨胀引起的位置/形状的变化。
附图说明
图1是现有的平面电路用箱体100的正视剖面图。
图2是基于本发明的实施例1的箱体的正视剖面图。
图3A是基于本发明的实施例2的箱体的正视剖面图。
图3B是基于本发明的实施例2的箱体的正视剖面图。
图4A是基于本发明的实施例3的箱体下部的平面图和箱体的正视剖面图。
图4B是基于本发明的实施例3的箱体下部的平面图和箱体的正视剖面图。
图5A是基于本发明的实施例4的箱体下部的平面图和箱体的正视剖面图。
图5B是基于本发明的实施例4的箱体下部的平面图和箱体的正视剖面图。
图6是基于本发明的实施例5的箱体的正视剖面图。
图7是基于本发明的实施例1的变形例的箱体的正视剖面图。
符号说明
240、340:箱体;280、282:空腔;241、341:槽;241’:突起部;120:平面电路基板;242、642:基座部;342、362:箱体下部;350、370:箱体上部;480、490:固定件;560:导通单元;532:隔板。
具体实施方式
下面,一边参照附图一边对基于本发明的平面电路用箱体的实施例进行说明。
实施例1
图2是表示基于本发明的实施例1的箱体的正视剖面图。
图2所示的箱体240与现有技术相同,通常由铜等金属导体形成,是在内部具有空间或空腔280、282的箱形的部件,也可用金薄膜覆盖外表面。如图所示,箱体240的内壁没有阶梯等凹凸,除了槽241,为简单的平面形状。空腔的形状一般是长方体形状,但也可以是圆柱形状、多棱柱形状,任意的形状都可以。作为用于支撑平面电路基板的支撑部的一例,示出了设在箱体内面的槽241。槽241能收容和支撑平面电路基板120的端部。作为支撑部,也可以构成从箱体内面突起的突起部241’(图7)来取代槽,利用突起部支撑平面电路基板的端部。突起部241’只需有必要的长度、宽度、个数即可。箱体240的下部为基座部242,可以通过该部分冷却箱体240整体。
通过将电路基板120插在设置于箱体240内壁的槽241中,可固定电路基板120。通过使槽241紧贴电路基板120,可确保基板上地导体(未图示)与箱体240之间的导通。
电路基板120可以由玻璃环氧树脂、陶瓷等电介质形成。电路基板120的平面形状通常是长方形形状,但也可以是圆形状。在电路基板120的上面、下面或两面设置有平面电路(未图示)。在设置于电路基板120上的平面电路中,包含可在微波段和毫米波段等使用的、例如高频滤波器等平面电路。平面电路通常使用导体薄膜形成,但也可使用由高温超导材料形成的薄膜等来构成平面电路。
在本实施例中,电路基板上部的空腔280和电路基板下部的空腔282的宽度(附图中的水平方向的长度)相等。另外,电路基板上部的空腔280和电路基板下部的空腔282的长度(附图中的深度方向的长度)相等。这样,可以得到下面的效果:通过使平面电路基板的上方的空腔和下方的空腔在与平面电路基板平行的方向上为相同尺寸,使空腔的解析区域成为简单的长方体,解析变得容易,而且,解析的条件变得几乎等于实际的测定条件。
实施例2
为了封装,实施例1的箱体240也可以使用与现有技术相同的结构简单的盖子部。然而,如图1所示,如果盖子部和箱体主体的接触面是简单的平面143,则存在电磁波比较容易侵入的问题。因此,图3A以及图3B示出了已解决了这样的问题点的实施例2。
图3A以及图3B是基于本发明的实施例2的箱体的正视剖面图。
图3A所示的箱体340与图2所示的箱体240几乎相同,所以仅就箱体340的不同点进行说明。箱体340使用箱体下部342和箱体上部3502个或2个以上部件来组装成箱体。箱体下部342与箱体上部350的接合部分位于平面电路基板插入用的槽341的位置处,如图所示,成为剖面为曲柄状的1级的梯状接合面(多个平面的合成)。本发明不限于1级,级数可以是任意级。当级数变多时,结构就变得复杂,但防止电磁波入侵的效果提高。
另外,图3B所示的箱体340几乎与图2所示的箱体240相同,所以,仅就图3B的箱体340的不同点进行说明。箱体340使用箱体下部362和箱体上部3702个或2个以上的部件来组装成箱体。箱体下部362与箱体上部370的接合部分位于平面电路基板插入用的槽341的位置处,如图所示,成为曲面状的接合面。
通过这些迷宫式的结构,可有效地防止来自外界的不需要的电磁波的侵入,而且不会有来自箱体内部的能量泄漏。
这里,接合面可以是箱体的任意部位。另外,对于接合面的形状,该面是曲面或多个平面的情况都包含在本发明的范围内。
实施例3
实施例1、2的箱体240、340适合于在温度一定的条件下使用。但是,当在极低温度下测定或利用平面电路时,需要对包含平面电路基板的箱体整体进行冷却,当平面电路基板与箱体材料之间的热膨胀率不同时会产生问题。即,有时会出现如下的情况:因为箱体内部的槽241、341与电路基板120在常温时无缝隙地紧贴着,所以当冷却箱体时,与电路基板120相比箱体的收缩变大,最终压迫平面电路基板而使之破损。因此,图4A以及图4B示出了已解决了这样的问题点的实施例3。
图4A以及图4B是基于本发明的实施例3的箱体下部的平面图和箱体的正视剖面图。
图4A以及图4B所示的箱体440与图3A所示的箱体340几乎相同,所以仅对箱体440的不同点进行说明。平面电路用箱体440将箱体上部450、470和箱体下部442、462的接合面设置在插入平面电路基板的槽441的部分上。槽441的水平方向的深度被设计成在常温时与电路基板120的端部之间具有间隔,并设计了余裕以便在冷却时不损坏电路基板120。将插入平面电路基板的槽的高度设计成在极低温度下与平面电路基板的尺寸相一致的尺寸。这样,因为槽的高度是在常温下比平面电路基板大的尺寸,所以,不能可靠地固定收纳在箱体内的平面电路基板。
因此,在箱体内部设置用于在下降至要求的低温的期间弹性地固定平面电路基板的部件。在图4A中所示的实施例中,具有从上面弹性地按压以固定平面电路基板120的固定件480。在图4B表示的实施例中,具有从侧面弹性地按压以固定平面电路基板120的固定件490。固定件480、490均设置多个,在图4的实施例中分别设置有4个。固定件例如可以是板簧等弹性体,也可以是利用弹簧等施加偏力的类型的部件。固定件也可以是导体,这种情况下,可兼备接合部的功能。420是用于与平面电路连接的连接端子。
根据这种结构,即使在箱体整体的温度发生大的变化使得箱体膨胀或收缩的情况下,也能够测定或利用平面电路而不会损坏平面电路基板120。
这里,构成箱体的部件的数量不限于2个。另外,接合面可以是箱体的任意部位,不管固定平面电路的部件的数量、位置、方向如何均包含在本发明的范围内。
实施例4
图5A以及图5B表示基于本发明的实施例4的箱体下部的平面图和箱体的正视剖面图。
当在极低温度下测定或利用平面电路时,需要将包含平面电路基板120的箱体整体冷却以进行利用或测定,在使温度变化时,考虑到由于热胀冷缩使得平面电路基板120相对于箱体540的位置关系发生变化。在这种情况,为了使箱体540与平面电路基板120上的作为导体部分的地导体始终可靠地导通,在基于实施例4的平面电路用箱体540中,在箱体540和平面电路基板120上的地导体之间,例如设置有接合线等导通单元560。
另外,为了将部位530与空腔580隔离以便使设置有导通单元560的部位530很难对截止波导的形状产生影响,在空腔580和部位530之间设置有由箱体材料形成的隔板532。在图5A中,收纳了导通单元560的部位530成为多个插槽(凹部)。在图5B中,收纳了导通单元560的部位530成为环绕电路基板120一周的连续的槽(凹部)。
根据这种结构,即使在箱体整体的温度发生大的变化的情况下,也能够将箱体和平面电路基板上的地导体保持为相同电位来进行测定,而且能够维持空腔的长方体形状。520是用于与平面电路连接的连接端子。这里,设置导通单元560的位置和个数不限于图5所示的情况。
实施例5
图6是表示基于本发明的实施例5的箱体的正视剖面图。
实施例5包括实施例2、实施例3以及实施例4的全部结构。而且,考虑了在极低温度下测定或利用平面电路基板的情况,解决了基座部和冷却台的接触面的导热热阻的问题。通过使箱体基座部642形成为与冷却台一体以使冷却台与箱体基座部之间没有接触面,来提高热传导量。
这样,与图2至图5所示的箱式的箱体相比,能够使箱体和电路基板的温度线性地追随冷却台的温度变化。
在上述的实施例中,使用槽作为平面电路基板的支撑部来进行了说明,但本发明不限于槽,例如,也可以如图7所示,采用利用从箱体内面的突起部来支撑平面电路基板的结构,也可以采用其他任意形状的支撑部。
基于本发明的平面电路用箱体可用于微波段、毫米波段平面电路的封装,该被封装的平面电路可在通信设备内使用。
Claims (8)
1.一种平面电路用箱体,用于收纳平面电路,其特征在于,具有:
支撑部,其用于支撑平面电路的端部,在与平面电路基板基本垂直的箱体内面的至少一面上提供该支撑部;
位于所述箱体内的所述平面电路的上方的上方空腔;
位于所述箱体内的所述平面电路的下方的下方空腔,其在与所述平面电路基板平行的方向上具有与所述上方空腔相同的尺寸。
2.根据权利要求1所述的平面电路用箱体,其特征在于,
所述箱体被分割成至少2个部分,它们的接合面是曲面或包含多个平面。
3.根据权利要求1所述的平面电路用箱体,还包括固定件,其弹性地固定被收纳在所述箱体内的所述平面电路基板。
4.根据权利要求1所述的平面电路用箱体,其特征在于,还包括多个导通单元,其将收纳于所述箱体内的所述平面电路基板上的多个导体部分与所述箱体电连接。
5.根据权利要求3所述的平面电路用箱体,其特征在于,所述固定件还作为导通单元来发挥功能,用于将收纳于所述箱体内的所述平面电路基板上的导体部分与所述箱体电连接。
6.根据权利要求4所述的平面电路用箱体,还包括多个隔板,其用于将所述多个导通单元与所述空腔隔离。
7.根据权利要求2所述的平面电路用箱体,其特征在于,下部部分是用于提高热传导量的基座部。
8.根据权利要求1所述的平面电路用箱体,其特征在于,所述支撑部是用于收容所述平面电路的端部的槽。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004271667A JP4536467B2 (ja) | 2004-09-17 | 2004-09-17 | 平面回路用筐体 |
JP2004271667 | 2004-09-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1750318A true CN1750318A (zh) | 2006-03-22 |
CN100541905C CN100541905C (zh) | 2009-09-16 |
Family
ID=35645634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005101030908A Expired - Fee Related CN100541905C (zh) | 2004-09-17 | 2005-09-19 | 平面电路用箱体 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7564699B2 (zh) |
EP (1) | EP1643550B1 (zh) |
JP (1) | JP4536467B2 (zh) |
KR (1) | KR100679609B1 (zh) |
CN (1) | CN100541905C (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5044476B2 (ja) | 2008-04-11 | 2012-10-10 | ホシデン株式会社 | シールドケース及び基板アッセンブリ |
US8116090B2 (en) * | 2009-04-09 | 2012-02-14 | Bae Systems Information And Electronic Systems Integration Inc. | Low temperature co-fired ceramic (LTCC) transmit/receive (T/R) assembly utilizing ball grid array (BGA) technology |
Family Cites Families (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3910448A (en) * | 1974-05-31 | 1975-10-07 | Raychem Sa Nv | Heat recoverable closure assembly |
JPS6059586U (ja) * | 1983-09-29 | 1985-04-25 | 富士通株式会社 | 雌ネジ付きキヤツプの固定構造 |
JPH0233364Y2 (zh) * | 1985-10-14 | 1990-09-07 | ||
JPH0626320B2 (ja) * | 1986-04-09 | 1994-04-06 | 日本電気株式会社 | 無線送受信装置 |
JPH04564Y2 (zh) * | 1986-10-31 | 1992-01-09 | ||
US4758927A (en) * | 1987-01-21 | 1988-07-19 | Tektronix, Inc. | Method of mounting a substrate structure to a circuit board |
JPH02128434U (zh) * | 1989-03-29 | 1990-10-23 | ||
DE3912481C1 (zh) * | 1989-04-15 | 1990-06-07 | Ant Nachrichtentechnik Gmbh, 7150 Backnang, De | |
US5111362A (en) * | 1990-09-18 | 1992-05-05 | Intel Corporation | Enclosure assembly with two identical covers having modifiable supports for asymmetrically housing a printed circuit board or the like |
JPH0521979A (ja) * | 1991-07-12 | 1993-01-29 | Fujitsu Ltd | プリント板のシールド構造 |
US5355104A (en) * | 1993-01-29 | 1994-10-11 | Hughes Aircraft Company | Phase shift device using voltage-controllable dielectrics |
US5397857A (en) * | 1993-07-15 | 1995-03-14 | Dual Systems | PCMCIA standard memory card frame |
JP3102735B2 (ja) | 1993-10-27 | 2000-10-23 | 株式会社ケンウッド | プリント基板の取付構造 |
US5920984A (en) * | 1993-12-10 | 1999-07-13 | Ericsson Ge Mobile Communications Inc. | Method for the suppression of electromagnetic interference in an electronic system |
FR2720216B1 (fr) * | 1994-05-18 | 1996-06-14 | Snecma | Dispositif de protection d'un dispositif électronique sensible aux rayonnements électromagnétiques. |
US5493075A (en) * | 1994-09-30 | 1996-02-20 | International Business Machines Corporation | Fine pitch solder formation on printed circuit board process and product |
US5565656A (en) * | 1994-11-30 | 1996-10-15 | Lucent Technologies Inc. | Self-fastening EMI shielding enclosures |
US5544006A (en) * | 1995-01-18 | 1996-08-06 | Dell Usa, L.P. | Computer chassis having flexible card guide for expansion card insertion and removal |
JPH08330772A (ja) * | 1995-05-31 | 1996-12-13 | Fujitsu Ltd | 通信装置の筐体構造 |
JPH08335794A (ja) | 1995-06-08 | 1996-12-17 | Alps Electric Co Ltd | シールドケース |
US6242690B1 (en) * | 1995-09-25 | 2001-06-05 | Ericsson Inc. | Gasket system for EMI isolation |
JPH09307260A (ja) | 1996-05-15 | 1997-11-28 | Mitsubishi Electric Corp | 回路ブロック相互間シールド機構 |
JP3723284B2 (ja) | 1996-06-27 | 2005-12-07 | 三菱電機株式会社 | 高周波フィルタ |
US5777856A (en) * | 1996-08-06 | 1998-07-07 | Motorola, Inc. | Integrated shielding and mechanical support |
JP2806901B2 (ja) * | 1996-08-08 | 1998-09-30 | 静岡日本電気株式会社 | 電子機器筐体 |
DE19634671C2 (de) * | 1996-08-28 | 1998-08-27 | Stahl R Schaltgeraete Gmbh | Metallgehäuse in der Zündschutzart "Druckfeste Kapselung" |
JPH1098316A (ja) * | 1996-09-25 | 1998-04-14 | Murata Mfg Co Ltd | 誘電体共振器及び誘電体フィルタ |
JP3267521B2 (ja) | 1996-11-08 | 2002-03-18 | アルプス電気株式会社 | プリント基板の取付構造 |
JPH10200287A (ja) * | 1997-01-10 | 1998-07-31 | Mitsubishi Electric Corp | シールド構造体 |
JPH10200288A (ja) * | 1997-01-13 | 1998-07-31 | Sony Corp | 電磁シールド構造 |
JPH10294585A (ja) * | 1997-04-22 | 1998-11-04 | Kokusai Electric Co Ltd | プリント基板用シールドケース |
US6160710A (en) * | 1998-04-03 | 2000-12-12 | Ericsson Inc. | Capacitive mounting arrangement for securing an integrated circuit package to a heat sink |
US6407925B1 (en) * | 1999-09-17 | 2002-06-18 | Denso Corporation | Casing for electronic control devices |
JP2001135967A (ja) * | 1999-11-05 | 2001-05-18 | Anritsu Corp | 高周波ユニットのシールド構造 |
JP2001218461A (ja) * | 2000-01-31 | 2001-08-10 | Sony Corp | スイッチング電源装置 |
JP3648119B2 (ja) * | 2000-03-01 | 2005-05-18 | 株式会社ケーヒン | 電子回路基板の収容ケース |
US6626352B2 (en) * | 2001-01-11 | 2003-09-30 | Ching-Chieh Li | Soldering method for sealing on-line transfer device of cable and products made thereby |
JP4244280B2 (ja) * | 2002-04-22 | 2009-03-25 | ホーチキ株式会社 | 伝送機器の筐体構造 |
TWI250069B (en) * | 2003-12-02 | 2006-03-01 | Delta Electronics Inc | Assembly structure of case and the assembling method therefor |
US7508682B2 (en) * | 2005-09-19 | 2009-03-24 | Hitachi, Ltd. | Housing for an electronic circuit |
TWI266597B (en) * | 2005-09-27 | 2006-11-11 | Delta Electronics Inc | Electronic apparatus capable of dissipating heat uniformly |
CN100452087C (zh) * | 2006-12-13 | 2009-01-14 | 公安部第一研究所 | 用于证件和票据的个人或个性视读信息加载保护方法 |
-
2004
- 2004-09-17 JP JP2004271667A patent/JP4536467B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-16 KR KR1020050086688A patent/KR100679609B1/ko active IP Right Grant
- 2005-09-16 EP EP05255765.9A patent/EP1643550B1/en not_active Expired - Fee Related
- 2005-09-19 CN CNB2005101030908A patent/CN100541905C/zh not_active Expired - Fee Related
- 2005-09-19 US US11/228,324 patent/US7564699B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN100541905C (zh) | 2009-09-16 |
JP2006086445A (ja) | 2006-03-30 |
KR20060051373A (ko) | 2006-05-19 |
EP1643550B1 (en) | 2015-03-18 |
KR100679609B1 (ko) | 2007-02-08 |
JP4536467B2 (ja) | 2010-09-01 |
US20070223202A1 (en) | 2007-09-27 |
EP1643550A3 (en) | 2007-03-21 |
EP1643550A2 (en) | 2006-04-05 |
US7564699B2 (en) | 2009-07-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11978700B2 (en) | Power semiconductor module arrangement | |
CN1133239C (zh) | 阻抗受控互连装置 | |
EP2175708A1 (en) | Electronic module with heat sink | |
US10763218B2 (en) | Electrical devices and methods for forming electrical devices | |
EP3376534A1 (en) | Electromagnetic shield structure of high frequency circuit, and high frequency module | |
SU660610A3 (ru) | Полупроводниковое устройство | |
US20130083494A1 (en) | Three-dimensional electronics packaging | |
CN1832164A (zh) | 半导体模块 | |
CN101059532A (zh) | 导电接触探头保持器 | |
CN1288949C (zh) | 接插件封装和传送组件 | |
RU2183884C1 (ru) | Гибридный многоуровневый электронный модуль | |
EP3913665A1 (en) | A power semiconductor module and a method for producing a power semiconductor module | |
CN1206893C (zh) | 配有电子电路基板的电子装置 | |
CN1750318A (zh) | 平面电路用箱体 | |
CN1309076C (zh) | 使用嵌入式外壳有效减少电磁辐射的整体电容 | |
CN101061609A (zh) | 接触器及利用接触器的测试方法 | |
CN1155037C (zh) | 具有受控阻抗环境的机电开关装置组件 | |
KR20140063713A (ko) | 몰딩된 하우징을 구비한 전기 제어 장치 | |
CA2827359A1 (en) | Electronic assembly | |
JP2011138964A (ja) | 半導体装置および半導体装置の製造方法 | |
CN1350351A (zh) | 使印刷电路板电连接器不受电磁干扰的保护装置 | |
KR101559729B1 (ko) | 고속 메모리 카드 어댑터와 소켓용 커넥터 | |
US20230137375A1 (en) | Network interface device having heat dissipating members | |
CN114665334A (zh) | 用于224gb/s及以上的同轴传输线sli插座设计 | |
CN1744386A (zh) | 电连接器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090916 Termination date: 20190919 |