CN1723558A - 高密度封装的互连线焊带线及其方法 - Google Patents

高密度封装的互连线焊带线及其方法 Download PDF

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Publication number
CN1723558A
CN1723558A CNA200380105529XA CN200380105529A CN1723558A CN 1723558 A CN1723558 A CN 1723558A CN A200380105529X A CNA200380105529X A CN A200380105529XA CN 200380105529 A CN200380105529 A CN 200380105529A CN 1723558 A CN1723558 A CN 1723558A
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China
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band line
line
ground connection
band
connection
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CNA200380105529XA
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C·怀兰德
W·纳恩
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Abstract

在一个示例性实施例中，集成电路(105)放置于封装(100)中，该封装具有信号焊盘连接、电源连接和接地连接。焊接下带线(110)，这是通过将IC(105)的第一接地连接(110a)耦合至第一封装基板接地连接(110b)。在焊接下带线之后，焊接多条焊线(125)，这是通过将器件管芯(105)上的多个信号焊盘(125a)耦合至封装基板(100)上的各信号焊盘连接(125b)，所述多个信号焊盘(125a)在第一接地连接(110a)附近，并且所述多条焊线(125)与下带线(110)保持第一预定距离。在焊接所述多条焊线(125)之后，焊接上带线(315)，这是通过将IC(105)的第二接地连接(130a)耦合至第二封装基板接地连接(130b)，该上带线与所述多条焊线(125)保持第二预定距离。

Description

高密度封装的互连线焊带线及其方法
本申请涉及同时提交的题为“High Density Package InterconnectPower and Ground Strap and Method Therefore(高密度封装的互连电源和接地母线及其方法)”的申请，其案号为US 02 0511P，在此引用其全部内容以作参考。
本发明涉及集成电路封装领域，尤其设计对信号焊线(bond wire)的阻抗控制。
随着集成电路技术的进步，增加了在给定基板面积上可提供的器件的密度和复杂度，因此给这些器件的封装带来了重大的挑战。例如，在计算机应用中，数据总线的宽度已经从16、32、64增加到128比特及更多。当数据在系统中移动时，总线具有同时切换的输出(SSO)是并不罕见的。SSO经常导致芯片的电源和接地轨受到由SSO过程中的大的瞬时电流引起的噪声的影响。如果噪声严重，接地和电源轨将偏离规定电压，从而引起芯片中的不可预期的行为。
在BGA(球栅阵列)封装中，线焊(wire bond)经常用于将器件的管芯连接至封装上的地。在高管脚数的BGA中，通常使用接地环(ground ring)。这些焊线有时紧邻信号焊线放置，以通过创建共面波导结构来控制信号焊线的阻抗。
美国专利5,872,403和6,083,772针对一种在基板上安装电源半导体管芯的结构和方法。通常，它们是针对电源电子器件，尤其是针对电源器件的低阻抗大电流导体以及制造方法。
美国专利6,319,775 B1涉及一种制造集成电路封装的方法，尤其涉及在集成电路管芯和引线框架上粘合导电母线的工艺。在此引用该专利和前两个所引用的专利的全部内容以作参考。
本发明适用于在高管脚数BGA封装中控制阻抗信号线。通过利用封装的焊线和在焊线上下放置接地面来创建带线结构。于是，通过将焊线封闭于各接地面末端之间的粘合剂中，带线中的焊线被密封于各接地面之间的空气中。粘合剂避免了在接地面和信号线之间引入模塑料(molding compound)，这样，使用者可以利用空气的介电常数(εr＝1.00)比模塑料的介电常数(εr＝4.4)低的优势。
在一个示例性的实施例中，具有信号连接、电源连接和接地连接的集成电路器件(IC)被用于构建具有阻抗受控的互连线焊的结构。IC被放置于封装基板中，该封装基板具有信号焊盘连接、电源连接和接地连接。通过将IC的第一接地连接耦合至第一封装基板接地连接，焊接一个下带线(lower strip line)。在焊接了下带线之后，多条焊线通过器件管芯上的多个信号焊盘焊接，其中所述信号焊盘被耦合到封装基板上的信号焊盘连接上，并且所述多个信号焊盘紧邻第一接地连接，同时所述多条焊线与所述下带线保持第一预定距离。在焊接了所述多条焊线之后，通过将IC的第二接地连接与第二封装基板接地连接相耦合来焊接上带线(upper strip line)，上带线与所述多条焊线保持第二预定距离。
其他优势和新颖特性将在以下的描述中阐明，其中的一部分将由本领域的技术人员通过细读下文而熟知，或者可以通过本发明的实践获知。
通过示例的方式和参考附图，本发明将进一步被详细阐述，其中：
图1为根据本发明的一个实施例的侧视图；以及
图2为根据本发明的另一实施例的横截面图，其由合成材料构成；以及
图3在一个示例过程中概述实施本发明的各步骤；以及
图4为50μm间距下25μm焊线的阻抗对距离带线的高度的曲线图。
本发明有利于控制BGA封装中的信号线的阻抗。通过利用封装的焊线和在焊线上下放置接地面来创建带线结构。于是，通过将焊线封闭于各接地面末端之间的粘合剂中，带线中的焊线被密封于各接地面之间的空气中。粘合剂避免了在接地面和信号线之间引入模塑料，这样，使用者可以利用空气的介电常数(εr＝1.00)比模塑料的介电常数(εr＝4.4)低的优势。
参照图1，在根据本发明的一个例示性实施例中，在器件管芯和封装之间制作一个低阻抗电源或接地连接，其紧邻信号线焊。这减小了线焊的阻抗。在例示封装100中，管芯105已被粘合。焊线125连接管芯105上的信号焊盘125a至信号封装管脚125b。信号焊盘125a附近的第一接地焊盘110a有第一带线110，其连接管芯105上的接地焊盘110a至封装接地(package ground)110b。第一带线110可以包含铜或者其他适合的导电材料。在接地焊盘110a和封装接地110b处，可在铜材料上敷金以提高可焊性并提供较低阻抗的连接。封装接地可以是围绕管芯以提够提供从器件管芯105的接地线至封装接地之间的便利连接的接地环。为防止短路，可以在带线110的下面115或者上面120应用绝缘材料。信号焊盘125a附近的第二个接地焊盘130a有第二带线130，其连接管芯105上的接地焊盘130a至第二封装接地130b。如同第一带线110，第二带线130可以在其下面135或者上面140有绝缘材料。虽然绝缘材料对于防止短路是有用的，但在一些特定应用中并不需要绝缘材料，在这些应用中，可以确保在焊接了根据本发明的各个组件之后，随后的处理步骤扭曲所述焊线和带线以使它们相互接触。某些合适的绝缘材料可以是各种不导电的金属氧化物，其良好地附着于铝焊线或者铜带线上。所述绝缘都满足要求。
在一个例示性实施例中，用户可以使用铝焊线。焊线的外表面可以被氧化以提供不导电的表面。在另一例示性实施例中，包括铜、金或其他合适材料的焊线可以被使用。然而，可以应用例如镍之类的焊接层。在镍上电镀铝并随后将其氧化。其他涂层可以是各种塑料，如聚酰亚胺、聚酰胺、环氧树脂、热塑性塑料等等。出于节约空间的原因，金属氧化物是最薄的。
上述实施例可以应用于陶瓷或者密封包装的(encapsulated)BGA封装。对于陶瓷BGA，信号焊线和两带线之间的间隔应由空气占据。在模制BGA中，模塑料在空间之间流动。因而，图1配置的介电常数对于模制封装将比对于陶瓷封装要高。
为了解决当在模制封装中实现本发明时图1配置的介电常数增加这一问题，可以用粘合剂隔离在其中使用带线的区域。粘合剂防止任何模塑料移动进入任何由信号焊线以及第一和第二带线创建的空气空间。参照图2，在依照本发明的另一例示性实施例中，带线安排200具有在其上加了绝缘层210的下带线205，和同样在其上加了绝缘层220的上带线225。空气空间235分离下带线205和上带线225。焊线215占据空气空间235。粘合剂栓塞230保护空气空间235。粘合剂防止在接地面和信号线之间引入模塑料，这样，使用者可以利用空气的介电常数(εr＝1.00)比模塑料的介电常数(εr＝4.4)低的优势。具有较低介电常数使得更快的信号传播成为可能。在一个例示性实施例中，使用具有最小孔隙率的封装材料，并且利用合适的制造设备，在带线区域下构造和保持内部真空是可能的。在另一例示性实施例中，可以保持部分真空。即使保持部分真空也可以提供介电常数的减小。
虽然并不是必需的，但对于接地焊盘相对于信号焊盘在器件上的放置做某种预先安排可以帮助用户实现根据本发明的带线。现在参照图3，在一个例示性器件中，可以采用一系列步骤300。在305中，用户定义器件管芯上的信号焊盘和接地焊盘的位置。在310中，为器件管芯选择合适的封装。在315中，第一带线被焊接到接地焊盘和封装搭接点(package landing)上。在320中，管芯上的信号焊盘被焊接到相应的封装搭接点上。在325中，第二带线被焊接于信号焊线的下面以构造如图1和2中所描述的安排。如果没有接地焊盘正好位于信号焊盘的上面或者下面，则可以用尽可能近的接地焊盘代替。剩余的没有带线的焊线接着在330中被焊接。如果使用模制封装，在335中用粘合剂密封信号线和带线母线的开口，这样，空气介质可以被保持。在340中，在对器件管芯进行密封包装之前，对剩余的焊线进行焊接。
在根据本发明的另一实施例中，相对于焊线与带线的距离，绘制出焊线阻抗的曲线图。以50μm间距焊接的焊线直径为25μm。现在参照图4，该曲线图表示一个阻抗数值范围，其可以通过构建与焊线有一个特定距离的带线而得到。例如，在25μm的高度下，特征阻抗Zo为约30欧姆。在另一约200μm的高度下，特征阻抗为约120欧姆。对于通常使用的约50、75和100欧姆的阻抗数值，高度(从曲线图中估计)分别为约50、87和142μm。在500μm高度下，焊线的特征阻抗为约170欧姆。在这个距离下，带线的影响可以忽略，好像带线不存在一样。
虽然已经关于几个特定的示例性实施例描述了本发明，但是本领域的技术人员将意识到，在不背离由所附权利要求书所阐明的本发明的精神和范围的情况下，可以对本发明进行许多修改。

Claims (14)

1.在具有信号连接、电源连接和接地连接的集成电路(105)器件(IC)中，集成电路(105)已放置于封装基板(100)中，该封装基板具有信号焊盘连接、电源连接和接地连接，一种用于构建具有阻抗可控的互连线焊的方法，该方法包括：焊接下带线(315)，以将IC的第一接地连接耦合至第一封装基板接地连接；将器件管芯上的多个信号焊盘与多条焊线进行焊接(320)，以将所述多个信号焊盘耦合至封装基板上的各信号焊盘连接，所述多个信号焊盘在第一接地连接附近，并且所述多条焊线与下带线保持第一预定距离；以及焊接上带线(325)，以将IC的第二接地连接耦合至第二封装基板接地连接，该上带线与所述多条焊线保持第二预定距离。
2.根据权利要求1所述的方法，其中该方法还包括：使用电介质材料密封上带线和下带线中的开口，从而将空气封闭在该结构中。
3.根据权利要求2所述的方法，其中的电介质材料为粘合剂。
4.一种在放置于封装中的集成电路(105)器件(IC)中控制焊线阻抗的带线结构，该带线结构包括：将IC中的第一接地连接(110a)耦合至封装中的第一接地连接(110b)的下带线(110，115，120)；将IC中的第二接地连接(130a)耦合至封装中的第二接地连接(130b)的上带线(130，135，140)，下带线和上带线彼此之间相距预定的距离，从而形成容纳线直径小于预定距离的多条焊线(125)的空间，所述焊线不与上带线和下带线电接触，并且所述焊线将IC上的信号管脚(125a)耦合至封装中的信号连接(125b)。
5.根据权利要求4所述的带线结构，其中上带线和下带线粘合在一起，从而密封一个容纳多条焊线的空间。
6.根据权利要求5所述的带线结构，其中所述空间包含从以下各项的至少一个中选择出来的电介质：真空，部分真空，氮气，氧气，氩气，氙气，氖气，气凝胶和泡沫。
7.根据权利要求4所述的带线结构，其中上带线和下带线分别具有沉积在所述多条焊线附近的一侧上的绝缘材料。
8.根据权利要求7所述的带线结构，其中绝缘材料从以下各项的至少一个中选择：聚酰亚胺，聚酰胺，阻焊料，PTFE，TEFLON和Kapton。
9.根据权利要求4所述的带线结构，其中所述多条焊线为从以下各项的至少一个中选择的绝缘涂层所覆盖：氧化铝，环氧树脂，热塑性塑料，聚酰亚胺和聚酰胺。
10.根据权利要求4所述的带线结构，其中上带线和下带线由铜组成。
11.根据权利要求4所述的带线结构，其中上带线和下带线由金组成。
12.根据权利要求4所述的带线结构，其中上带线和下带线由银组成。
13.根据权利要求4所述的带线结构，其中上带线和下带线由铝组成。
14.根据权利要求4所述的带线结构，其中上带线和下带线由从以下各项的至少一个中选择的高导电性材料组成：铜，金，银，铝和它们的合金。
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AU2003302783A1 (en) 2004-06-30
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US20060125079A1 (en) 2006-06-15

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