CN1701445A - 改进的光电探测器 - Google Patents
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Abstract
本发明包含具有由第二p型半导体层耦合的第一p型半导体层和n型半导体层的光电二极管。第二p型半导体层在沿载流子的路径上具有分级的掺杂。具体而言,掺杂的浓度分级为从阳极附近的高值到接近阴极的p浓度的低值。通过以这种方式对掺杂进行分级,实现吸收增加,改善器件的响应度。虽然与相同厚度的本征半导体相比,这种掺杂增加了容量,但由这种分级掺杂而产生的伪电场使电子具有非常高的速度,这种速度高于对这种容量的增加的补偿。
Description
技术领域
本发明涉及基于半导体的光电探测器,尤其涉及具有改进的吸收特性、高速、宽的带宽的光电探测器。
背景技术
在光电探测器的高速和灵敏度之间有众所周知的折衷方案。高的带宽信号检测要求载流子具有较短的跃迁时间,因此需要较薄的吸收层。但是,对吸收层厚度的尺寸限制导致吸收效果和响应度降低。
一种类型的基于半导体的光电探测器是p-i-n结二极管,或称为PIN二极管。一般由外延层中的多个半导电性固体的夹层结构构成这类结构。具体而言,由本征半导体将p型半导体材料和n型半导体区隔开。
在PIN二极管中,耗尽层以与掺杂浓度成反比的距离延伸到结的各边中。因此,p-i耗尽层充分地延伸到本征材料中,i-n结的耗尽层也同样如此。因此,PIN二极管的功能如同具有包围整个本征材料的耗尽层的p-n结。这种结构固有的主要优点包括两个方面。首先,添加本征材料可以增加由二极管捕获的光量的分数。其次,由于具有伸长的耗尽层,因此PIN二极管具有非常小的结容量和相应较快的响应速度。
致力于增加PIN二极管的速度的工作主要集中在降低结的容量。至少一种所提出的设计方案包含用来有效增加二极管的本征部分的尺寸的未掺杂的漂移区(drift region)。虽然这种方案适用于增加结容量,但不幸的是,它增加了载流子的迁移时间并因此而降低了光电探测器的响应时间。因此,在本领域中,需要在增加器件的响应度时可以实现容量和响应时间之间的平衡的改善的光电探测器。
发明内容
因此,本发明包含具有由一第二p型半导体层耦合的一第一p型半导体层和一n型半导体层的光电二极管。第二p型半导体层在沿载流子的路径上具有分级的掺杂。具体而言,掺杂的浓度分级为从阳极附近的高值到接近阴极的p浓度的低值。通过以这种方式对掺杂进行分级,实现吸收增加,改善器件的响应度。虽然与相同厚度的本征半导体相比,这种掺杂增加了容量,但由这种分级掺杂而产生的伪电场使电子具有非常高的速度,这种速度高于对这种容量的增加的补偿。下面参照附图说明本发明的实施例和优点。
附图说明
图1是根据本发明的pin光电二极管的能带图。
图2是根据本发明的表面照明结构中的光电二极管的基本结构的断面图。
图3是根据本发明的一个方面的电场和电子速度之间的关系图。
图4是本发明的半导体层的掺杂浓度和相对深度之间的关系图。
具体实施方式
根据本发明的优选实施例,设置用于光电导目的的外延结构。该光电导的结构是改性PIN二极管,为了通过具有分级掺杂浓度的改进的层而提高性能,优化该改性PIN二极管。这里进一步详细说明本发明的结构和制造方法。
参照图1,PIN光电二极管10的能带图表示形成光电二极管10的半导体材料的相对能级。具体而言,由包含第一p型半导体层14、第二p型半导体层16和n型半导体层18的半导体材料组构成光电二极管10。如图所示,阳极层12邻近于用于聚集空穴的第一p型半导体层14。
第一p型半导体层14是三元化合物半导体,或第III-V族半导体。因此,第一p型半导体层14是第III族中的两种元素与第V族中的一种元素的组合,或者相反,是第V族中的两种元素与第III族中的一种元素的组合。周期表中的代表性的族如下表所示。
第II族 | 第III族 | 第IV族 | 第V族 |
锌(Zn) | 铝(Al) | 硅(Si) | 磷(P) |
镉(Cd) | 镓(Ga) | 锗(Ge) | 砷(As) |
汞(Hg) | 铟(In) | 锑(Sb) |
在优选实施例中,第一p型半导体层14是InAlAs。但可以理解,第一p型半导体层14可以是提供优化光电二极管10的动作所需的带隙的任意三元化合物半导体。
n型半导体层18也是三元化合物半导体,或第III-V族半导体。如上所述,n型半导体层18是第III族中的两种元素与第V族中的一种元素的组合,或者相反,是第V族中的两种元素与第III族中的一种元素的组合。在优选实施例中,n型半导体层18是InAlAs。但可以理解,第一p型半导体层14可以是提供优化光电二极管10的动作所需的带隙的任意三元化合物半导体。
第二p型半导体层16也是三元化合物半导体,或第III-V族半导体。在优选实施例中,第二p型半导体层16是具有分级掺杂浓度的InGaAs。但可以理解,第二p型半导体层16可以是提供优化光电二极管10的动作所需的低带隙的任意三元化合物半导体。
为了实现分级掺杂浓度,不以典型的方式对第二p型半导体层16进行掺杂。一般地,通过使用缺少价电子且常被用作受主的掺杂剂制备p型半导体。p型掺杂导致产生大量的空穴。例如,在一类III-V半导体中,可以用诸如Zn或Cd的第II族的原子取代一些第III族的原子,由此制成p型材料。同样地,当第IV族原子作为第V族原子的受主和第III族原子的施主时,第IV族掺杂的III-V半导体将同时具有过量的电子和空穴。
图2是根据本发明的表面照明结构中的光电二极管10的基本结构的断面图。提供用于生长半导体结构的衬底层20。在衬底上淀积n型半导体层18。淀积第一p型半导体层14和第二p型半导体层16,使得第二p型半导体层16直接邻近于n型半导体层18。如上所述,在第一p型半导体层14上淀积用于聚集空穴的阳极层12。还示出了用于聚集电子的阴极层22或n型接触层。
已经说明,第二p型半导体层16的特征在于它包含分级掺杂浓度。为了优化光电二极管的性能,控制掺杂剂在第二p型半导体层16的存在。第一浓度15位于第一p型半导体14附近,第二浓度17直接邻近于n型半导体层18。优选地,第一浓度15的厚度为800~1000埃,即尺寸与载流子的迁移方向平行。
在优选实施例中,第一浓度15大于第二浓度17。具体而言,第一浓度15位于位置x0并限定掺杂剂浓度p0。对于所有大于零的x和D,在第二p型半导体层16的深度D上,由下面的等式控制优选的掺杂浓度梯度:
图4表示等式(1)。
第二p型半导体层16的分级掺杂结构使光电二极管10的性能提高。在动作过程中,在光电二极管10的第二p型半导体层16中吸收入射光。在大的漂移电场的影响下,吸收到第二p型半导体层16的第二浓度17部分中的光产生向阳极12和阴极22漂移的电子和空穴。虽然这是标准均匀低掺杂的吸收器PIN光电探测器的常见情形,但在本发明中,载流子的光响应更复杂。
在第二p型半导体层16的第二浓度17部分中产生的电子以其饱和速度到达阴极,并得以聚集。在第二p型半导体层16的第二浓度17部分产生的空穴迁移到阳极12,由此进入掺杂剂的浓度相当高的第一浓度15,并在这里聚集,由此结束它们的迁移时间。
通过对比,在第二p型半导体层16的第一浓度15部分中所吸收的光也会产生电子和空穴。但在这种情况下,空穴易于聚集在第一浓度15中,因此实质上不增加载流子的迁移时间或降低光电二极管10的带宽。因此,当考虑空穴时,光电二极管10的分级掺杂浓度不增加它们的迁移时间或降低第一浓度15或第二浓度17中的探测器带宽。
第二p型半导体层16的分级掺杂浓度的另一方面是产生伪电场。第一浓度15区域中产生的电子受到下式中表达的伪场的作用:
其中,k是波尔兹曼常数,T是温度,q是电子的电荷,
值是掺杂浓度梯度。
伪场E产生“过冲”电子速度,即,电子速度可能比饱和速度快几倍。典型的电子饱和速度的量级为5×106cm/sec。但是,在D=1000埃时等式(1)所示的指数梯度产生电场E=2.5kV/cm,这对应于3×107cm/sec的电子过冲速度。图3表示伪场E的大小与电子速度之间的关系。
如上所述,本发明通过实施分级掺杂浓度,提高了光电二极管中的技术发展水平。在这种方式中,基本上不用降低器件的整个带宽,就可以增加光电二极管的净吸收。还可以理解,通过调整掺杂浓度、器件的容量以及吸收区域的整体厚度,可以方便地优化整体速度。上述实施例只是本发明的诸多可能的具体实施例中的几种实例,这对于本领域中的技术人员是显而易见的。在不背离下面权利要求中限定的发明的精神和范围的情况下,本领域中的技术人员可以很容易地设计许多不同的配置。
Claims (19)
1.一种光电二极管,包括:
一第一p型半导体层;
一n型半导体层;
在第一p型半导体层和n型半导体层之间设置的一第二p型半导体层,该第二p型半导体层被设置使得该第二P型半导体直接邻近于n型半导体,且该第二p型半导体层具有分级掺杂浓度。
2.根据权利要求1的光电二极管,进一步包括一用于聚集空穴的阳极层。
3.根据权利要求1的光电二极管,进一步包括一用于聚集电子的阴极层。
4.根据权利要求1的光电二极管,其特征在于,第一p型半导体层是InAlAs。
5.根据权利要求1的光电二极管,其特征在于,n型半导体层是InAlAs。
6.根据权利要求1的光电二极管,其特征在于,第二p型半导体层是InGaAs。
7.根据权利要求1的光电二极管,其特征在于,分级掺杂浓度限定邻近于第一p型半导体层的一第一浓度和邻近于n型半导体层的一第二浓度,并且第一浓度大于第二浓度。
8.根据权利要求7的光电二极管,其特征在于,第一浓度位于位置x0并限定掺杂剂浓度p0,并且,对于所有大于零的x和D,在第二p型半导体层的深度D上,由下面的等式控制分级掺杂浓度:
9.根据权利要求8的光电二极管,其特征在于,第一浓度的长度为800~1000埃。
10.一种光电二极管的制造方法,包括下列步骤:
设置一衬底层;
在衬底上淀积第一p型半导体层;
在衬底上淀积n型半导体层;
将第二p型半导体层分级为第一浓度到第二浓度,其中,第一浓度大于第二浓度;以及
在第一p型半导体层和n型半导体层之间淀积第二p型半导体层,使得第二浓度直接邻近于n型半导体层。
11.根据权利要求10的方法,进一步包括添加聚集空穴的阳极的步骤。
12.根据权利要求10的方法,进一步包括添加聚集电子的阴极的步骤。
13.根据权利要求10的方法,其特征在于,第一p型半导体层是InAlAs。
14.根据权利要求10的方法,其特征在于,n型半导体层是InAlAs。
15.根据权利要求10的方法,其特征在于,第二p型半导体层是InGaAs。
16.根据权利要求10的方法,其特征在于,第一浓度位于位置x0并限定掺杂剂浓度p0,并且,对于所有大于零的x和D,在第二p型半导体层的深度D上,由下面的等式控制分级掺杂浓度:
17.一种光电二极管,具有一第一p型半导体层和一n型半导体层,该光电二极管包括:
在第一p型半导体层和n型半导体层之间设置的一第二p型半导体层,该第二p型半导体层被设置使得该第二P半导体直接邻近于n型半导体,且该第二p型半导体层具有分级掺杂浓度,其中对于所有大于零的x和D,在第二p型半导体层的深度D上,由下面的等式控制分级掺杂浓度:
18.根据权利要求17的光电二极管,其特征在于,第二p型半导体层是III-V型半导体。
19.根据权利要求17的光电二极管,其特征在于,第二p型半导体层是InGaAs。
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CN110880521A (zh) * | 2018-09-06 | 2020-03-13 | 夏普株式会社 | 摄像面板及其制造方法 |
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CN105097964A (zh) * | 2015-07-21 | 2015-11-25 | 中国电子科技集团公司第三十八研究所 | 一种有源区高斯掺杂型pπn紫外探测器 |
CN110880521A (zh) * | 2018-09-06 | 2020-03-13 | 夏普株式会社 | 摄像面板及其制造方法 |
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