CN1701440A - 节约成本的高频包装 - Google Patents

节约成本的高频包装 Download PDF

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CN1701440A
CN1701440A CNA2004800008421A CN200480000842A CN1701440A CN 1701440 A CN1701440 A CN 1701440A CN A2004800008421 A CNA2004800008421 A CN A2004800008421A CN 200480000842 A CN200480000842 A CN 200480000842A CN 1701440 A CN1701440 A CN 1701440A
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G·施梅塔
K·魏德纳
J·查普夫
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Siemens AG
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Abstract

为了生成一种高频包装，一个元器件通过触点与一个电路载体相连，这些触点将所述元器件相对于电路载体间隔开，在元器件和电路载体上涂覆一层薄膜，并且这层薄膜被金属喷镀。

Description

节约成本的高频包装
通常的、密封的、用于模块的高频包装最主要由被铣削的金属壳体构成，该壳体被镀金并且接下来用一个被钎焊的金属壳进行封闭。密封的单个元器件-陶瓷壳体、例如其用于OFW-元器件同样花费巨大，并且对于损耗功率较大的元器件来说越来越不适用了。
当不需要密封性而是需要一种良好的屏蔽时，普通的HF-金属壳体非常贵、非常大并且不再气密地密封，如其经常应用于模块那样。
同样昂贵的是基于最新的LTCC-技术(低温共烧陶瓷技术)的HF-模块壳体。在此，陶瓷只是在盖子被钎焊时用于线路安装。
典型的基于HTCC-技术(高温共烧陶瓷技术)的OFW-过滤器壳体被滚子接缝焊接，并且直到约5GHz对于元器件来说可没有大的耗损功率地被使用。盖子焊接当然比较复杂，并且壳体只是可以应用于一个限定的频率范围。
现有的、密封的CSP-壳体由于在高频范围内将要用到的金-锡-钎焊盖子同样是昂贵的。
DE 100 41 770 A1中公开了一种具有一个第一电介质层、一个高频结构层和至少一个低频结构层的基底，其中高频结构层包括一个高频-配电系统。一个由此而形成的模块还包括一个盖子。
WO 97/45955 A1、WO 99/43084 A1、DE 195 48 048 A1和DE 19818 824 A1中公开了位于电路载体上的电子元器件，这些电子元器件利用盖子、特别是以薄膜的方式被覆盖。此处所用的金属薄膜用手工操作非常困难，并且经常不能被证明为是长期稳定的。
由这一点出发，本发明的任务是给出一个节约成本的用于制造高频包装的方法。
这个任务通过在独立权利要求中给定的发明来解决。有利的方案在从属权利要求中得出。
与此对应，一个电路载体与一个元器件通过触点相连，这些触点将元器件相对于电路载体隔开，从而在元器件、电路载体和触点之间形成空心空间。在该元器件和电路载体上涂覆一层薄膜，使得该薄膜紧紧地贴靠在电路载体(所述元器件位于该电路载体上)的上表面上，并且紧紧地贴靠在元器件的不是面对电路载体的侧面上。在将薄膜涂覆到元器件和电路载体上后，薄膜设置一个金属喷镀涂层。
该金属喷镀涂层最好通过溅射或者蒸镀来涂覆，并且接下来加强电流。
在薄膜中可以在元器件的背对电路载体的侧面上打开一个窗口，通过该窗口可以接触元器件。窗口的打开在薄膜被金属化之前进行，因此触点可以同样通过所述金属喷镀涂层制造出来。
在一个特别精心描述的本发明的改进方案中，一个钎焊凸缘(Lot-bump)设置在电路载体的侧面上，在该侧面上装配有元器件。这个钎焊凸缘如此超出元器件：该钎焊凸缘从电路载体看去比元器件要高。由此，通过电路载体、元器件、薄膜和薄膜的金属喷镀涂层构成的包装在侧面(在该侧面上在电路载体上设置元器件)通过钎焊凸缘例如与另一个电路载体电连接。
元器件特别是一个有源元器件、一个高频元器件和/或一个超高频元器件。
在元器件之外，在电路载体上还设置一个或者多个无源的元器件。该无源的元器件最好设置在电路载体的与元器件对置的侧面上。
本发明其它的优点和特征借助于附图从对实施例的说明中得出。附图示出：
图1是一个单面装备的电路载体的视图，该电路载体具有位于电路载体背面上的丝网印刷的钎焊凸缘；
图2是一个双面装备的电路载体的视图，该电路载体具有位于电路载体前面的、被安放的钎焊头或者钎焊凸缘以及一个位于电路载体后面的、安装在上表面处的无源元器件。
包装的过程在凹槽里进行，并且可以例如如下文中实施的那样进行。与本发明的通用性相对应，在过程链中可以作很多的改动。
元器件1以芯片的形式被隆起，并且被印刷的触点2以钎焊凸缘的形式被包围熔化。另一种方案中，一个电路载体3也被隆起。
元器件1单独地、翻转地以触点2浸渍在熔剂中，并且放置在例如用陶瓷制成的电路载体3的连接垫上。此处，在元器件1、触点2和电路载体3之间生成一个空心空间4。
接着将一个薄膜5完全平坦地层压在元器件1上，并且在接触位置处以及在模块边缘(锯齿痕迹)处例如借助于激光进行平整。
薄膜5通过完全平坦的涂层例如借助于铜-溅射设置一个金属喷镀涂层6，该金属喷镀必要时加强电流。
最好在电路载体3上以在陶瓷上进行金属喷镀涂层的方式围绕一个或者多个框架12，在这些框架处薄膜5被平整。在此，通过元器件1张紧的金属屏蔽层以金属喷镀涂层6的方式直接与电路载体3相连。由此形成了一种密封的包装。
因为触点2以凸缘的形式在空心空间4中被空气包围，也就是在触点2之间的绝缘常数约为1，因此可以使用直到超高频技术的技术。具有高的损耗功率的元器件、例如GaAs-芯片(砷化镓芯片)可以在其被安放之前被磨细。可以借助于激光或者类似方式在薄膜5内在元器件1背对电路载体3的侧面上暴露地切削出窗口7，使得铜-喷镀涂层6直接在元器件上表面上被接触。因此，热量导出不会被薄膜5阻止。元器件基底背面的接地连接可以以相同的方式来实现。
在按照图1的实施方式中，在电路载体3的与元器件1对置的侧面上以一个钎焊凸缘的方式设置一个接触元件8。
在按照图2的实施方式中，在电路载体3的与元器件1对置的侧面上设置一个无源的元器件9并且以钎料10来钎焊。
此外，在电路载体3的侧面(在该侧面上存在元器件1)上以一个钎焊凸缘的方式设置一个接触元件11，该接触元件在电路载体3的上表面上高出具有触点2的元器件1。
所示的变型方案只是说明了优选的实施方式。作为元器件例如Si芯片或者GaAs-芯片也可以进行混合装备。LTCC-陶瓷用作电路载体的基底得到了考验，其它的具有尽可能微小的延伸系数的陶瓷、如HTCC或者Al2O3或者如FR5的有机基底同样可以考虑使用。按照图1的实施方式例如通过一种填料是有取置能力的(pick & place-faehig)，这可以实现一种节约成本的装备。
如果芯片必须通过引线结合法来接触，那么芯片可以或者设置在背面或者也用一个安全罩安装在屏蔽薄膜5下边。
本发明所有的实施方式说明了以下优点：
-超高频能力(＞20GHz)，因为没有不充满的(在所述凸缘之间ε＝1)、短的、恒定长度的信号传输时间(倒装芯片代替引线结合器)，
-密封的密封性和ESD-屏蔽在制造成本非常小的情况下使用，
-元器件可以散热、例如通过运用冷却体，
-通用性：可以与HTCC-技术和LTCC-技术结合的不同的元器件载体和电路载体、SMD元器件也可以例如安装在电路载体背面上，
-易于与不同的包装类型匹配。

Claims (9)

1.一种方法，其中
-一个电路载体(3)与一个元器件(1)通过触点(2)相连，该触点将元器件(1)相对于电路载体(3)间隔开，
-一个薄膜(5)涂覆在元器件(1)和电路载体(3)上，
-薄膜(5)被金属喷镀。
2.按照权利要求1所述的方法，其中薄膜(5)的金属喷镀涂层(6)加强电流。
3.按照前述权利要求中任意一项所述的方法，其中在所述薄膜(5)中、在元器件(1)的背对电路载体(3)的侧面上打开一个窗口(7)。
4.按照前述权利要求中任意一项所述的方法，其中在电路载体(3)上安装一个接触元件(8，11)、特别是一个钎焊凸缘。
5.按照权利要求4所述的方法，其中在电路载体(3)的布置元器件(1)的侧面上设置一个接触元件(11)并且超出元器件(1)。
6.按照前述权利要求中任意一项所述的方法，其中元器件(1)是一个高频元器件、特别是一个超高频元器件。
7.按照前述权利要求中任意一项所述的方法，其中在电路载体(3)上设置一个无源的元器件(9)。
8.按照权利要求7所述的方法，其中无源的元器件(9)设置在电路载体(3)的与元器件(1)对置的侧面上。
9.按照权利要求1至8中任意一项所述的方法生产出来的高频包装。
CNB2004800008421A 2003-06-30 2004-06-29 节约成本的高频包装 Expired - Fee Related CN100382306C (zh)

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CN106816420A (zh) * 2015-11-30 2017-06-09 讯芯电子科技（中山）有限公司 一种声波元件封装结构及其制造方法

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WO2005001934A3 (de) 2005-05-12
EP1639642A2 (de) 2006-03-29
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WO2005001934A2 (de) 2005-01-06
CN100382306C (zh) 2008-04-16

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