CN1430274A - 用于隔离多孔低k介电薄膜的结构和方法 - Google Patents

用于隔离多孔低k介电薄膜的结构和方法 Download PDF

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CN1430274A
CN1430274A CN02160418A CN02160418A CN1430274A CN 1430274 A CN1430274 A CN 1430274A CN 02160418 A CN02160418 A CN 02160418A CN 02160418 A CN02160418 A CN 02160418A CN 1430274 A CN1430274 A CN 1430274A
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low
film
layer
dielectric layer
dielectric
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科特·G·斯坦纳
苏珊·维特卡瓦格
斯蒂夫·莱特尔
杰拉尔德·吉伯森
斯科特·詹森
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Agere Systems LLC
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Agere Systems LLC
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Abstract

一种薄膜结构,包括低k介电薄膜以及阻挡层薄膜、刻蚀中止薄膜和硬质掩模薄膜之类的N-H基源薄膜。在低k介电薄膜和邻近的N-H基薄膜之间插入抑制胺或其它N-H基从N-H基源薄膜向低k介电薄膜扩散的TEOS氧化物薄膜。由于在低k介电薄膜中没有基团中和化学增强抗蚀剂中的酸性催化剂,因此该薄膜结构可以采用DUV光刻和化学增强抗蚀剂制作图形。

Description

用于隔离多孔低K介电薄膜的结构和方法
                            相关申请
本申请要求2001年6月28日提交、名称为“Full via FirstIntegration Method of Manufacture”的美国临时申请60/301,295的优先权。
技术领域
本发明最一般涉及半导体器件及其制造方法。更特殊地,本发明提供一种防止基团(base groups)嵌入低K材料中并最终导致抗蚀剂不能溶解的方法和结构。
背景技术
深紫外线(DUV)光刻技术广泛用于制造先进的VLSI(超大规模集成)半导体器件。化学增强DUV抗蚀剂改善了光刻系统的性能并提高了器件特征分辨率。低介电常数(低K)电介质在今天的半导体制造工业受到欢迎,因为它们通过减少寄生电容、减少传播延迟以及因此提高器件速度而改善了性能。采用铜互连构造也有利于减小互连线的线电阻。典型的铜互连线路结合镶嵌制造技术(damascene manufacturingtechniques)以限定互连路线。双镶嵌方法受到欢迎是因为它提供更低成本的加工、改善的层到层取向容错度,因此可以应用更紧凑的设计规则并获得改善的性能。
与采用低K电介质以及铜互连线和DUV光刻技术中使用的化学增强抗蚀剂相关联的缺点是嵌入多孔低k介电材料中的基团与化学增强抗蚀剂中的酸性催化剂相互作用从而使曝光的抗蚀剂在显影剂中不能溶解。这种不受欢迎的剩余抗蚀剂使形成的图形变形并且难以去除。胺(amine)之类的基团或其它N-H基团的产生通常与传统硬质掩模薄膜、刻蚀中止层和薄膜叠层中所用的阻挡层相关,该薄膜叠层也包括低k介电薄膜并且便于用在双镶嵌加工中。刻蚀中止层和阻挡薄膜一般是含氮薄膜。
因此希望享受由铜互连技术、低k介电薄膜和DUV光刻系统中的化学增强抗蚀剂带来的好处,而不会由于基团与低k介电薄膜之间的相互作用而劣化化学增强抗蚀剂。
发明内容
本发明提供一种用于把低k介电层从含N-H基团的氮基层(nitrogen base layer)隔离开的结构和方法,该N-H基团能够从氮基层扩散并嵌入低k介电层中。本发明提供直接配置在低k介电层和氮基层之间的含氧层。
本发明也提供一种用于制作半导体产品的工艺,该工艺包括在衬底上制作至少一层低k介电薄膜、采用包含胺的源化学物质(sourcechemistry)在衬底上制作至少一层N-H基薄膜以及在至少一组相邻的低k介电薄膜和N-H基薄膜之间制作TEOS(原硅酸四乙酯)氧化物薄膜。
附图说明
在结合附图阅读时从下文的详细描述中最能够理解本发明。应强调的是,根据一般惯例,附图的各特征没有按比例画出。相反,为清晰起见各种特征的尺寸被随意扩大或缩小。在说明书和附图中相同的标号标记同一特征。附图中包括以下各图:
图1是表示根据现有技术薄膜叠层中形成的开口中不能溶解的抗蚀剂的截面图;
图2是表示根据本发明示例薄膜叠层的截面图;
图3是表示本发明示例子结构(substructure)的截面图;
图4是表示本发明的示例薄膜叠层中形成的开口内形成的抗蚀剂的截面图;
图5表示图4中对部分抗蚀剂显影后的结构;
图6是表示图4和5中所示薄膜叠层中形成的示例双镶嵌开口的截面图。
具体实施方式
本发明提供一种在一般用于双镶嵌、VLSI(超大规模集成)加工技术的薄膜叠层中使用低k介电薄膜的方法和结构。在各种示例实施方式中,薄膜叠层可包含硬质掩模薄膜、刻蚀中止薄膜和阻挡层薄膜。薄膜叠层可制作在导电互连引线或另一子结构上。刻蚀中止层、硬质掩模层和阻挡层分别是包含N-H基团的氮基层,该N-H基团能够从各层扩散。氮基层可以是含氮的薄膜,例如氮化硅(SiN)或掺氮的碳化硅(SiC-N)。用于制作这些氮化物和碳化物薄膜的典型沉积物质包含或产生氨NH3,氨很容易扩散进入或穿过低k介电材料。在薄膜制作化学中,硬掩模层可以是采用氮或含氮氧化物形成的氧化硅薄膜。硬质掩模、刻蚀中止层和阻挡层可以采用等离子体增强化学气相沉积(PECVD)技术制作,但也可使用其它替代方法。在采用PECVD的薄膜制作工艺中可以包括氨或其它含氮气体作为源气体。氨、各种胺和氨基硅烷之类的其它N-H基团可以用于薄膜形成化学中和/或可以是副产品。根据传统技术,这些物质可以在制作硬质掩模、刻蚀中止薄膜和阻挡层薄膜时扩散进入和穿过多孔低k电介质,或者在完成薄膜制作工艺后扩散进入多孔低k介电材料。一般来说,各种胺、氨基硅烷和在制作硬质掩模、刻蚀中止层和阻挡层薄膜时产生的其它N-H基团可扩散进入通常界定前述薄膜的低k介电薄膜。本发明直接在低k电介质和相邻的硬质掩模、刻蚀中止层、阻挡层或其它氮基薄膜之间提供含氧薄膜,例如TEOS氧化薄膜。含氧薄膜抑制N-H和其它基团扩散进入低k介电薄膜。
根据现有技术的传统结构,没有给出含氧的扩散抑制薄膜,N-H基或其它基的物质扩散进入并穿过通常多孔的低k介电材料。这些基物质可从低k介电材料扩散进入和低k介电层相接触的抗蚀剂材料。这在图1中现有技术的结构中进行了说明。
图1表示在薄膜叠层内形成的开口123的现有技术结构。薄膜叠层可以包含相对多孔的低k介电薄膜117和125。薄膜叠层也包含示例阻挡层111、示例刻蚀中止层129和示例硬质掩模层127。在示例实施方式中,阻挡层111、刻蚀中止层129和硬质掩模层127中的一个或多个可以是含氮薄膜之类的薄膜,采用氨或其它气体制作,在薄膜制作工艺中和/或在制作的薄膜中产生N-H基物质。根据示例实施方式,其中采用PECVD来制作薄膜,氨或其它含氮气体可包括在用来制作薄膜的等离子体化学物质的组份中。这样,在薄膜制作工艺中或在制作薄膜之后,各种胺、氨基硅烷和其它的N-H基团可以从阻挡层11、刻蚀中中层129和硬质掩模层127扩散进入低k介电薄膜117和125。这样的扩散在图1中由箭头110来标示。在这种情况下,N-H基团嵌入多孔低k介电层117和125之中。开口123包括低k介电材料暴露的侧壁137。
仍然参照图1中的现有技术结构,根据在VLSI加工中通常采用的双镶嵌加工方案,在形成开口123之后在薄膜叠层中形成其它镶嵌开口并在开口123上取向从而产生双镶嵌或二分层开口(two-tieredopening)。这样的开口最好通过在衬底上涂上一层DUV抗蚀剂薄膜然后对优选化学增强抗蚀剂部分曝光来形成。化学增强抗蚀剂在薄膜叠层上形成并填充开口123。传统的光学掩模161包括透明区153和不透明区113。采用DUV光刻,紫外光射过透明区153并按所希望的那样激活DUV中的酸性催化剂、化学增强的抗蚀剂130从而打破抗蚀剂结构中的键合,并且使抗蚀剂在显影剂中能够溶解。在光学掩模161的不透明区113下面的抗蚀剂130的部分135没有曝光因此不会在显影剂中溶解。需要采用紫外光使掩模113透明区153下面的整个抗蚀剂区能够在显影剂中借助于酸性催化剂激活而溶解。抗蚀剂130的部分141是这样的可溶解部分。在已有开口123上形成双镶嵌开口的实施例中,开口123内的抗蚀剂膜130所有部分都需要曝光和显影。然而,在抗蚀剂130的区167基团从从低k介电薄膜117和125经由137扩散进抗蚀剂130,如箭头151所示。这些胺、N-H基团与DUV抗蚀剂的酸性催化剂相互作用并中和酸性催化剂。因此在采用DUV光显影时被中和的酸性催化剂不会激活。这样,根据现有技术的传统方法,区167在显影剂中不能溶解并且保留下来,并且使图形变形。
图2表示根据本发明的示例叠层。子结构2包括表面4,在该表面上制作本发明的示例薄膜叠层。表面4可以是半导体衬底的表面或在例如衬底上形成的导电线之类构造的表面。图2包括低k介是薄膜18和42。可以采用PECVD或其它例如技术上可获得的制作低k介电薄膜的合适技术来制作示例低k介电薄膜18和42。低k介电薄膜的特征在于介电常数小于氧化硅的介电常数---典型为大约3.9-4.1。在示例实施例中,低k介电薄膜可以包括小于3.5的介电常数。低k介电薄膜需要是多孔的,因为引入介电常数大约1.0的真空会降低低k介电薄膜的总介电常数。在示例实施例中,低k介电薄膜可以是有机硅酸玻璃[organo-silicate-glass(OSG)]。根据示例实施例,低k介电材料可以是SiOC-H之类的多孔低k电介质,例如可以采用PECVD工艺由四甲烷环四硅氧烷(tetra-methyl-cyclo-tetra-siloxane)。根据其它实施例,可以采用可购得的OSG材料,如Black Diamond(Applied MaterialsCorporation),Coral(Novellus),FlowFill(Trikon)和Eage12(ASM)。这些低k介电材料只是作为示例,也可以根据其它示例实施方式采用其它低k介电薄膜。低k介电薄膜18和42的厚度将依据特定实施例而改变,在不同的示例实施例中的变化范围可以从1000到10000埃。也可以根据其它示例实施方式采用其它厚度。
图2所示薄膜结构只是作为示例,示例薄膜叠层适用于双镶嵌VLSI加工。根据该示例实施例,薄膜叠层包括势垒层6、刻蚀中止层30和硬质掩模层54。这些层中每一层都可能认为是“氮基层”,例如氮化硅薄膜、掺氮碳化硅薄膜或其它含氮薄膜。根据其它示例实施例,薄膜6、30和54可以是氮基薄膜,虽然不含作为所制作薄膜成分的氮,但在制作薄膜时可能采用含氮物质,例如胺、一氧化二氮或分子氮,因此作为薄膜制作工艺的副产品将会包含N-H或其它含氮基团。在示例实施例中,硬质掩模层54可以是在PECVD制作工艺中采用硅烷、一氧化氮和氮气制作的氧化硅薄膜。层6、30和54中的每一层都指定为氮基层并在其中包含能够从各层向外扩散的N-H基团。在示例实施例中这些薄膜可能分别采用PECVD技术制作并在等离子体化学中包含氨、NH3
在其它示例实例中,其中包含可扩散N-H基团的氮基层可以是其它示例薄膜的表面,例如采用氨或其它含氮化学物质处理的薄膜。
阻挡层6包括上表面8,刻蚀中止层30包括上表面32,硬质掩模层54包括上表面56。一般来说,如果不进行抑制,层6、30和5 4中的一层或所有层在制作薄膜期间或之后包括可从各层薄膜扩散到低k介电薄膜18或42中的胺或其它N-H基团。N-H基团嵌入多孔低k介电薄膜中。薄膜12、24、36和48抑制这种扩散并将这样的基团保持在层6、30和54各层之内。薄膜12、24、36和48是含氧薄膜。根据根据示例实施例,可以采用TEOS(原硅酸四乙酯)和氧对氧化层进行等离子体增强化学气相沉积来制作这样的含氧薄膜。采用这些成分的含氧薄膜在技术上通常称作TEOS薄膜或TEOS氧化薄膜。这样,采用原硅酸四乙酯和氧制作的含氧薄膜在下文中将称作TEOS薄膜。在示例实施例中,TEOS薄膜的厚度在50-100埃的薄膜内,但是在其它实施例中可以采用不同的其它厚度。根据其它实施例,含氧薄膜12、24、36和48可以采用其它合适的、在薄膜制作工艺中不产生胺、氨基硅烷或其它N-H基团的方法制作。根据其它实施例,可以采用TEOS薄膜之处的其它氮化物薄膜。根据示例实施例,含氧薄膜可以是掺氧碳化硅。含氧薄膜12包括上表面14。
图2所示结构只是作为示例,根据其它实施例,可以采用不同的许多其它低k介电薄膜和不同的其它氮基层或其它含基源薄膜。氮基层可以包括氮作为成分或N-H或其它薄膜制作期间产生的基团。氮基层可以用作硬质掩模薄膜、阻挡层薄膜、刻蚀中止层或其它具有电学或结构功能的薄膜。本发明的基本概念是每一组相邻的低k介电薄膜和氮基层由一层TEOS可其它含氧薄膜隔开,该含氧薄膜抑制基物质从含基源薄膜扩散到低k介电材料。TEOS或其它含薄膜便于直接制作在低k介电薄膜和含基源薄膜之间并形成邻接各层薄膜的边界。在另一示例实施例中,例如,氮基层可以是另一薄膜的表面,该薄膜在用含氨等离子体处理之后在表面上包含胺或其它N-H基团。
图3是其上制作本发明的薄膜叠层的示例子结构2的截面图。示例子结构2包括导电线5和绝缘材料58。导电线5可以由铜或其它合适的导电材料制成。表面4通常是平整的,在所示实施例中,导电线5从表面4向下延伸。可以采用包括化学机械抛光的镶嵌加工在通常平整的表面4内提供导电线5。绝缘材料58可以是低k电介质或其它介电材料。图3所示的子结构2只是作为示例,也可由其它子结构代替。如随后附图所示,图2中的示例薄膜叠层最好在导电线上面制作,因为可以穿过示例薄膜叠层形成开口接触下面的导电线。
图4是穿过图2所示示例薄膜叠层制作的开口60截面图。开口60从硬质掩模层54的上表面56向下延伸并穿过硬质掩模层54、含氧薄膜48、上低k介电薄膜42、含氧薄膜36、刻蚀中止层30、含氧薄膜24、下低k介电薄膜18,终止于含氧薄膜13。开口60包括作为含氧薄膜12上表面14一部分的底面62。阻挡层6可以制作在导电材料上将含氧层12从下面的导电线之间隔开,例如图3所示的导电线15。可以采用不同的合适方法例如等离子体刻蚀来制作开口60。在制作开口60之后,按所希望的那样,利用开口60作为双镶嵌或二分层开口的一部分来制作双镶嵌开口。这样,采用传统方法例如涂覆在结构上制作光敏薄膜64。光敏薄膜64制作在上表面56上并填充开口60。光敏薄膜64可以是可购得的抗蚀剂例如DUV抗蚀剂。在示例实施例中,光敏薄膜64可以是包含酸性催化剂的化学增强DUV抗蚀剂,在紫外光下曝光时酸性催化剂使抗蚀剂能在显影剂中溶解。在其它示例实施例中也可以采用其它光敏材料。在制作如图4所示的光敏薄膜64后,在光敏薄膜64中形成图形从而产生双镶嵌结构。
图5表示采用光学掩模68制作图形后图4中的结构。光学掩模68包括分别选择对曝光光敏薄膜64所用的光而言透明的和不透明的透明区70和不透明区72。用于曝光的光连同光敏薄膜一起选择。在示例实施例中,连同DUV抗蚀剂一起,可以采用紫外光。当DUV光源穿过光学掩模68中形成的透明图形对光敏薄膜64曝光时,光敏薄膜64的曝光部分应当变成可以在显影剂中溶解。当随后显影剂接触光敏薄膜64时,已经曝光并在显影剂溶解的区域通过显影除去,从而在光敏材料64中形成图形。采用刻蚀或其它技术可以在下层结构中制作基本相同的图形,例如在示例薄膜叠层中。图5表示光敏薄膜64的曝光区74。曝光区74在显影剂中溶解。由于本发明的含氧薄膜12、24、36和48,低k介电薄膜18和42没有N-H基团或其它含氮基团,例如胺或氨基硅酸。如果有这样的基团,它们会穿过侧壁76,与光敏薄膜64中的酸性催化剂相互作用,并且使应当曝光并在显影剂中溶解的光敏薄膜64部分不可溶解,如同图1所示现有技术结构。同样,含氧薄膜12的存在阻止N-H基团从阻挡层6扩散进光敏薄膜64。根据本发明,由于光敏薄膜64中的酸性催化剂没有与中和酸性催化剂并使之无效的基团杂化,光敏薄膜64的曝光区74向底面62延伸并基本上全部溶解于显影剂中。在通过紫外光曝光后,光敏薄膜64的曝光区74中的酸性催化剂使曝光区7溶解于显影剂中。在采用显影剂处理并除去曝光区74后,可以采用刻蚀工艺制作图6所示示例双镶嵌结构。
图6表示在对图5所示光敏薄膜64显影并刻蚀部分下层薄膜叠层之后的示例双镶嵌开口90。为了制作图6所示产的示例结构,可以采用各种合适的显影和刻蚀工艺步骤。在示例实施例中,当刻蚀中止层30露出后可以中止中间刻蚀步骤。图6包括双镶嵌90开口,它是包括顶部82和底部78的二分层开口。在示例实施例中,底部78的厚度80基本上与制作双镶嵌开口90的开口60的宽度相同。换句话说,在采用刻蚀工艺从图5所示结构制作双镶嵌开口90的过程中,示例底部78侧边刻蚀不严重。顶部82的宽度大于宽度80。顶部82延伸穿过硬质掩模层54、含氧薄膜48、上低k介电薄膜42、含氧薄膜36、刻蚀中止层30,并中止于含氧薄膜24露出的部分。因此顶部82包含由含氧薄膜24上表面26限定的底面。底部78延伸穿过含氧薄膜24和12、下低k介电薄膜18和阻挡层6。底部78延伸到底面63。图6所示结构只是作为示例,也可由其它双镶嵌结构代替。例如,双镶嵌或二分层开口可以包括具有大于示例的相对宽度的上部,并包括多于一个的、延伸到底面63的底部和在底部包括隔开两个或更多底部开口的柱体(pillar)或未刻蚀区。最后双镶嵌开口可以采用导电材料填充作为互连介质。在示例实施例中,双镶嵌开口中形成的互连介质可以用于过孔,将下层的导电构造连接到上层的导电构造。例如,底面63可以是下层导电线例如图3所示导电线5的上表面。根据其它示例实施例,互连介质可以用作其它功能。
本发明的基本概念可以制作任何不同的双镶嵌结构。尤其是,在制作例如图4所示的开口60之后,该开口延伸穿过低k介电薄膜或多个低k介电薄膜例如图4所示两层这样的薄膜,引入化学增强DUV抗蚀剂到该结构中,随后制作图形。本发明的一个优点是当这样的光敏材料引到该结构中时,胺或其它N-H基团不会嵌入低k介电薄膜中,因此不会从低k介电薄膜扩散进光敏薄膜,而使受影响的部分不能溶解于显影剂中。因此减轻了图形变形,并且不会导致难以除去抗蚀剂。
在上文中仅示例说明本发明的原理。因此发明人对本领域的技术人员能够设计出虽然没有在本文中明确描述或示出、但体现本发明的原理并包括在本发明的范围和精神中的各种配置。此外,希望本文中引用的所有实例和条件语言大体上只是用于教学目的,帮助理解本发明的原理和发明人对推动技术所贡献的概念,并且应解释为不是对这些特定引用的实例和条件进行限制。并且,希望本文中引用原理、特征和本发明实施例及其特定实例的所有叙述同时包含结构及其功能等价物。此外,希望这样的等价物包含目前已知的等价物和未来开发的等价物,即所开发出的执行相同功能的任何元件,而不考虑其结构。因此,希望本发明的范围不限于本文示出和描述的示例实施例。而应当是,本发明的范围和精神由所附权利要求来体现。

Claims (10)

1.一种半导体产品,包括:
低k介电层;
包含N-H基团的氮基层,N-H基团可从氮基层扩散;以及
直接插入在所述低k介电层和所述氮基层之间的含氧层。
2.如权利要求1所述的半导体产品,其中所述含氧层包括TEOS(原硅酸四乙酯)氧化物薄膜。
3.如权利要求2所述的半导体产品,其中所述氮基层包括氮化硅薄膜和掺氮碳化硅薄膜之一。
4.如权利要求1所述的半导体产品,其中所述含氧层包括掺氧碳化硅。
5.如权利要求1所述的半导体产品,其中所述半导体产品包括:
放置在阻挡层之上的下低k介电层;
放置在所述下低k介电层之上的刻蚀中止层;
放置在所述刻蚀中止层之上的上低k介电层;
放置在所述上低k介电层之上的硬质掩模层;
所述氮基层包括所述阻挡层,并且还包括由所述刻蚀中止层和所述硬质掩模层组成的其它氮基层,所述其它氮基层各自包含可从其扩散的N-H基团,以及
所述含氧层包括插入所述阻挡层和所述下低k介电层之间的TEOS氧化物层,并且还包括插入所述其它氮基层和所述邻近的低k介电层之间的其它TEOS层。
6.如权利要求1所述的半导体产品,其中所述低k介电层包括有机硅酸玻璃和SiOC-H之一。
7.一种半导体产品,包括:
在衬底上制作的阻挡层;
在所述阻挡层之上制作的下低k介电层;
在所述下低k介电层之上制作的刻蚀中止层;
在所述刻蚀中止层之上制作的上低k介电层;
放置在所述上低k介电层之上的硬质掩模层;以及
插入在所述下低k介电层和所述阻挡层之间、所述下低k介电层和所述刻蚀中止层之间、所述刻蚀中止层和所述上低k介电层之间和所述上低k介电层和所述硬质掩模之间至少其一的TEOS(原硅酸四乙酯)氧化物薄膜。
8.如权利要求7所述的半导体产品,其中制作延伸穿过所述硬质掩模层、所述上低k介电层、所述刻蚀中止层和所述下低k介电层的开口,还包括在所述开口内制作的DUV抗蚀剂。
9.一种用于制作半导体产品的工艺,包括:
在衬底上制作至少一层低k介电薄膜;
在所述衬底上采用包含氨的源化学物质制作至少一层N-H基源薄膜;以及
采用原硅酸四乙酯和氧直接在至少一组邻近的所述低k介电薄膜和所述N-H基源薄膜之间制作TEOS氧化物薄膜,从而形成薄膜叠层。
10.如权利要求9所述的工艺,还包括:
制作延伸穿过所述薄膜叠层的开口;
在所述开口中引入DUV抗蚀剂;
制作图形并刻蚀从而将所述开口转变成双镶嵌开口,并且
用导电材料填充所述双镶嵌开口。
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