CN1149642C - 在半导体基片上形成带图案导电层的方法和半导体器件 - Google Patents
在半导体基片上形成带图案导电层的方法和半导体器件 Download PDFInfo
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- CN1149642C CN1149642C CNB991106415A CN99110641A CN1149642C CN 1149642 C CN1149642 C CN 1149642C CN B991106415 A CNB991106415 A CN B991106415A CN 99110641 A CN99110641 A CN 99110641A CN 1149642 C CN1149642 C CN 1149642C
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- silicon oxynitride
- fsg film
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- conductive layer
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 102
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- Formation Of Insulating Films (AREA)
Abstract
提供半导体器件和在基片上形成构成图案的导电层的方法,以便防止氟物质从其上的氟硅玻璃层外流到上覆的光致抗蚀剂层,同时在光刻时抑制光波返回光致抗蚀剂层。在基片上依次涂敷导电层,介质衬垫,FSG层,防止氟物质穿过其中从FSG层外流并形成防反射涂层的氧氮化硅层,和光致抗蚀剂层。将后者曝光和显影以露出下伏的氧氮化硅层的图案部分。用单一蚀刻步骤去除暴露的氧氮化硅ARC层和FSG层及介质衬垫的相应的下伏部分以露出供金属化的导电层的图案部分。
Description
本发明涉及半导体器件,它包括金属间介质半导体制造中氟硅玻璃(FSG)薄膜的氧氮化硅盖层,更详细地说,涉及半导体基片上用氧氮化硅盖层覆盖的FSG薄膜的稳定的组合结构,以及涉及半导体器件制造方法,它包括在半导体基片上形成构成图案的导电层,同时,把FSG薄膜与氧氮化硅盖层组合,用作金属间介质。
当在例如硅的晶片基片上制造微电子半导体器件以形成集成电路时,按照选择的顺序在其上淀积各种金属层和绝缘层。所述绝缘层,例如,二氧化硅、氧氮化硅(SiOxNy)、也称为氟氧化硅的氟硅玻璃(FSG)、旋涂玻璃(SOG)等等,视情况而定,作为例如金属间介质(IMD)层的金属层之间的电绝缘、作为间隙填充层以实现晶片基片的平面化(层平面度)等等。通过诸如等离子体增强型化学汽相淀积(PECVD)、大气压力CVD等等传统的技术来淀积所述各个层。
通常,例如,设置在包含各种器件的基片上的第一层金属层通过一层或者多层绝缘层与其上的第二层金属层隔离。第二层金属层又可以通过一层或者多层其它绝缘层与其上的第三层金属层隔离,等等。这些金属层通过蚀刻在插入的各绝缘层中的金属化的通孔、小孔和空隙内连。
为此,重叠的各层经历光刻处理、以便在其上形成与集成电路(IC)一致的图案,例如形成通孔。用光致反应的聚合材料的光致抗蚀剂层覆盖晶片基片的顶层,以便借助于掩模形成图案。诸如可见光或者紫外光(UV)的光线通过掩模照射在光致抗蚀剂层上,以便按照掩模图案将它曝光。光致抗蚀剂层的聚合材料对光线是透明的、也是光致反应的,从而改变其化学性质,即,通过光激发反应,使得有可能将其构成图案。
通常,在晶片基片的顶部形成诸如有机防反射涂层的防反射涂层(ARC),例如,诸如聚酰亚胺的光吸收聚合物的防反射涂层,以便将返回光致抗蚀剂层的反射光减至最少,从而进行更均匀的处理。
所述光致抗蚀剂可以是负的或者正的类型。在负的光致抗蚀剂中,曝光的(聚合的)区域变成不溶解的,而未曝光的(未聚合的)区域溶解在后来加入的显影液中。在正光致抗蚀剂中,曝光的(降解的)可溶区域溶解在显影液中,而未曝光的(不溶解)的区域不变。在这两种情况下,保留在晶片基片上的光致抗蚀剂材料形成图案,以便在随后的蚀刻有关的各层时起掩模的作用。
在层的材料具有与相邻层的不同的物理和化学特性的地方,其蚀刻工艺也与相邻层的不同,例如,在各介质层中形成连接相邻层次的金属层的通孔时。所述蚀刻最好是与各向同性(在所有方向上同等地蚀刻暴露的表面)不同的的各向异性的(高速率的垂直方向蚀刻和低速率或者禁止的水平方向蚀刻),以便提供具有均匀的垂直壁几何形状或外形的蚀刻结构。可以根据待蚀刻的材料的物理和化学性质以及邻近的材料的物理和化学性质,通过湿蚀刻(溶解)或者干蚀刻(等离子体蚀刻或反应离子蚀刻)来实现蚀刻工艺。
为了使晶片基片上可利用区域中器件元件的集成度到达最大值,以便在同一区域中装入更多的元件,必须增进小型化。由于需要更加窄的金属线路和更加密的间隔尺寸以便实现元件的日益提高的密集封装,在所包含的微小公差下,它们变成更加容易损坏。当IC小型化增进到低于四分之一微米(0.25微米,即250纳米(nm)或2,500埃)的目前所谓超大规模集成电路(VLSI)时,这已经变得明显了。
比较起来,可见光具有400-700纳米(4000-7000埃)的波长谱,而紫外光具有100-400纳米(1000-4000埃)的波长谱。一般说来,中紫外(MUV)光具有大约365纳米波长,而远紫外(DUV)光具有大约248纳米或更短的波长。
在低于四分之一微米的尺寸下,所需要的与形成小孔或窗口的光刻相联系的高纵横比(深度对宽度)、精细的导电线路等等需要非常严格的公差,以防止不希望有的损坏,诸如密集地隔开的元件的可能引起短路的接触等等。
当来自辐射源的、把掩模做成图案的入射光穿过光致抗蚀剂层的光致反应聚合材料时,随着它在暴露的图案区域中引起光激发反应,它逐渐地被吸收。当到达ARC层的某些入射光线未被吸收,而是被反射和散射回到光致抗蚀剂层中时,就产生对入射光的干扰并且形成驻波。
与光致反应聚合材料不相容的污染物可能从ARC层或者其它邻近层迁移到光致抗蚀剂层中。这些污染物会使光致抗蚀剂层中毒,例如,与它进行干扰反应,由于与聚合材料的过量的化学互作用而在其中导致反应的不均匀性。这通常称为光致抗蚀剂中毒。
这些影响在使用正光致抗蚀剂的场合导致形成光致抗蚀剂底脚,而在使用负光致抗蚀剂的场合导致形成光致抗蚀剂收聚。具体地说,在显影时,光致抗蚀剂层的曝光的图案区域具有带不均匀(非垂直的)侧壁的光致抗蚀剂外形或结构。蚀刻之后,光致抗蚀剂底脚和光致抗蚀剂收聚问题导致光致抗蚀剂图案向下面一层或多层的不理想的转移,最终,由于与所需要的IC设计相比,蚀刻的结构不精确,从而限制了最小空间分辨率。
FSG(氟硅玻璃)是在半微米(0.5微米)以下半导体制造技术中用于金属间介质(IMD)应用场合的合适的弱介电材料之一,所述半微米(0.5微米)以下半导体制造技术与所谓线路运行(金属化和销售之间)后端之前的金属化技术相联系。为了淀积FSG,通常或者使用高密度等离子体(HDP)化学汽相淀积(CVD),或者使用等离子体增强化学汽相淀积(PECVD)。
随FSG薄膜中氟的浓度和用于淀积FSG薄膜的产物母体而定,可以实现的FSG的介电常数是3.3。较高的氟浓度通常提供较低的介电常数。但是,较高的氟浓度使薄膜不稳定,这是因为自由的氟往往的薄膜中扩散或者迁移到集成电路中相邻的层。
氟物质(包括氟本身和伴随的氟与其它污染产物母体成分的自生成污染化合物)从FSG向外扩散会产生聚集在与金属层的交界面的气泡,导致由腐蚀或中毒引起的金属剥落问题等等。在许多场合下,FSG的使用是与后等离子体处理相结合的,例如使用氧和氮或者一氧化二氮(N2O)的等离子体处理,或者包含二氧化硅盖层,以便把氟物质向外扩散减至最小。但是,包括氟本身的氟物质将深入地扩散到二氧化硅薄膜中,其扩散长度(渗透深度)可能超过几千埃。
虽然目前还不完全清楚,但是,人们相信,在基于二氧化硅的层的随后的淀积中,例如在存在氧、氮、一氧化二氮等等的情况下利用硅烷(SiH4)、借助PECVD技术的淀积中,诸如氢和氮的污染物仍然作为产物母体成分。在存在氟的情况下,人们认为,和附带的氢和/或氮和/或仍然作为污染的产物母体成分的其它物质一起形成其自生成的活性污染化合物。人们相信,氟和这种自生成的活性污染化合物向外扩散而聚集在邻近的金属层交界面,从而产生所述腐蚀、中毒金属剥落问题。
在说明书和权利要求书中所用的术语“氟物质”考虑的是既包含自由的氟本身又包含附带的、其与其它污染的产物母体成分、诸如氢和氮的自生成活性污染化合物(即,含氟的污染化合物)的含氟物质。
利用FSG作为IMD应用场合的弱介电材料的典型的半导体制造技术包括以下步骤:
(1)晶片基片上金属层的淀积和图案形成;
(2)所述金属层上二氧化硅衬垫的淀积;
(3)所述二氧化硅衬垫上FSG层的淀积;
(4)所述FSG层上二氧化硅盖层的淀积;
(5)所述二氧化硅盖层的化学机械抛光(CMP);
(6)在所述抛光后的二氧化硅盖层上的后CPM附加二氧化硅盖层淀积(或者后等离子体处理);
(7)在所述附加的二氧化硅盖层(或者等离子体处理层)上的有机ARC层淀积;
(8)在所述有机ARC层上的光致抗蚀剂层淀积以及光刻曝光和显影;
(9)有机ARC层开孔蚀刻;以及
(10)介质层接触蚀刻。
最好在半导体器件中具有这样的作为IMD的FSG结构,其中避免了氟物质的向外扩散,以便避免金属剥落问题,如果在基本上不增加制造成本的情况下做到这一点则更好。
根据本发明,通过在半导体器件中提供用于金属中间介质(IMD)应用场合的、与氧氮化硅(SiOxNy)盖层结合的氟硅玻璃(FSG)薄膜(层)系统来消除上述缺点。氧氮化硅盖层与FSG层的结合提高了FSG层的稳定性,同时为接触光刻处理提供均匀的反射控制。
根据本发明的一个方面,提供一种包括基片的半导体器件,所述基片具有例如大约1000-10000埃厚度的FSG层和在它上面的大约100-1000埃厚度的氧氮化硅盖层的组合。所述氧氮化硅层是以对所述FSG层的叠加覆盖的关系、以足以防止氟物质穿过其中从所述FSG层外流并且足以形成防反射涂层的形式设置的。以对所述氧氮化硅盖层的上覆的关系设置例如金属的、诸如铝、钨或铜的导电层。相对于下伏的FSG层和上覆的导电层,以足以防止氟物质穿过其中从FSG层外流到导电层的方式配置所述氧氮化硅盖层。
更详细地说,所述半导体器件包含基片,后者具有:在它上面的、例如,诸如铝、钨或铜的金属的构成图案的导电层;设置在所述构成图案的导电层上的介质衬层,例如,氧氮化硅的IMD衬垫;以及设置在所述介质衬垫上的FSG层和氧氮化硅盖层的组合,所述氧氮化硅盖层设置在所述FSG层的上面。在所述氧氮化硅盖层的上面设置与所述构成图案的导电层导电接触的、例如,诸如铝、钨或铜的金属的另一个导电层。在该组合中,相对于下面的FSG层和上面的另一个导电层,以足以防止氟物质穿过其中从FSG层外流到另一个导电层的方式配置所述氧氮化硅盖层。
根据本发明的另一个方面,提供一种在半导体基片上形成构成图案的导电层的方法。所述方法包括:在半导体基片的表面上形成例如铝、钨或铜的导电层;在所述导电层上形成例如二氧化硅的IMD衬垫的介质衬垫;在所述介质衬垫上形成FSG层;以及在所述FSG层的上面、以足以防止氟物质从该FSG层穿过其中外流并且足以形成防反射涂层(ARC)的形式形成氧氮化硅盖层。在所述氧氮化硅层上形成光致抗蚀剂层。对所述光致抗蚀剂层进行选择性的曝光和显影,以便露出下面的氧氮化硅层的选择性的图案部分。例如,为了金属化,去除所述氧氮化硅层的所述图案部分以及所述FSG和介质衬垫的相应的下面部分,以便暴露所述导电层的图案部分。
最好在诸如干式蚀刻步骤的蚀刻步骤中,例如,按照RIE(反应离子蚀刻)、在利用CF4(四氟化碳)和氩气的单一干式蚀刻步骤中通过接触蚀刻把氧氮化硅层的露出的图案部分以及FSG层和介质衬垫的相应的下面部分都一起去除。
为了隙缝填充、隔离和平面化的目的,最好在FSG层和氧氮化硅层之间形成厚度达20,000埃的介质盖层。最好在在其上形成氧氮化硅层之前,例如通过传统的化学机械抛光(CMP)对所述介质盖层进行抛光。通常,抛光后的介质盖层具有大约0-20,000埃的最后厚度。在所述蚀刻步骤中将所述氧氮化硅层的露出的图案部分和所述介质盖层、FSG层及介质衬垫的相应的下面部分一起全部去除是有利的。
通常,形成厚度为大约1,000-10,000埃的导电层;形成厚度为大约100-2,000埃的介质衬垫;形成厚度为大约1,000-10,000埃的FSG层;以及形成厚度为大约100-2,000埃的氧氮化硅层。
详细地说,所述氧氮化硅包括SiO0.5-1.5N0.1-1.5。
所述光致抗蚀剂层可以在波长为大约193-633纳米的光辐射(紫外和可见光)下曝光。在所述波长下,所述氧氮化硅层通常具有大约1.60-3.6的折射率以及大约0.01-2.0的消光系数。
根据最佳实施例,所述方法包括以下步骤:在半导体基片的表面上形成导电的金属层;在所述导电层上形成介质二氧化硅衬垫;在所述衬垫上形成FSG层;在所述FSG层上形成介质二氧化硅盖层;以及在所述介质盖层上并按照覆盖所述FSG层的方式、以足以防止氟物质从FSG层穿过其中外流并且足以形成ARC的形式形成氧氮化硅层。在所述氧氮化硅层上形成光致抗蚀剂层。进一步的步骤包括:对所述光致抗蚀剂层进行选择性的曝光和显影,以便露出下面的氧氮化硅层的选择性的图案部分;以及例如,为了金属化,以集中的方式,在单一蚀刻步骤中,将所述氧氮化硅层的所述图案部分和所述介质覆盖层、FSG层及介质衬垫的相应的下面部分一起去除,以便暴露所述导电层的图案部分。
详细地说,在在其上形成氧氮化硅层之前,通过CMP步骤,对介质盖层进行抛光。
根据本发明的最佳特征,提供一种在半导体制造中处理晶片基片的方法,用来防止氟物质从其上的FSG层外流到上覆的光致抗蚀剂层,同时用来在光致抗蚀剂层的光刻处理过程中抑制光波反射回到光致抗蚀剂层中,以便使光致抗蚀剂层的构成图案的曝光和显影的均匀度达到最大值。所述方法包括以足以形成用来防止所述氟物质外流的阻挡层、并且足以以对光致抗蚀剂层的下覆的关系形成用来抑制所述光波反射的介质ARC的方式在FSG层和光致抗蚀剂层之间插入氧氮化硅层。
本发明还考虑由此生产的产品。
从以下的详细描述,结合附图和权利要求书,将更加容易理解本发明。
图1A至1G是一系列纵向剖面图,它们举例说明根据先有技术在半导体基片上形成构成图案的导电层的各个阶段;以及
图2A至2F是一系列类似的纵向剖面图,它们举例说明根据本发明的实施例在半导体基片上形成构成图案的导电层的各个阶段;以及
图3是图2A至2F的半导体基片金属化之后的类似的纵向剖面图。
应当指出,所述附图不是按比例的,所显示的一些部分被放大了,使得所述附图更容易被理解。
现在参考图1A至1G,图中示出先有技术半导体器件或微型芯片20的各个制造阶段,微型芯片20以多样的形式具有:晶片基片21,金属导电层22,二氧化硅金属间介质衬垫23,介质FSG层24,FSG层抛光顶面24b,二氧化硅介质盖层25,二氧化硅介质盖层粗糙的顶面25a和抛光的顶面25b,附加的二氧化硅介质盖层26,有机ARC层27,例如正光致抗蚀剂材料的光致抗蚀剂层28,接触孔(小孔)29,加深和加宽的接触孔29a以及通孔(小孔)30。
图1A至1G举例说明利用FSG作为IMD材料在半导体基片上形成构成图案的导电层的典型的先有技术方法的十步骤序列。
图1A示出一种半导体器件或者微型芯片20,它具有晶片基片21,已经借助已知的PECVD技术顺序地在该晶片基片上淀积了:金属导电层22;用于金属层22的二氧化硅金属间介质衬垫23;作为用来把相邻的金属化层隔开的弱介电材料的FSG层24;以及用于介质FSG层24作为外形敷形覆盖和隔离材料的二氧化硅介质盖层25,用来逐步地填充不平整度和空隙,整平FSG层24的表面,并且部分地减少氟物质从FSG层24向外扩散(包括氟本身的向外扩散)。这时,起平面化层作用的二氧化硅盖层25具有粗糙的顶面25a。这是如下各步骤之后半导体器件20的状态:(1)在基片21上淀积金属层22并将它构成图案;(2)在金属层22上淀积二氧化硅衬垫23;(3)在二氧化硅衬垫23上淀积FSG层24;以及(4)FSG层24上淀积二氧化硅盖层25。
图1B示出以下情况下的半导体器件20:为了平面化的目的,去除二氧化硅盖层25的粗糙顶面25a和上层的一部分,以便在其上形成与FSG层24的、伴随地备有抛光的顶面24b的相邻的顶层齐平的抛光的顶面25b。这是如下步骤之后半导体器件20的状态:(5)二氧化硅盖层25的化学机械抛光(CMP)以及伴随的FSG层24的化学机械抛光(CMP)。
图1C示出具有在二氧化硅盖层25的相应的抛光的顶面25b上以及伴随地在FSG层24的抛光的顶面24b上的附加的后CMP二氧化硅介质盖层26的半导体器件20。这是如下步骤之后半导体器件20的状态:(6)在抛光的二氧化硅盖层25上以及伴随地在抛光的ARC层24上淀积后CPM附加二氧化硅盖层26。
图1D示出正好在光刻曝光之前的、具有在附加的二氧化硅盖层26上面的有机ARC层27以及在有机ARC层27上面的例如正光致抗蚀剂材料的光致抗蚀剂层28的半导体器件20。这是在步骤(7)在附加的后CMP二氧化硅盖层26上淀积有机ARC层27以及步骤(8)的第一部分、即在有机ARC层27上淀积光致抗蚀剂层28之后的半导体器件20的状态。
图1E示出在光致抗蚀剂层28借助构成图案的掩模(未示出)的光刻曝光和随后的按照已知方法的显影之后的半导体器件20。这是在步骤(8)的剩余部分,即光刻曝光和显影之后的半导体器件20的状态。
图1F示出首次蚀刻步骤之后的半导体器件20,蚀刻步骤中,有机ARC层27被开孔蚀刻,以形成接触孔29a。这是半导体器件20在有机ARC层27的开孔蚀刻步骤(9)之后的状态。
最后,图1G示出在第二次蚀刻步骤之后的半导体器件20。在第二次蚀刻步骤中,对附加的二氧化硅盖层26、二氧化硅25(如果有的话)、FSG层24以及二氧化硅衬垫23的邻近部分进行接触蚀刻,以便形成用来暴露出金属层22的、用于金属化和其它处理的通孔(小孔)30。这是在步骤(10)对邻近的介质层26、25(如果有的话)、24和23进行接触蚀刻之后的半导体器件20的状态。
利用传统技术进行以下工艺步骤:在晶片基片21上淀积金属层22、二氧化硅衬垫23、FSG层24和二氧化硅盖层25,然后对二氧化硅盖层25和FSG层24进行抛光处理,以及进一步淀积附加的二氧化硅盖层26、有机ARC层27和光致抗蚀剂层28。还利用传统技术进行以下工艺步骤:对光致抗蚀剂层28进行光刻曝光和显影;对有机ARC层27进行蚀刻;以及对附加的二氧化硅盖层26、二氧化硅盖层25(如果有的话)、FSG层24和二氧化硅衬垫23进行蚀刻,以便暴露金属层22。
除了用于防止氟物质从FSG层向外扩散的附加的二氧化硅盖层26和二氧化硅盖层25的不协调之外,必须设置作为分开的附加层的有机ARC层27,并且,上述十步先有技术方法需要两个分开的蚀刻步骤。这是因为不能用蚀刻基于二氧化硅的介质层26、25(存在时)、24和23所需要的接触蚀刻来蚀刻有机ARC层27。反之,不能用蚀刻有机ARC层27所需要的开孔蚀刻来蚀刻基于二氧化硅的介质层26、25(存在时)、24和23。正如下面所表明的,本发明的系统克服了这些先有技术缺点。
根据本发明,用于在半导体基片上形成构成图案的导电层的方法考虑以下的类似的八个步骤:
[1]在半导体基片的表面上形成金属导电层(金属淀积和图案形成);
[2]在所述金属导电层上形成二氧化硅介质衬垫;
[3]在所述二氧化硅介质衬垫上形成FSG层(氟硅玻璃);
[4]在所述FSG层上任选地形成二氧化硅介质盖层;
[5]对所述二氧化硅介质盖层、并且伴随着对所述FSG层的所述相邻的部分进行化学机械抛光;
[6]在所述抛光的二氧化硅盖层上,并且,伴随地在抛光的FSG层上,形成足以防止氟物质从所述FSG层穿过其中外流并且足以形成ARC(防反射涂层)的后CMP氧氮化硅盖层;
[7]在所述氧氮化硅层上形成光致抗蚀剂层,并且对所述光致抗蚀剂层进行选择性的光刻曝光和显影,以便露出所述下伏的氧氮化硅ARC层的选择性的图案部分;以及
[8]例如,通过在单一的干式蚀刻步骤中的接触蚀刻,去除所述氧氮化硅ARC层的露出的图案部分以及所述二氧化硅盖层(存在时)、所述FSG层和二氧化硅介质衬垫的相应的部分,以便暴露所述金属导电层的图案部分。
下面参考图2A至2F,图中示出根据本发明的实施例的半导体器件或微型芯片40的各制造阶段,所述半导体器件或微型芯片40以多样的形式具有:例如硅的晶片基片21’,例如金属的层导电层22’,例如二氧化硅的IMD(金属间介质)衬垫23’,介质FSG(氟硅玻璃)层24’,FSG层抛光顶面24b’,二氧化硅层盖层25’,二氧化硅盖层粗糙顶面25a’和抛光顶面25b’,介质氧氮化硅ARC盖层41,例如正光致抗蚀剂材料的光致抗蚀剂层42,接触孔(小孔)43,以及通孔(小孔)44。
在图2A至2F中,用加撇号(’)的标号表示的元件是与图1A至1G中的相同的元件。
图2A至2F举例说明用于利用FSG作为IMD材料在半导体基片上形成构成图案的导电层的方法的八步骤系列。
图2A示出一种半导体器件或者微型芯片40,它具有晶片基片21’,已经借助已知的PECVD技术顺序地在该晶片基片上淀积了:例如金属的导电层22’;用于金属层22’的例如二氧化硅的IMD(金属间介质)衬垫23’;作为用来把相邻的各金属化层隔开的弱介电材料的FSG层24’;以及用于介质FSG层24’作为外形敷形覆盖和隔离材料的二氧化硅盖层25’,用来逐步地填充不平整度和空隙,整平FSG层24’的表面,并且部分地减少氟物质从FSG层24’向外扩散。这时,起平面化层作用的二氧化硅盖层25’具有粗糙的顶面25a’。这是如下各步骤之后半导体器件40的状态:[1]在基片21上淀积金属层22并将它构成图案;[2]在金属层22上淀积二氧化硅衬垫23;[3]在二氧化硅衬垫23上淀积FSG层24;以及[4]在FSG层24上淀积起填充空隙和平面化作用的二氧化硅盖层25。
图2B示出以下情况下的半导体器件40:为了平面化的目的,去除二氧化硅盖层25’的粗糙顶面25a’和上层的一部分,以便在其上形成与伴随地备有抛光的顶面24b的FSG层24’的相邻的顶层齐平的抛光的顶面25b。这是如下步骤之后半导体器件40的状态:[5]对二氧化硅盖层25’,并且,伴随地对FSG层24’进行化学机械抛光(CMP)。
图2C示出具有在二氧化硅盖层25’的相应的抛光的顶面25b’上,并且,伴随地在FSG层24’的抛光的顶面24b’上的后CMP氧氮化硅ARC盖层41的半导体器件40,并且,所述后CMP氧氮化硅ARC盖层41足以(即,在厚度和密度上)防止氟物质从FSG层24’穿过其中外流和用于形成ARC。这是如下步骤之后半导体器件40的状态:[6]在抛光的二氧化硅盖层25’上以及伴随地在抛光的FSG层24’上淀积后CPM氧氮化硅ARC盖层41。
图2D示出正好在光刻曝光之前的、具有在氧氮化硅ARC盖层41上面的例如正光致抗蚀剂材料的光致抗蚀剂层42的半导体器件40。这是在步骤[7]的第一部分、即在氧氮化硅ARC盖层41上淀积光致抗蚀剂层42之后的半导体器件40的状态。
图2E示出在光致抗蚀剂层42借助构成图案的掩模(未示出)的光刻曝光和随后的按照已知方法的显影、以便形成接触孔(小孔)43之后的半导体器件40。这是在步骤[7]的剩余部分、即进行选择性的光刻曝光和显影,以便露出下伏的氧氮化硅ARC层41的选择性的图案部分。
最后,图2F示出在单一次蚀刻步骤之后的半导体器件40,在该蚀刻步骤中,对氧氮化硅ARC层41、二氧化硅盖层25’(如果有的话)、FSG层24’以及二氧化硅衬垫23’的邻近部分进行接触蚀刻,以便形成用来暴露出金属层22’的、用于金属化和其它处理的通孔(小孔)44。这是在如下步骤之后半导体器件40的状态:[8]对邻近的介质层41、25’(如果有的话)、24’和23’进行接触蚀刻,以便去除所述氧氮化硅ARC层41的露出的图案部分以及所述二氧化硅盖层25’(存在时)、FSG层24’和二氧化硅介质衬垫23’的相应的部分,以便暴露金属层22的图案部分。可以,例如按照RIE(反应离子蚀刻)、通过利用CF4(四氟化碳)和氩气的单一干式蚀刻步骤的接触蚀刻来实现以上步骤。
利用传统技术进行以下工艺步骤:在晶片基片21’上淀积金属层22’、二氧化硅衬垫23’、FSG层24’和二氧化硅盖层25’,然后对二氧化硅盖层25’和FSG层24’的伴随部分进行抛光处理,以及进一步淀积氧氮化硅ARC层41和有机光致抗蚀剂层42。还利用传统技术进行以下工艺步骤:对光致抗蚀剂层42进行光刻曝光和显影,然后,对介质氧氮化硅ARC层41、二氧化硅盖层25’(存在时)、FSG层24’和二氧化硅衬垫23’集中地进行蚀刻,以便暴露金属层22’。
详细地说,通常可以通过PECVD技术来形成金属层22’、二氧化硅衬垫23’、FSG层24’、二氧化硅盖层25’和氧氮化硅ARC层41。还可以通过HDP型CVD来形成FSG层24’。
最好形成厚度为大约1000-10000埃的金属层22’;形成厚度为大约100-2000埃的介质衬垫23’;形成厚度为大约1000-10000埃的FSG层24’;形成厚度最大为大约20000埃(即,大约0-20000埃)的二氧化硅盖层25’;以及形成厚度为大约100-2000埃的氧氮化硅层41。
光致抗蚀剂层42例如在大约193-633纳米波长的紫外或可见光的光辐射下曝光。在所述波长下,氧氮化硅层ARC层42最好具有大约1.60-3.6(实部)的折射率以及大约0.01-2.0(虚部)的消光系数。
下面将指出,由于与FSG相比氧氮化硅层具有较大的密度,所以,可以在FSG层24’上形成适当厚度的氧氮化硅ARC层41,以便抑制氟物质(包括氟本身以及其与其它污染产物母体成分形成的附带的自生成污染化合物)从FSG层24’向外扩散到与诸如在随后的金属化操作期间涂敷的各相邻的金属层。这将保证防止由于氟及其污染化合物集中、从FSG层24’向外扩散到相邻的金属界面并在那里起腐蚀或者中毒剂作用引起的金属层剥落。
这样,与二氧化硅相比,甚至在用于仅仅大约100-2000埃的层厚度时,氧氮化硅ARC层也能通过提供防止氟物质从下伏的FSG层外流的更好的防扩散阻挡层而提高了用于IMD用途的FSG层的稳定性。这是由于氧氮化硅是一种比FSG致密得多的材料这一事实。这有效地防止了由先有技术中遇到的氟物质泄漏产生的金属剥落问题、
它还固有地避免这种从中流出的氟物质到达光致抗蚀剂层并且使该层中毒。
此外,由于这里考虑的氧氮化硅吸收例如193-633纳米的所有有关波长的光线,在193-633纳米波长下具有1.6-3.6的折射率(实部)和0.01-2.0的消光系数(虚部),所以,它起一种用于光致抗蚀剂层42的有效的就地的ARC的作用。具体地说,它创立一种在高的高宽比(深度对宽度之比)下对IC设计图案区域的完全的和均匀的光刻曝光和显影,以便不产生光致抗蚀剂底脚和光致抗蚀剂收聚问题,即,在所述蚀刻区域中产生基本上直的垂直壁。
这样,氧氮化硅ARC层还同时实现对接触光刻处理的均匀的反射控制,因为,对于中紫外(MUV)(通常具有大约365纳米波长)和远紫外(DUV)(通常具有大约248纳米或更短的波长)光刻处理两者,它都是一种极好的防反射材料。
可以调节氧氮化硅成分,以便将其防反射特性最佳化,方法是:例如,按照利用硅烷(SiH4)与一氧化二氮(N2O)或者氧和氮的PECVD,适当地改变SiOxNy成分的组成比例,这里,X是0.5-1.5,而Y是0.1-1.5,即SiO0.5-1.5N0.1-1.5。更详细地说,氧氮化硅层包括SiO.5-1.5N0.1-1.5以及包含非晶硅相、氧化硅相和氮化硅相三相的防反射材料。
详细地说,晶片基片21’可以由硅制成,或者由诸如金属等其它材料制成。金属层22’通常由铝、钨或铜制成。二氧化硅衬垫23’作为金属层22’和FSG层24’之间的绝缘阻挡层。以普通的间隔材料的形式形成二氧化硅层25’,以便在诸如通过CMP对FSG层进行平面化抛光以提高FSG层24’的平面度之前提供厚度。这些材料是耐熔的,足以经受得住随后的在至少大约420℃的高温下进行的金属化和进一步处理。
如上所述,十步骤先有技术方法有以下缺点:利用附加的二氧化硅盖层26不足以抑制氟物质从FSG层24向外扩散;需要附加的有机ARC层27;以及需要两个互不兼容的蚀刻步骤,一个用于有机ARC层27,而另一个用于基于二氧化硅的各介质层26、25(存在时)、24和23。
由于氧氮化硅ARC层41是与二氧化硅盖层25’、FSG层24’以及二氧化硅层23’的介质材料类似的介质材料,所以,可以把所有这些层集中地在例如通过利用干式蚀刻步骤的接触蚀刻的单一蚀刻步骤中蚀刻,以便露出金属层22’。这样,由于可以利用与二氧化硅介质蚀刻类似的化学方法来蚀刻作为这种ARC的氧氮化硅ARC层41,所以,可以省略形成传统的ARC层的先有技术方法,能够利用不考虑ARC开孔蚀刻处理的单一步骤的接触蚀刻处理。
在根据本发明的上述八步骤方法和随后的金属化之后,所述晶片基片可以经历金属化和销售之间剩余的线路步骤的后端。
例如,图3示出剥去光致抗蚀剂层42(图2F),在氧氮化硅ARC层41上淀积另一层绝缘层45和在另一个绝缘层45上蚀刻沟槽46的半导体器件40。这继之以金属化步骤,以便在沟槽46中淀积通过通孔44与(第一层)导电层22’导电接触的,例如铝、钨或铜的,层厚度为大约1000-10000埃的另一层(第二层)导电层47。所有这些步骤都是利用传统技术进行的。应当指出,在另一层绝缘层45中形成的沟槽46和沿着沟槽46延伸的导电层47共同地在垂直于图3的纸平面的方向上延伸。
这样,根据本发明,FSG层24’和氧氮化硅ARC层41的组合提供一种具有用来防止氟物质从FSG层24’向外扩散到另一导电层47(图3)的结构的半导体器件40。同时,如以上联系图2A至2F所一般地描述的那样,FSG层24’和氧氮化硅ARC层41的组合形成用于半导体器件40的有效的四分之一微米以下光刻处理的就地的ARC结构。
因此,可以指出,所述具体的实施例仅仅是本发明的一般原理的例证。可以提供与所述原理一致的各种各样的修改。
Claims (23)
1.一种半导体器件,它包括具有氟硅玻璃层与在它上面的氧氮化硅盖层的组合的基片,所述氧氮化硅盖层是以对所述氟硅玻璃层的叠加覆盖的关系、以足以防止氟物质从所述氟硅玻璃层穿过其中外流并且足以形成防反射涂层的形式设置在所述氟硅玻璃层的上面的。
2.权利要求1的半导体器件,其特征在于:包括以对所述氧氮化硅盖层的上覆关系设置的导电层,所述氧氮化硅层是以相对于所述下伏的氟硅玻璃层和所述上覆的导电层、以足以防止氟物质穿过其中从所述氟硅玻璃层外流到所述导电层的方式配置的。
3.权利要求2的半导体器件,其特征在于:所述导电层是由金属制成的。
4.权利要求1的半导体器件,其特征在于:所述氟硅玻璃层具有1,000-10,000埃的厚度,所述氧氮化硅层具有100-2,000埃厚度,以及所述氧氮化硅包括SiO0.5-1.5N0.1-1.5。
5.一种包括基片的半导体器件,所述基片具有:
在它上面的构成图案的导电层;
设置在所述构成图案的导电层上面的介质衬垫;
设置在所述介质衬垫上的氟硅玻璃层和氧氮化硅盖层的组合,所述氧氮化硅盖层是以对所述氟硅玻璃层的叠加覆盖的关系设置的;以及
以对所述氧氮化硅盖层的上覆的关系设置与所述构成图案的导电层导电接触的另一个导电层;
相对于所述下伏的氟硅玻璃层和上覆的另一个导电层、以足以防止氟物质穿过其中从所述氟硅玻璃层外流到所述另一个导电层的方式配置所述氧氮化硅盖层。
6.权利要求5的半导体器件,其特征在于:所述构成图案的导电层和所述另一个导电层各自是由金属制成的。
7.权利要求5的半导体器件,其特征在于:所述氟硅玻璃层具有1,000-10,000埃的厚度,所述氧氮化硅层具有100-2,000埃厚度,以及所述氧氮化硅包括SiO0.5-1.5N0.1-1.5。
8.一种在半导体基片上形成构成图案的导电层的方法,所述方法包括以下步骤:
在半导体基片的表面上形成导电层;
在所述导电层上形成介质衬垫;
在所述介质衬垫上形成氟硅玻璃层;
在所述氟硅玻璃层的上面、以足以防止氟物质穿过其中从所述氟硅玻璃层外流并且足以形成防反射涂层的形式形成氧氮化硅层;
在所述氧氮化硅层上形成光致抗蚀剂层;
对所述光致抗蚀剂层进行选择性的曝光和显影,以便露出下伏的所述氧氮化硅层的选择性的图案部分;以及
去除所述氧氮化硅层的所述露出的图案部分以及所述氟硅玻璃层和介质衬垫的相应的下伏部分,以便暴露所述导电层的图案部分。
9.权利要求8的方法,其特征在于:所述介质衬垫是由二氧化硅制成的。
10.权利要求8的方法,其特征在于:把所述氧氮化硅层的所述露出的图案部分以及所述氟硅玻璃层和所述介质衬垫的相应的下伏部分全部在一个蚀刻步骤中一起去除。
11.权利要求8的方法,其特征在于:包括在所述氟硅玻璃层和所述氧氮化硅层之间形成介质盖层。
12.权利要求11的方法,其特征在于:所述介质盖层是由二氧化硅制成的。
13.权利要求11的方法,其特征在于:形成厚度最多20,000埃的所述介质盖层。
14.权利要求11的方法,其特征在于:在其上形成所述氧氮化硅层之前对所述介质盖层进行抛光。
15.权利要求14的方法,其特征在于:通过化学机械抛光步骤对所述介质盖层进行抛光。
16.权利要求15的方法,其特征在于:所述抛光后的介质盖层具有0-2000埃的厚度。
17.权利要求11的方法,其特征在于:将所述氧氮化硅层的所述露出的图案部分和所述介质盖层、氟硅玻璃层及介质衬垫的相应的下伏部分全部在一个蚀刻步骤中一起去除。
18.权利要求8的方法,其特征在于:形成厚度为1,000-10,000埃的所述导电层;形成厚度为100-2000埃的所述介质衬垫;形成厚度为1,000-10,000埃的所述氟硅玻璃层;以及形成厚度为100-2,000埃的所述氧氮化硅层;并且,所述氧氮化硅包括SiO0.5-1.5N0.1-1.5。
19.权利要求8的方法,其特征在于:所述光致抗蚀剂层在波长为193-633纳米的光辐射下曝光,并且,在所述波长下,所述氧氮化硅层通常具有1.60-3.6的折射率以及0.01-2.0的消光系数。
20.一种在半导体基片的表面上形成构成图案的导电金属层的方法,所述方法包括以下步骤:
在半导体基片的表面上形成导电的金属层;
在所述导电层上形成介质二氧化硅衬垫;
在所述介质衬垫上形成氟硅玻璃层;
在所述氟硅玻璃层上形成介质二氧化硅盖层;
在所述介质盖层上,并且以对所述氟硅玻璃层的上覆的关系、以足以防止氟物质从所述氟硅玻璃层穿过其中外流并且足以形成防反射涂层的形式形成氧氮化硅层;
在所述氧氮化硅层上形成光致抗蚀剂层;
对所述光致抗蚀剂层进行选择性的曝光和显影,以便露出下伏的氧氮化硅层的选择性的图案部分;以及
在单一蚀刻步骤中将所述氧氮化硅层的所述露出的图案部分和所述介质覆盖层、氟硅玻璃层及介质衬垫的相应的下伏部分去除,以便暴露所述导电层的图案部分。
21.权利要求20的方法,其特征在于:在介质盖层上形成所述氧氮化硅层之前,通过化学机械抛光步骤,对该介质盖层进行抛光。
22.一种在半导体制造中处理晶片基片的方法,所述方法包括:
在晶片基片上形成氟硅玻璃层;
在氟硅玻璃层上形成氧氮化硅层,从而形成足以用来防止所述氟物质外流的阻挡层;
在氧氮化硅层上形成光致抗蚀剂层;
其中所述氧氮化硅层形成用来防止所述氟物质外流的阻挡层并且形成用来抑制所述光波反射的介质防反射涂层,从而防止氟物质从其上的氟硅玻璃层外流到上覆的光致抗蚀剂层,同时用来在所述光致抗蚀剂层的光刻处理过程中抑制光波反射回到所述光致抗蚀剂层中,以便使所述光致抗蚀剂层的构成图案的曝光和显影的均匀度达到最大值。
23.权利要求22的方法,其特征在于:所述氧氮化硅包括SiO0.5-1.5N0.1-1.5。
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US9716035B2 (en) * | 2014-06-20 | 2017-07-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Combination interconnect structure and methods of forming same |
KR102531773B1 (ko) | 2022-04-21 | 2023-05-10 | 이진희 | 스위블조인트 조류퇴치장치 |
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DE69433244T2 (de) * | 1993-08-05 | 2004-07-29 | Matsushita Electric Industrial Co., Ltd., Kadoma | Herstellungsverfahren für Halbleiterbauelement mit Kondensator von hoher dielektrischer Konstante |
US5753975A (en) * | 1994-09-01 | 1998-05-19 | Kabushiki Kaisha Toshiba | Semiconductor device with improved adhesion between titanium-based metal wiring layer and insulation film |
US5741626A (en) * | 1996-04-15 | 1998-04-21 | Motorola, Inc. | Method for forming a dielectric tantalum nitride layer as an anti-reflective coating (ARC) |
US6157083A (en) * | 1996-06-03 | 2000-12-05 | Nec Corporation | Fluorine doping concentrations in a multi-structure semiconductor device |
US6083852A (en) * | 1997-05-07 | 2000-07-04 | Applied Materials, Inc. | Method for applying films using reduced deposition rates |
US6156149A (en) * | 1997-05-07 | 2000-12-05 | Applied Materials, Inc. | In situ deposition of a dielectric oxide layer and anti-reflective coating |
US6562544B1 (en) * | 1996-11-04 | 2003-05-13 | Applied Materials, Inc. | Method and apparatus for improving accuracy in photolithographic processing of substrates |
US5872065A (en) * | 1997-04-02 | 1999-02-16 | Applied Materials Inc. | Method for depositing low K SI-O-F films using SIF4 /oxygen chemistry |
US6103456A (en) * | 1998-07-22 | 2000-08-15 | Siemens Aktiengesellschaft | Prevention of photoresist poisoning from dielectric antireflective coating in semiconductor fabrication |
-
1998
- 1998-07-22 US US09/120,630 patent/US6300672B1/en not_active Expired - Lifetime
- 1998-12-01 US US09/204,031 patent/US6008120A/en not_active Expired - Lifetime
-
1999
- 1999-06-29 TW TW088110970A patent/TW434827B/zh not_active IP Right Cessation
- 1999-07-06 EP EP99113533A patent/EP0975017A3/en not_active Withdrawn
- 1999-07-19 JP JP11204940A patent/JP2000068267A/ja not_active Withdrawn
- 1999-07-21 KR KR1019990029468A patent/KR20000011863A/ko not_active Application Discontinuation
- 1999-07-22 CN CNB991106415A patent/CN1149642C/zh not_active Expired - Fee Related
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EP0975017A2 (en) | 2000-01-26 |
TW434827B (en) | 2001-05-16 |
JP2000068267A (ja) | 2000-03-03 |
CN1242595A (zh) | 2000-01-26 |
EP0975017A3 (en) | 2003-03-26 |
KR20000011863A (ko) | 2000-02-25 |
US6008120A (en) | 1999-12-28 |
US6300672B1 (en) | 2001-10-09 |
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