CN1430253A - 焊接方法以及焊接装置 - Google Patents

焊接方法以及焊接装置 Download PDF

Info

Publication number
CN1430253A
CN1430253A CN02160454A CN02160454A CN1430253A CN 1430253 A CN1430253 A CN 1430253A CN 02160454 A CN02160454 A CN 02160454A CN 02160454 A CN02160454 A CN 02160454A CN 1430253 A CN1430253 A CN 1430253A
Authority
CN
China
Prior art keywords
wire
instrument
lead
electrode
technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN02160454A
Other languages
English (en)
Inventor
三上邦光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN1430253A publication Critical patent/CN1430253A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004Wire welding
    • B23K20/005Capillary welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48617Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48624Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48638Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48647Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009Pre-treatment of the connector or the bonding area
    • H01L2224/8503Reshaping, e.g. forming the ball or the wedge of the wire connector
    • H01L2224/85035Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball"
    • H01L2224/85045Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball" using a corona discharge, e.g. electronic flame off [EFO]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

本发明提供一种焊接方法以及焊接装置。其目的是在提高半导体装置的可靠性的同时,可以进行保证恒定质量的焊接。引线(20)穿过第1工具(30)被送出到外部的引线(20)的前端部(22)成形为球状。通过第1工具(30)将前端部(22)焊接在第1电极(12)上。将引线(20)从第1工具(30)引出,通过第1工具(30)将引线(20)的一部(24)焊接在第2电极(16)上。由配置在第1工具(30)的上方的第2工具(32)夹持引线(20),让一部(24)残留在第2电极(16)上扯断引线(20)。在夹持引线(20)的状态下让第2工具(32)相对接近第1工具(30),将引线(20)从第1T具(30)送出到外部。

Description

焊接方法以及焊接装置
技术领域
本发明涉及一种焊接方法以及焊接装置。
背景技术
在半导体装置的制造中,进行将半导体芯片的焊盘和引脚电连接的引线焊接工艺。在该工艺中,从毛细管引出到外部的引线的前端部由焊炬形成球状,将该球焊接在焊盘上,引出该引线并焊接在引脚上。
然后,从毛细管将给定长度的引线引出到外部,然后将引线切断。详细讲,在将引线连接在引脚上的状态下,开放夹住引线的夹具,让夹具和毛细管同时上升,从毛细管将给定长度的引线引出到外部,然后将引线切断。
但是,依据该工艺,在上升过程中,毛细管和引线摩擦,有可能出现引线在达到给定长度之前就被切断的情况。这样,对于每次焊接工艺,焊炬与引线的前端部之间的距离都要改变,引线的前端部的球的大小不均匀,会出现不能保证焊接质量的情况。此外,这样的问题,例如在采用球块法形成凸块的工艺中也会产生。
发明内容
本发明的目的在于进行在提高半导体装置的可靠性的同时可以保证恒定的质量的焊接。
(1)有关本发明的焊接方法包括将从引线穿过的第1工具送出到外部的上述引线的前端部成形为球状的工艺、
由上述第1工具将上述前端部焊接在第1电极上的工艺、
从上述第1工具中引出上述引线、由上述第1工具将上述引线的一部焊接在第2电极上的工艺、
由配置在上述第1工具的上方的第2工具夹持上述引线、让上述一部残留在上述第2电极上的状态下扯断上述引线的工艺、
在夹持上述引线的状态下让上述第2工具相对接近上述第1工具、将上述引线从上述第1工具送出到外部的工艺。
依据本发明,在扯断引线之后,通过让第1和第2工具相对移动,将引线从第1工具中送出到外部。为此,即使引线在第1工具上摩擦,也可以将引线以恒定的长度确切地从第1工具送出到外部。即,在成形为球状的工艺中,可以每次将引线的前端部配置在确定的位置上。因此,可以让引线的前端部的球为恒定大小,提高了产品的可靠性并恒定保持其质量。
(2)在该焊接方法中,也可以重复上述各工艺,将多个上述第1电极以及多个上述第2电极采用上述引线电连接。
(3)在该焊接方法中,也可以是上述第1电极是半导体芯片的焊盘,上述第2电极是引脚片的内部引脚。
(4)在该焊接方法中,也可以是上述第1电极是引脚片的内部引脚,上述第2电极是半导体芯片的焊盘。
(5)有关本发明的焊接方法包括:
将从引线穿过的第1工具送出到外部的上述引线的前端部成形为球状的工艺、
由上述第1工具将上述前端部焊接在电极上的工艺、
由配置在上述第1工具的上方的第2工具夹持上述引线、让上述前端部残留在上述电极上的状态下扯断上述引线的工艺、
在夹持上述引线的状态下让上述第2工具相对接近上述第1工具、将上述引线从上述第1工具送出到外部的工艺。
依据本发明,在扯断引线之后,通过让第1和第2工具相对移动,将引线从第1工具中送出到外部。为此,即使引线在第1工具上摩擦,也可以将引线以一定的长度确切地从第1工具送出到外部。即,在成形为球状的工艺中,可以每次将引线的前端部配置在确定的位置上。因此,可以让引线的前端部的球为恒定大小,提高了产品的可靠性并恒定保持其质量。
(6)在该焊接方法中,也可以是利用残留在上述电极上的上述引线的上述前端部形成凸块。
(7)在该焊接方法中,也可以是上述电极是半导体晶圆的焊盘。
(8)在该焊接方法中,也可以是在扯断上述引线的工艺中,不将上述引线从上述第1工具引出到外部,在上述第1工具的端部附近进行扯断。
这样,由于可以在恒定位置上扯断引线,可以简单将恒定长度的引线从第1工具送出到外部。
(9)在该焊接方法中,也可以是在扯断上述引线的工艺中,通过让上述第1和第2工具同时上升,将上述引线扯断。
这样,可以简单扯断引线。
(10)在该焊接方法中,也可以是在送出上述引线的工艺中,通过让第2工具下降,将上述引线送出。
这样,可以简单将引线从第1工具送出到外部。
(11)有关本发明的焊接装置包括引线穿过的第1工具、配置在上述第1工具的上方、可以夹持上述引线、能相对于上述第1工具相对移动的第2工具,
在夹持上述引线的状态下通过让上述第2工具相对接近上述第1工具、将上述引线从上述第1工具送出到外部。
依据本发明,通过让第1和第2工具相对移动,将引线从第1工具中送出到外部。为此,即使引线在第1工具上摩擦,也可以将引线以恒定的长度确切地从第1工具送出到外部。这样,例如在成形为球状的工艺中,可以每次将引线的前端部配置在确定的位置上。因此,可以让引线的前端部的球为恒定大小,提高了产品的可靠性并恒定保持其质量。
(12)在该焊接装置中,也可以是将由上述第1工具送出到外部同时形成为球状的上述引线的前端部焊接在第1电极上,将上述引线从上述第1工具中引出,将上述引线的一部焊接在第2电极上,
由上述第2工具夹持上述引线,在让上述一部残留在上述第2电极上的状态下扯断上述引线。
(13)在该焊接装置中,也可以是多个上述第1电极以及多个上述第2电极采用上述引线电连接。
(14)在该焊接装置中,也可以是将由上述第1工具送出到外部同时形成为球状的上述引线的前端部焊接在电极上,
由上述第2工具夹持上述引线,在让上述前端部残留在上述电极上的状态下扯断上述引线。
(15)在该焊接装置中,也可以是利用残留在上述电极上的上述引线的上述前端部形成凸块。
(16)在该焊接装置中,也可以是利用第2工具,不将上述引线从上述第1工具引出到外部,在上述第1工具的端部附近进行扯断。
这样,由于可以在恒定位置上扯断引线,可以简单将恒定长度的引线从第1工具送出到外部。
(17)在该焊接装置中,也可以是通过让上述第1和第2工具同时上升,将上述引线扯断。
这样,可以简单扯断引线。
(18)在该焊接装置中,也可以是通过让第2工具下降,将上述引线送出。
这样,可以简单将引线从第1工具送出到外部。
附图说明
图1A~图1C是表示有关本发明第1实施方式的半导体装置的制造方法以及制造装置的图。
图2A以及图2B是表示有关本发明第1实施方式的半导体装置的制造方法以及制造装置的图。
图3是表示有关本发明第1实施方式的半导体装置的图。
图4A以及图4B是表示有关本发明第2实施方式的半导体装置的制造方法以及制造装置的图。
图5A以及图5B是表示有关本发明第2实施方式的半导体装置的制造方法以及制造装置的图。
图6是表示有关本发明第2实施方式的半导体装置的图。
图7是表示有关本发明实施方式的电子仪器的图。
图8是表示有关本发明实施方式的电子仪器的图。
具体实施方式
以下参照附图说明本发明的实施方式。本发明包括以下实施方式中的半导体装置的制造方法以及制造装置。但是,本发明并不限定于以下的实施方式,也可以适用于其它电子装置的制造方法以及制造装置。
(第1实施方式)
图1A~图2B是表示有关本发明第1实施方式的半导体装置的制造方法以及制造装置(又称为引线焊接方法以及引线焊接装置)的图。
首先,如图1A所示,准备形成了多个焊盘12的半导体芯片10和多个引脚14。
半导体芯片10具有形成了集成电路的面(能动面)。集成电路在成为直方体的半导体芯片10的最大面积的面上形成。焊盘12多在半导体芯片10的形成了集成电路的面的侧边上形成。焊盘12由铝系或者铜系金属形成,多在半导体芯片10上形成为平坦薄层。又,在半导体芯片10上,在焊盘12之外也形成钝化膜(图中未画出)。钝化膜,例如可以采用SiO2、SiN或者聚酰亚胺树脂等形成。
引脚14,如图1A所示,也可以不被其他部件支撑,而成为自由端。引脚14配置在半导体芯片10的外侧。引脚14也可以是引脚框(图中未画出)的一部分。详细讲,引脚14包括内部引脚16和外部引脚(图中未画出),内部引脚16面向半导体芯片10配置。
或者,引脚14也可以被支撑在图中未画出的衬底上。即,引脚14也可以是在衬底上形成的布线。布线包括与半导体芯片10的电连接部(例如连接盘)。半导体芯片10搭载在衬底中形成了布线的面上,电连接部配置在半导体芯片10的外侧。
在本实施方式中,上述半导体芯片10以及引脚14之间用引线20连接。详细讲,使用图1A所示的制造装置,对半导体芯片10的焊盘12和引脚14的内部引脚16进行引线焊接。
有关本实施方式的制造装置,包括第1和第2工具30、32。在本实施方式中,第1工具30为毛细管,第2工具32为夹具。第1和第2工具30、32可以在三维方向上移动。详细讲,第1和第2工具30、32在与半导体芯片10的焊接面(焊盘12形成的面)平行的面上沿相互垂直的XY轴(图1A的左右方向的轴以及与纸面垂直方向的轴)可以移动,在与焊接面垂直的Z轴(图1A上下方向的轴)可以移动。第1和第2工具30、32也可以沿XYZ轴整体移动(两者之间的距离保持恒定)。
第1工具30包括在其轴方向上引线20可以插通的导引部。在图1A所示的例中,导引部为孔。第1工具30的孔比引线20的线径大,引线20穿过该孔的内侧。又,第1工具30包括按压引线20的前端部22的按压部31。在图1A所示的例中,按压部31构成引线20穿通的孔的开口端部。此外,第1工具30由图中未画出的支撑体(例如超声波喇叭形)制成在图中未画出的制造装置的本体(引线焊接机)上。
第2工具32具有装载引线20的功能。详细讲,第2工具32固定引线20不让其在与半导体芯片10的焊接面垂直的Z轴上移动。在本实施方式中,第2工具32通过从引线20的两侧关闭夹持引线20。第2工具32配置在第1工具30的上方,即与第1工具30的按压部31相反侧上。第2工具32沿与半导体芯片10的焊接面垂直的轴可以相对于第1工具30移动。即,可以是只有第1工具30沿Z轴移动,也可以是只有第2工具32沿Z轴移动,或者也可以是第1和第2工具30、32以相互不同的方向以及速度沿Z轴移动。这时,第2工具32可以按关闭状态或者打开状态的任一个进行移动。
有关本实施方式的制造装置包括给引线20施加与半导体芯片10侧相反方向的拉力的第3工具34(例如空气拉力)。第3工具34配置在第2工具32的上方,即第2工具32中与第1工具30的相反侧上。第3工具34,如图1A所示,也可以具有由孔气向引线20施加拉力的功能。这样,容易控制焊接的重量,又,容易将引线20环绕成给定形状。或者,第3工具34也可以通过卷绕引线20施加拉力。第3工具34可以与第1和第2工具30、32一起沿XYZ轴移动,也可以只沿XY轴移动。
有关本实施方式的制造装置包括焊炬36。焊炬36让引线20中位于第1工具30的外部、即位于按压部31的下方的前端部22成为球状。焊炬36由放电能量或者气体火焰等热能将前端部22融化,形成为球状。此外,球状的前端部22只要是成为块状,其形状没有多大关系。
有关本实施方式的制造装置如上述那样构成,以下说明半导体装置的制造方法。此外,以下方法的特定事项包括从上述内容中可以适用于方法中的内容。
首先,如图1A所示,在半导体芯片10中形成了焊盘12的面一侧上配置第1工具30。在第1工具30中穿过引线20。引线20由金等导电材料形成。引线20的前端部22配置在第1工具30的外部。然后,在第1工具30的上方配置第2和第3工具32、34。第3工具34对引线20施加拉力。在本实施方式中,第3工具34与第1和第2工具30、32一起沿与半导体芯片10的焊接面平行的面上的XY轴移动。
然后,将引线20的前端部22成形为球状。如图1A所示,让焊炬36接近引线20的前端部22。当焊炬36为电焊炬时,通过高压放电,让引线20的前端部22溶化,成形为球状。这时,为了成形为恒定大小的球,优选焊炬36的前端部和引线20的前端部22之间的距离每次都相同。依据本实施方式,如后面所述,在成形为球状时,引线20的前端部22可以每次配置在相同的位置上。此外,在本工艺中,第2工具32,如图1A所示,可以是以开放状态让引线20开放,也可以是以关闭状态夹持引线20。
如图1B所示,将引线20的前端部22配置任一个焊盘12的上方,让第1工具30下降,由按压部31将前端部22按压在焊盘12上。在以恒定压力将前端部22按压在焊盘12上的期间,对其施加超声波或者热等。如图1B所示,第2工具32处于开放状态时,也可以让第1和第2工具30、32整体下降。当第2工具32处于关闭状态时,让按压部31接触在引线20的前端部22上,让第1工具30比第2工具32更下降。
如图1B所示,在本实施方式中,在半导体芯片10的焊盘12(第1电极)焊接,然后在引脚14的内部引脚16(第2电极)上焊接。
如图1B以及图1C所示,将第1工具30从焊盘12移动到内部引脚16上时,引线20在其前端部22焊接在焊盘12上的状态下向内部引脚16的方向引出。在引出引线20时,第2工具32处于开放状态,让引线20开放。第1~第3工具30、32、34也可以整体移动。引线20也可以成三维环状。然后,在内部引脚16上焊接引线20的一部24。详细讲,让第1工具30下降到内部引脚16上,由按压部31将引线20的一部24按压在内部引脚16上。在以一定的压力将引线20的一部24按压在内部引脚16上的期间,对其施加超声波或者热等。
然后,如图1C~图2B所示,进行扯断引线20的工艺、和将引线20从第1工具30送出到外部的工艺。
如图1C以及图2A所示,在焊接后,关闭第2工具32在夹持引线20的状态下让第2工具32上升。然后,留下焊接在内部引脚16上的一部24,扯断引线20。这时,如图2A所示,引线20也可以不从第1工具30引出到外部,在第1工具30的按压部31附近扯断。这样,可以在同样的位置上扯断引线20。因此,可以简单将恒定长度的引线20从第1工具30送出到外部。
如图2A所示,在扯断引线20的工艺中,第1和第2工具30、32也可以同时上升。这时,第1和第2工具30、32整体上升(让两者之间的距离保持一定的状态)。这样,可以整体控制第1和第2工具30、32,以简单的工艺就可以将引线20扯断。
然后,如图2A以及图2B所示,让第1和第2工具30、32上升后,在关闭第2工具32的状态下(夹持引线20的状态),让第2工具32相对接近第1工具30。这时,如图2A所示,可以让第2工具32下降。或者,也可以让第1工具30上升,或者让第1和第2工具30、32两者一方上升而另一方下降。然后,如图2B所示,引线20被送出到第1工具30的外部。当不将引线20从第1工具30引出到外部就进行扯断时,例如可以将与第2工具30下降的距离相同长度的引线20从第1工具30送出到外部。因此,可以正确设定引线20中从第1工具30送出到外部的这一部分的长度。
这样,如图2B所示,引线20的前端部可以从第1工具30送出到外部。第1和第2工具30、32之间的距离比将引线20的一部24焊接在内部引脚16上时要小。
需要引线焊接的1对焊盘12以及引脚14为多个时,针对多个焊盘12以及引脚14重复进行以上的工艺。即,图2B所示的从第1工具30送出到外部的引线20的前端部,如图1A所示,再次成形为球状后焊接在其它焊盘12上。这时,在下一引线焊接工艺中,将引线20再次从第1工具30送出到外部,在引线焊接开始时或者中途中,优选让第1和第2工具30、32相互相隔一定距离。
依据本实施方式,在扯断引线20之后,通过让第1和第2工具30、32相对移动,将引线20从第1工具30中送出到外部。为此,即使引线20在第1工具30上摩擦,可以将引线20以恒定的长度确切地从第1工具30送出到外部。即,在成形为球状的工艺中,可以每次将引线20的前端部22配置在确定的位置上。因此,可以让引线20的前端部22的球为恒定大小,提供一种提高了产品的可靠性并恒定保持质量的制造方法以及制造装置。
作为本实施方式的变形例,也可以先焊接引脚14的内部引脚16(第1电极),然后,焊接半导体芯片10的焊盘12(第2电极)。即,也可以将引线20的成形为球状的前端部22焊接在内部引脚16上。这时,在焊盘12上预先形成凸块,优选通过凸块将引线20的一部二次焊接。这样做,可以不损坏薄焊盘12,而将引线20和焊盘12进行电连接。此外,在本变形例中,可以达到上述效果。
图3表示使用上述方法制造的半导体装置的一例。在图3中,半导体装置被安装在电路板上。
半导体装置1包括半导体芯片10、引脚14、将半导体芯片10和引脚14电连接的引线20、至少密封半导体芯片10的密封部46。在图3所示的例中,半导体芯片10面朝上安装在芯片安装板40上。又,芯片安装板40中与半导体芯片10相反一侧设置散热片42。散热片42从密封部46中露出一部分,这样可以提高半导体芯片10的散热性能。引脚14包括内部引脚16和外部引脚18,外部引脚18在密封部46的外侧凸出,并弯曲成给定形状(图3中为海鸥展翅形状)。此外,优选在外部引脚18上采用电镀法设置焊料等金属皮膜44。
在图3中,半导体装置1安装在电路板50上。电路板50一般采用例如环氧树脂玻璃衬底等有机衬底。在电路板50上由铜等形成的布线图形52形成所要求的电路,将布线图形52与半导体装置的外部引脚18连接。又,在电路板50上,设置散热部件54,散热部件54与半导体装置的散热片42的露出面连接。这样,在半导体芯片10中所产生的热,可以通过散热片42,从散热部件54散出。
(第2实施方式)
图4A~图5B是表示有关本发明第2实施方式的半导体装置的制造方法以及制造装置(又称为凸块形成方法以及凸块形成用装置)的图。在本实施方式中,可以使用上述实施方式中说明的半导体装置的制造装置。此外,在本实施方式中,可以选择适用上述实施方式中说明的内容中的任一个。
首先,如图1A所示,准备好半导体晶圆60。半导体晶圆60包括形成了集成电路的面(能动面)。然后,在半导体晶圆60的形成了集成电路的面一侧上形成多个焊盘62。又,在半导体晶圆60上在焊盘62之外也可以形成钝化膜(图中未画出)。在本实施方式中,凸块形成过程在晶圆状态下一齐处理。或者,作为变形例,也可以在芯片状态下进行凸块形成处理。
首先,如图4A所示,在半导体晶圆60中形成了焊盘62的面的一侧配置第1工具30。在第1工具30中穿过引线20,引线20的前端部22配置在第1工具30的外部。在第1工具30的上方配置第2以及第3工具32、34。
第1到第3工具30、32、34的方式(包括移动方式),可以选择适用第1实施方式中说明的内容的任一个。
如图4A所示,引线20的前端部22成形为球状。成形为球状的方法可以适用上述内容。
然后,如图4B所示,让引线20的前端部22位于任一个焊盘62的上方,让第1工具30下降,由按压部31将前端部22按压在焊盘62上。在本实施方式中,在半导体晶圆60的多个焊盘62(电极)的每一个上形成有凸块64(参照图5A)。
然后,如图4B~图5B所示,进行扯断引线20的工艺、和将引线20从第1工具30送出到外部的工艺。
如图4B以及图5A所示,在焊接后,关闭第2工具32在夹持引线20的状态下让第2工具32上升。然后,留下焊接在焊盘62上的前端部22,扯断引线20。这时,如图5A所示,引线20也可以不从第1工具30引出到外部,在第1工具30的按压部3 1附近扯断。即,在从前端部22导引的颈部扯断引线20。因此,可以简单将恒定长度的引线20从第1工具30送出到外部。
如图5A所示,在扯断引线20的工艺中,第1和第2工具30、32也可以同时上升。这时,第1和第2工具30、32整体上升(让两者之间的距离保持恒定的状态)。这样,可以整体控制第1和第2工具30、32,以简单的工艺就可以将引线20扯断。
然后,如图5A以及图5B所示,让第1和第2工具30、32上升后,在关闭第2工具32的状态下(夹持引线20的状态),让第2工具32相对接近第1工具30。这时,如图5A所示,可以让第2工具32下降。或者,也可以让第1工具30上升,或者让第1和第2工具30、32两者一方上升而另一方下降。然后,如图5B所示,引线20从第1工具30送出到外部。当不将引线20从第1工具30引出到外部就进行扯断时,例如可以将与第2工具32下降的距离相同长度的引线20从第1工具30送出到外部。因此,可以正确设定引线20中从第1工具30送出到外部的这一部分的长度。
这样,如图5B所示,引线20的前端部可以从第1工具30送出到外部。第1和第2工具30、32之间的距离比将引线20的一部24焊接在内部引脚16上时要小。
需要形成凸块的焊盘62为多个时,针对多个焊盘62重复进行以上的工艺。这时,在下一凸块形成工艺中,将引线20再次从第1工具30送出到外部,在凸块形成工艺开始时或者中途中,优选让第1和第2工具30、32相互相隔一定距离。
根据需要,也可以对在半导体晶圆60上形成的多个凸块64进行平整。这样,可以减少凸块64的高度不均匀。然后,对半导体晶圆60进行切割工艺等给定工艺,对半导体晶圆60上的各个半导体芯片66进行个片化。
此外,在本实施方式中,也可以获得第1实施方式中说明的效果。
图6表示使用上述方法制造的半导体装置的一例。该半导体装置包括半导体芯片66、将半导体芯片66面朝下安装的衬底70。在半导体芯片66上形成多个焊盘62,在焊盘62上形成上述凸块64。在衬底70上形成布线图形72。半导体芯片66,也可以通过粘接材料,搭载在衬底70上。例如,作为粘接材料采用异方性导电材料74时,通过让粘接剂中的导电粒子76介入到凸块64和布线图形72之间,将半导体芯片66和布线图形72电连接。
在衬底70上设置多个外部端子78(例如焊锡球)。外部端子78与布线图形72电连接。例如,外部端子78通过在衬底70上形成的通孔(图中未画出),也可以设置在搭载半导体芯片66的面相反面上。
然后,作为包括适用了本发明的半导体装置的电子仪器,在图7中示出了笔记本型微机100,在图8中示出了手机电话200。
本发明并不限定于上述实施方式,可以进行各种变形。例如,本发明,包括与实施方式中所说明的构成实质上是相同的构成(例如,功能、方法和结果上相同的构成、或者目的和结果上相同的构成)。又,本发明包括将实施方式中所说明的构成中非本质性的部分替换后的构成。又,本发明包括与实施方式中所说明的构成具有相同作用效果的构成,或者可以达到同一目的的构成。又,本发明包括在实施方式中所说明的构成中添加了公知技术的构成。

Claims (21)

1.一种焊接方法,其特征在于:
包括:
将从引线穿过的第1工具送出到外部的所述引线的前端部成形为球状的工艺、
由所述第1工具将所述前端部焊接在第1电极上的工艺、
从所述第1工具中引出所述引线、由所述第1工具将所述引线的一部焊接在第2电极上的工艺、
由配置在所述第1工具的上方的第2工具夹持所述引线、让所述一部残留在所述第2电极上的状态下扯断所述引线的工艺、以及
在夹持所述引线的状态下让所述第2工具相对接近所述第1工具、将所述引线从所述第1工具送出到外部的工艺。
2.根据权利要求1所述的焊接方法,其特征在于:
重复所述各工艺,将多个所述第1电极以及多个所述第2电极采用所述引线电连接。
3.根据权利要求1或2所述的焊接方法,其特征在于:
所述第1电极是半导体芯片的焊盘,
所述第2电极是引脚片的内部引脚。
4.根据权利要求1或2所述的焊接方法,其特征在于:
所述第1电极是引脚片的内部引脚,
所述第2电极是半导体芯片的焊盘。
5.根据权利要求1或2所述的焊接方法,其特征在于:
在扯断所述引线的工艺中,不将所述引线从所述第1工具引出到外部,在所述第1工具的端部附近进行扯断。
6.根据权利要求1或2所述的焊接方法,其特征在于:
在扯断所述引线的工艺中,
通过使所述第1及第2工具同时上升,将所述引线扯断。
7.根据权利要求1或2所述的焊接方法,其特征在于:
在送出所述引线的工艺中,
通过使第2工具下降,将所述引线送出。
8.一种焊接方法,其特征在于:
包括:
将从引线穿过的第1工具送出到外部的所述引线的前端部成形为球状的工艺、
由所述第1工具将所述前端部焊接在电极上的工艺、
由配置在所述第1工具的上方的第2工具夹持所述引线、使所述前端部残留在所述电极上的状态下扯断所述引线的工艺、
在夹持所述引线的状态下使所述第2工具相对接近所述第1工具、将所述引线从所述第1工具送出到外部的工艺。
9.根据权利要求8所述的焊接方法,其特征在于:
利用残留在所述电极上的所述引线的所述前端部形成凸块。
10.根据权利要求8或9所述的焊接方法,其特征在于:
所述电极是半导体晶圆的焊盘。
11.根据权利要求8或9所述的焊接方法,其特征在于:
在扯断所述引线的工艺中,
不将所述引线从所述第1工具引出到外部,在所述第1工具的端部附近进行扯断。
12.根据权利要求8或9所述的焊接方法,其特征在于:
在扯断所述引线的工艺中,
通过使所述第1及第2工具同时上升,将所述引线扯断。
13.根据权利要求8或9所述的焊接方法,其特征在于:
在送出所述引线的工艺中,
通过使第2工具下降,将所述引线送出。
14.一种焊接装置,其特征在于:
包括:
引线穿过的第1工具、
配置在所述第1工具的上方、可以夹持所述引线、能相对于所述第1工具相对移动的第2工具,
在夹持所述引线的状态下通过使所述第2工具相对接近所述第1工具、将所述引线从所述第1工具送出到外部。
15.根据权利要求14所述的焊接装置,其特征在于:
将由所述第1工具送出到外部同时形成为球状的所述引线的前端部焊接在第1电极上,将所述引线从所述第1工具中引出,将所述引线的一部焊接在第2电极上,
由所述第2工具夹持所述引线,在使所述一部残留在所述第2电极上的状态下扯断所述引线。
16.根据权利要求14所述的焊接装置,其特征在于:
多个所述第1电极以及多个所述第2电极采用所述引线电连接。
17.根据权利要求14所述的焊接装置,其特征在于:
将由所述第1工具送出到外部同时形成为球状的所述引线的前端部焊接在电极上,
由所述第2工具夹持所述引线,在使所述前端部残留在所述电极上的状态下扯断所述引线。
18.根据权利要求17所述的焊接装置,其特征在于:
利用残留在所述电极上的所述引线的所述前端部形成凸块。
19.根据权利要求14~18中任一权利要求所述的焊接装置,其特征在于:
利用第2工具,不将所述引线从所述第1工具引出到外部,在所述第1工具的端部附近进行扯断。
20.根据权利要求14~18中任一权利要求所述的焊接装置,其特征在于:
通过使所述第1和第2工具同时上升,将所述引线扯断。
21.根据权利要求14~18中任一权利要求所述的焊接装置,其特征在于:
通过使所述第2工具下降,将所述引线送出。
CN02160454A 2001-12-28 2002-12-30 焊接方法以及焊接装置 Pending CN1430253A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001400234A JP2003197669A (ja) 2001-12-28 2001-12-28 ボンディング方法及びボンディング装置
JP2001400234 2001-12-28

Publications (1)

Publication Number Publication Date
CN1430253A true CN1430253A (zh) 2003-07-16

Family

ID=19189587

Family Applications (1)

Application Number Title Priority Date Filing Date
CN02160454A Pending CN1430253A (zh) 2001-12-28 2002-12-30 焊接方法以及焊接装置

Country Status (3)

Country Link
US (1) US20030162378A1 (zh)
JP (1) JP2003197669A (zh)
CN (1) CN1430253A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365785C (zh) * 2003-12-23 2008-01-30 三星电子株式会社 用于夹住引线的引线焊接设备和方法
CN101947858A (zh) * 2010-09-27 2011-01-19 苏州凯尔博精密机械有限公司 空调毛细管塑料焊接机

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101053079A (zh) 2004-11-03 2007-10-10 德塞拉股份有限公司 堆叠式封装的改进
US8058101B2 (en) 2005-12-23 2011-11-15 Tessera, Inc. Microelectronic packages and methods therefor
JP4679427B2 (ja) * 2006-04-24 2011-04-27 株式会社新川 ボンディング装置のテールワイヤ切断方法及びプログラム
US9159708B2 (en) 2010-07-19 2015-10-13 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
US8482111B2 (en) 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
KR101075241B1 (ko) 2010-11-15 2011-11-01 테세라, 인코포레이티드 유전체 부재에 단자를 구비하는 마이크로전자 패키지
US20120146206A1 (en) 2010-12-13 2012-06-14 Tessera Research Llc Pin attachment
KR101128063B1 (ko) 2011-05-03 2012-04-23 테세라, 인코포레이티드 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리
US8618659B2 (en) 2011-05-03 2013-12-31 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
KR101805118B1 (ko) * 2011-05-30 2017-12-05 엘지이노텍 주식회사 발광소자패키지
US8836136B2 (en) 2011-10-17 2014-09-16 Invensas Corporation Package-on-package assembly with wire bond vias
US8946757B2 (en) 2012-02-17 2015-02-03 Invensas Corporation Heat spreading substrate with embedded interconnects
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US8372741B1 (en) 2012-02-24 2013-02-12 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US8835228B2 (en) 2012-05-22 2014-09-16 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US9391008B2 (en) 2012-07-31 2016-07-12 Invensas Corporation Reconstituted wafer-level package DRAM
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US8975738B2 (en) 2012-11-12 2015-03-10 Invensas Corporation Structure for microelectronic packaging with terminals on dielectric mass
US8878353B2 (en) 2012-12-20 2014-11-04 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US9136254B2 (en) 2013-02-01 2015-09-15 Invensas Corporation Microelectronic package having wire bond vias and stiffening layer
US9034696B2 (en) 2013-07-15 2015-05-19 Invensas Corporation Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation
US9023691B2 (en) 2013-07-15 2015-05-05 Invensas Corporation Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation
US8883563B1 (en) 2013-07-15 2014-11-11 Invensas Corporation Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation
US9167710B2 (en) 2013-08-07 2015-10-20 Invensas Corporation Embedded packaging with preformed vias
US9685365B2 (en) 2013-08-08 2017-06-20 Invensas Corporation Method of forming a wire bond having a free end
US20150076714A1 (en) 2013-09-16 2015-03-19 Invensas Corporation Microelectronic element with bond elements to encapsulation surface
US9087815B2 (en) 2013-11-12 2015-07-21 Invensas Corporation Off substrate kinking of bond wire
US9082753B2 (en) 2013-11-12 2015-07-14 Invensas Corporation Severing bond wire by kinking and twisting
US9379074B2 (en) 2013-11-22 2016-06-28 Invensas Corporation Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
US9263394B2 (en) 2013-11-22 2016-02-16 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9583456B2 (en) 2013-11-22 2017-02-28 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US9214454B2 (en) 2014-03-31 2015-12-15 Invensas Corporation Batch process fabrication of package-on-package microelectronic assemblies
US10381326B2 (en) 2014-05-28 2019-08-13 Invensas Corporation Structure and method for integrated circuits packaging with increased density
US9646917B2 (en) 2014-05-29 2017-05-09 Invensas Corporation Low CTE component with wire bond interconnects
US9412714B2 (en) 2014-05-30 2016-08-09 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
CN105895543B (zh) * 2014-12-01 2019-09-13 恩智浦美国有限公司 接合引线进给系统及其方法
US9735084B2 (en) 2014-12-11 2017-08-15 Invensas Corporation Bond via array for thermal conductivity
US9888579B2 (en) 2015-03-05 2018-02-06 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
US9530749B2 (en) 2015-04-28 2016-12-27 Invensas Corporation Coupling of side surface contacts to a circuit platform
US9502372B1 (en) 2015-04-30 2016-11-22 Invensas Corporation Wafer-level packaging using wire bond wires in place of a redistribution layer
US9761554B2 (en) 2015-05-07 2017-09-12 Invensas Corporation Ball bonding metal wire bond wires to metal pads
US10490528B2 (en) 2015-10-12 2019-11-26 Invensas Corporation Embedded wire bond wires
US9490222B1 (en) 2015-10-12 2016-11-08 Invensas Corporation Wire bond wires for interference shielding
US10332854B2 (en) 2015-10-23 2019-06-25 Invensas Corporation Anchoring structure of fine pitch bva
US10181457B2 (en) 2015-10-26 2019-01-15 Invensas Corporation Microelectronic package for wafer-level chip scale packaging with fan-out
US9911718B2 (en) 2015-11-17 2018-03-06 Invensas Corporation ‘RDL-First’ packaged microelectronic device for a package-on-package device
US9659848B1 (en) 2015-11-18 2017-05-23 Invensas Corporation Stiffened wires for offset BVA
US9984992B2 (en) 2015-12-30 2018-05-29 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US9935075B2 (en) 2016-07-29 2018-04-03 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US10299368B2 (en) 2016-12-21 2019-05-21 Invensas Corporation Surface integrated waveguides and circuit structures therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365785C (zh) * 2003-12-23 2008-01-30 三星电子株式会社 用于夹住引线的引线焊接设备和方法
CN101947858A (zh) * 2010-09-27 2011-01-19 苏州凯尔博精密机械有限公司 空调毛细管塑料焊接机
CN101947858B (zh) * 2010-09-27 2013-02-27 苏州凯尔博精密机械有限公司 空调毛细管塑料焊接机

Also Published As

Publication number Publication date
US20030162378A1 (en) 2003-08-28
JP2003197669A (ja) 2003-07-11

Similar Documents

Publication Publication Date Title
CN1430253A (zh) 焊接方法以及焊接装置
CN1260797C (zh) 引线接合方法及引线接合装置
CN1280884C (zh) 半导体装置及其制造方法、电路板以及电子机器
CN1260795C (zh) 半导体装置及其制造方法、电路板以及电子机器
US6946380B2 (en) Method for forming bump, semiconductor element having bumps and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
CN1283004C (zh) 半导体装置及其制造方法、线路基板及电子机器
CN1161834C (zh) 半导体器件及其制造方法
JP5870200B2 (ja) 半導体装置の製造方法および半導体装置
CN1107349C (zh) 一种半导体器件引线框架及引线接合法
US9184117B2 (en) Stacked dual-chip packaging structure and preparation method thereof
US9793236B2 (en) Wire-bonding apparatus and method of manufacturing semiconductor device
US20020137327A1 (en) Semiconductor device and manufacturing method thereof.
CN1595646A (zh) 半导体器件
CN101060090A (zh) 半导体装置的制造方法
CN1536658A (zh) 半导体器件及其制造方法
CN1299518A (zh) 半导体封装及其倒装芯片接合法
CN1184678C (zh) 半导体器件及其制造方法、电路衬底及电子仪器
US20080197461A1 (en) Apparatus for wire bonding and integrated circuit chip package
JP4369401B2 (ja) ワイヤボンディング方法
CN1314119C (zh) 半导体装置及其制造方法、电路板和电子仪器
JPH11186315A (ja) ワイヤボンディング装置及びそれを用いた半導体装置の製造方法
CN1591863A (zh) 半导体器件、半导体组件及半导体器件的制造方法
TW201308458A (zh) 導線接合裝置及半導體裝置之製造方法
CN109962065A (zh) 一种声表器件的微型化多芯片封装结构
JP2008160149A (ja) 半導体装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication