CN1387699A - 用于改善锁相环锁定时间的滑动检测相位检测器和方法 - Google Patents
用于改善锁相环锁定时间的滑动检测相位检测器和方法 Download PDFInfo
- Publication number
- CN1387699A CN1387699A CN00815355.8A CN00815355A CN1387699A CN 1387699 A CN1387699 A CN 1387699A CN 00815355 A CN00815355 A CN 00815355A CN 1387699 A CN1387699 A CN 1387699A
- Authority
- CN
- China
- Prior art keywords
- signal
- frequency
- counter
- designated value
- rising
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 31
- 238000012856 packing Methods 0.000 claims description 33
- 238000001514 detection method Methods 0.000 claims description 16
- 230000004044 response Effects 0.000 claims description 13
- 238000007689 inspection Methods 0.000 claims description 4
- 238000005096 rolling process Methods 0.000 claims description 4
- 230000000630 rising effect Effects 0.000 description 28
- 238000012360 testing method Methods 0.000 description 14
- 230000008859 change Effects 0.000 description 10
- 230000001413 cellular effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 230000001960 triggered effect Effects 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
- H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
- H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Description
Claims (35)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/432,897 | 1999-11-02 | ||
US09/432,897 US6265902B1 (en) | 1999-11-02 | 1999-11-02 | Slip-detecting phase detector and method for improving phase-lock loop lock time |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1387699A true CN1387699A (zh) | 2002-12-25 |
CN1191682C CN1191682C (zh) | 2005-03-02 |
Family
ID=23718025
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN00815355.8A Expired - Fee Related CN1191682C (zh) | 1999-11-02 | 2000-10-12 | 用于改善锁相环锁定时间的滑动检测相位检测器和方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US6265902B1 (zh) |
EP (1) | EP1228632B1 (zh) |
JP (1) | JP2003517757A (zh) |
CN (1) | CN1191682C (zh) |
AT (1) | ATE248481T1 (zh) |
AU (1) | AU1197301A (zh) |
DE (1) | DE60004875D1 (zh) |
WO (1) | WO2001033828A2 (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101572542A (zh) * | 2008-04-28 | 2009-11-04 | 汤姆森特许公司 | 用于定时恢复的循环滑移检测 |
CN101079627B (zh) * | 2006-08-14 | 2010-06-02 | 钰创科技股份有限公司 | 一种工作周期的修正电路 |
CN1956336B (zh) * | 2005-10-27 | 2010-12-08 | 联发科技股份有限公司 | 延迟锁定回路系统与相关方法 |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6798858B1 (en) * | 2000-02-04 | 2004-09-28 | International Business Machines Corporation | Lock detector for delay or phase locked loops |
CN1196317C (zh) * | 2000-09-04 | 2005-04-06 | 兄弟工业株式会社 | 范围指定装置及范围指定方法 |
US7003065B2 (en) * | 2001-03-09 | 2006-02-21 | Ericsson Inc. | PLL cycle slip detection |
US6441691B1 (en) * | 2001-03-09 | 2002-08-27 | Ericsson Inc. | PLL cycle slip compensation |
EP1401286A4 (en) | 2001-05-18 | 2004-07-28 | Global Protein Products | METHOD FOR INHIBITING MUSHROOM GROWTH |
FI114886B (fi) * | 2001-06-29 | 2005-01-14 | Nokia Corp | Menetelmä ja laite taajuussyntetisaattorin tehokkuuden parantamiseksi |
US7068726B1 (en) * | 2001-08-30 | 2006-06-27 | 3Com Corporation | Near end cross-talk and echo avoider for bi-directional digital communications |
DE60316041T2 (de) | 2003-03-11 | 2008-06-05 | Fujitsu Ltd., Kawasaki | Phasenregelkreisschaltung |
GB2400760B (en) * | 2003-04-14 | 2005-12-21 | Wolfson Ltd | Improved phase/frequency detector and phase lock loop circuit |
US7567642B2 (en) * | 2003-12-23 | 2009-07-28 | Analog Devices, Inc. | Phase detector with extended linear operating range |
US7109760B1 (en) * | 2004-01-05 | 2006-09-19 | Integrated Device Technology, Inc. | Delay-locked loop (DLL) integrated circuits that support efficient phase locking of clock signals having non-unity duty cycles |
US7279938B1 (en) | 2004-01-05 | 2007-10-09 | Integrated Device Technology, Inc. | Delay chain integrated circuits having binary-weighted delay chain units with built-in phase comparators therein |
US7823447B2 (en) | 2007-09-17 | 2010-11-02 | Perkinelmer Las, Inc. | Method and apparatus for sensing a liquid level |
US7889012B2 (en) * | 2008-05-06 | 2011-02-15 | Hittite Microwave Corporation | System and method for cycle slip prevention in a frequency synthesizer |
US8166365B2 (en) | 2008-12-03 | 2012-04-24 | Ciena Corporation | Cycle slip location and correction |
US7940088B1 (en) * | 2009-03-31 | 2011-05-10 | Pmc-Sierra, Inc. | High speed phase frequency detector |
CN102468830B (zh) * | 2010-11-16 | 2016-01-20 | 北京中电华大电子设计有限责任公司 | 一种利用多相位信号提高频率比较器精度的方法和电路 |
US8502609B2 (en) | 2011-06-10 | 2013-08-06 | Broadcom Corporation | Reference-less frequency detector |
US9281828B2 (en) * | 2011-06-10 | 2016-03-08 | Broadcom Corporation | Reference-less voltage controlled oscillator (VCO) calibration |
US9014322B2 (en) | 2012-05-23 | 2015-04-21 | Finisar Corporation | Low power and compact area digital integrator for a digital phase detector |
US9413295B1 (en) | 2013-03-15 | 2016-08-09 | Gsi Technology, Inc. | Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features |
CN105262481B (zh) * | 2015-11-16 | 2018-10-16 | 西安紫光国芯半导体有限公司 | 提高输入时钟占空比免疫力的电路及方法 |
US10943648B1 (en) | 2016-12-06 | 2021-03-09 | Gsi Technology, Inc. | Ultra low VDD memory cell with ratioless write port |
US10860320B1 (en) | 2016-12-06 | 2020-12-08 | Gsi Technology, Inc. | Orthogonal data transposition system and method during data transfers to/from a processing array |
US10770133B1 (en) | 2016-12-06 | 2020-09-08 | Gsi Technology, Inc. | Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits |
US10847212B1 (en) | 2016-12-06 | 2020-11-24 | Gsi Technology, Inc. | Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers |
US10777262B1 (en) | 2016-12-06 | 2020-09-15 | Gsi Technology, Inc. | Read data processing circuits and methods associated memory cells |
US10854284B1 (en) | 2016-12-06 | 2020-12-01 | Gsi Technology, Inc. | Computational memory cell and processing array device with ratioless write port |
US10847213B1 (en) | 2016-12-06 | 2020-11-24 | Gsi Technology, Inc. | Write data processing circuits and methods associated with computational memory cells |
US10521229B2 (en) | 2016-12-06 | 2019-12-31 | Gsi Technology, Inc. | Computational memory cell and processing array device using memory cells |
US11227653B1 (en) | 2016-12-06 | 2022-01-18 | Gsi Technology, Inc. | Storage array circuits and methods for computational memory cells |
US10891076B1 (en) | 2016-12-06 | 2021-01-12 | Gsi Technology, Inc. | Results processing circuits and methods associated with computational memory cells |
US10998040B2 (en) | 2016-12-06 | 2021-05-04 | Gsi Technology, Inc. | Computational memory cell and processing array device using the memory cells for XOR and XNOR computations |
US10930341B1 (en) | 2019-06-18 | 2021-02-23 | Gsi Technology, Inc. | Processing array device that performs one cycle full adder operation and bit line read/write logic features |
US10877731B1 (en) | 2019-06-18 | 2020-12-29 | Gsi Technology, Inc. | Processing array device that performs one cycle full adder operation and bit line read/write logic features |
US10958272B2 (en) | 2019-06-18 | 2021-03-23 | Gsi Technology, Inc. | Computational memory cell and processing array device using complementary exclusive or memory cells |
US11133807B2 (en) | 2019-06-24 | 2021-09-28 | Texas Instruments Incorporated | Phase-locked loop slip detector |
US10892765B1 (en) | 2020-03-18 | 2021-01-12 | Aura Semiconductor Pvt. Ltd | Relocking a phase locked loop upon cycle slips between input and feedback clocks |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3723889A (en) | 1971-12-22 | 1973-03-27 | Bell Telephone Labor Inc | Phase and frequency comparator |
US4901026A (en) * | 1987-07-01 | 1990-02-13 | Rockwell International Corporation | Phase detector circuit having latched output characteristic |
US4902920A (en) | 1988-09-26 | 1990-02-20 | General Signal Corporation | Extended range phase detector |
JP2999508B2 (ja) * | 1990-04-18 | 2000-01-17 | パイオニア株式会社 | 時間軸誤差信号発生装置 |
US5180933A (en) * | 1991-11-26 | 1993-01-19 | Honeywell Inc. | Programmable digital out-of-lock detector |
US5293445A (en) * | 1992-05-29 | 1994-03-08 | Sgs-Thomson Microelecetronics, Inc. | AGC with non-linear gain for PLL circuits |
FR2703534A1 (fr) * | 1993-03-31 | 1994-10-07 | Cit Alcatel | Dispositif de contrôle numérique d'un oscillateur numérique variable. |
US5530383A (en) * | 1994-12-05 | 1996-06-25 | May; Michael R. | Method and apparatus for a frequency detection circuit for use in a phase locked loop |
JP3453006B2 (ja) * | 1995-07-07 | 2003-10-06 | パイオニア株式会社 | 位相同期回路及びディジタル信号再生装置 |
US5648744A (en) * | 1995-12-22 | 1997-07-15 | Microtune, Inc. | System and method for voltage controlled oscillator automatic band selection |
US5955928A (en) * | 1996-12-26 | 1999-09-21 | Micro Magic, Inc. | Automatically adjusting the dynamic range of the VCO in a PLL at start-up for optimal operating point |
-
1999
- 1999-11-02 US US09/432,897 patent/US6265902B1/en not_active Expired - Lifetime
-
2000
- 2000-10-12 WO PCT/US2000/028161 patent/WO2001033828A2/en active IP Right Grant
- 2000-10-12 DE DE60004875T patent/DE60004875D1/de not_active Expired - Lifetime
- 2000-10-12 CN CN00815355.8A patent/CN1191682C/zh not_active Expired - Fee Related
- 2000-10-12 EP EP00973470A patent/EP1228632B1/en not_active Expired - Lifetime
- 2000-10-12 JP JP2001534855A patent/JP2003517757A/ja not_active Withdrawn
- 2000-10-12 AT AT00973470T patent/ATE248481T1/de not_active IP Right Cessation
- 2000-10-13 AU AU11973/01A patent/AU1197301A/en not_active Abandoned
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1956336B (zh) * | 2005-10-27 | 2010-12-08 | 联发科技股份有限公司 | 延迟锁定回路系统与相关方法 |
CN101079627B (zh) * | 2006-08-14 | 2010-06-02 | 钰创科技股份有限公司 | 一种工作周期的修正电路 |
CN101572542A (zh) * | 2008-04-28 | 2009-11-04 | 汤姆森特许公司 | 用于定时恢复的循环滑移检测 |
CN101572542B (zh) * | 2008-04-28 | 2013-05-08 | 汤姆森特许公司 | 用于定时恢复的周跳检测方法和装置 |
Also Published As
Publication number | Publication date |
---|---|
CN1191682C (zh) | 2005-03-02 |
US6265902B1 (en) | 2001-07-24 |
EP1228632B1 (en) | 2003-08-27 |
DE60004875D1 (de) | 2003-10-02 |
EP1228632A2 (en) | 2002-08-07 |
JP2003517757A (ja) | 2003-05-27 |
AU1197301A (en) | 2001-05-14 |
WO2001033828A2 (en) | 2001-05-10 |
ATE248481T1 (de) | 2003-09-15 |
WO2001033828A3 (en) | 2002-02-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1191682C (zh) | 用于改善锁相环锁定时间的滑动检测相位检测器和方法 | |
US6621356B2 (en) | Phase-locked loop with short transient recovery duration and small interference signal component | |
CN1415137A (zh) | 用于扩频时钟系统的零延迟缓冲电路以及方法 | |
US7750618B1 (en) | System and method for testing a clock circuit | |
CN1172444C (zh) | 具有两个反馈环路的时钟倍增器 | |
EP2757692B1 (en) | Synthesizer with lock detector and method of operation thereof | |
CN101030779A (zh) | 延时锁定环电路 | |
US7084681B2 (en) | PLL lock detection circuit using edge detection and a state machine | |
CN102361456B (zh) | 一种时钟相位对齐调整电路 | |
CN1249551C (zh) | 时钟生成装置 | |
US7187217B2 (en) | Clock frequency divider and trigger signal generation circuit for same | |
CN102957422A (zh) | 一种数字延时锁定环电路 | |
CN1630197A (zh) | 可自动校正锁相回路频率范围的方法及相关的锁相回路 | |
US6646484B2 (en) | PLL circuit including a control logic circuit for adjusting the delay times of the clocks so that the phase error of the clocks is reduced | |
CN1126254C (zh) | 时钟发生电路以及时钟发生方法 | |
CN1940584A (zh) | 能够检测频率锁定的信息处理系统和方法 | |
JPH0255976B2 (zh) | ||
US20240195421A1 (en) | Clock signal noise reduction device and noise reduction method, and multi-phase delay phase-locked loop | |
CN1217486C (zh) | 相位比较电路 | |
CN1236239A (zh) | 数据传输设备 | |
EP0474616B1 (en) | Apparatus and method for variable ratio frequency division | |
US8406365B2 (en) | Frequency reacquisition in a clock and data recovery device | |
EP2288031A1 (en) | A frequency divider | |
US11228304B2 (en) | Method and apparatus for precision phase skew generation | |
US7263154B2 (en) | Method and apparatus for enabling fast clock phase locking in a phase-locked loop |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: CLUSTER CO., LTD. Free format text: FORMER OWNER: ERICSSON CO. Effective date: 20150421 Owner name: OPTIS WIRELESS TECHNOLOGY LLC Free format text: FORMER OWNER: CLUSTER CO., LTD. Effective date: 20150421 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150421 Address after: Texas, USA Patentee after: Telefonaktiebolaget LM Ericsson (publ) Address before: Delaware Patentee before: Clastres LLC Effective date of registration: 20150421 Address after: Delaware Patentee after: Clastres LLC Address before: North Carolina Patentee before: ERICSSON Inc. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050302 Termination date: 20171012 |
|
CF01 | Termination of patent right due to non-payment of annual fee |