CN1309066C - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1309066C
CN1309066C CNB031033504A CN03103350A CN1309066C CN 1309066 C CN1309066 C CN 1309066C CN B031033504 A CNB031033504 A CN B031033504A CN 03103350 A CN03103350 A CN 03103350A CN 1309066 C CN1309066 C CN 1309066C
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Prior art keywords
mentioned
semiconductor device
conductive plate
electrode
lead
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Expired - Fee Related
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CNB031033504A
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CN1441491A (zh
Inventor
青野勉
岡田喜久雄
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Publication of CN1441491A publication Critical patent/CN1441491A/zh
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Abstract

本发明涉及半导体装置。在已有的半导体装置中，因为为了向半导体器件表面的全部电极供给均等的电流，用引线接合法使导线与全部电极连接，所以存在着由于引线接合法引起的冲击对半导体器件产生恶劣影响的课题。在本发明的半导体装置中，具有使导电板(38，39)与半导体器件(32)表面的电极连接，通过导线(40，41)使导电板(38，39)与连接区域(36，37)电连接的构造。通过这样做，能够将导电板作为缓冲板在半导体器件(32)表面上不对导线(40，41)直接用引线接合法。结果，能够大幅度地减少由于引线接合法引起的冲击对半导体器件(32)的影响，从而能够提高制品品质的可靠性。

Description

半导体装置
技术领域
本发明涉及在内装用于电力的半导体器件的半导体装置中的外部电极上的配线安装构造及其制造方法。
背景技术
关于已有的用于电力的半导体装置，我们介绍，例如，日本平成5年公布的5-206449号专利公报中揭示的装置。如在上述公报中记载的那样，已有的用于电力的半导体装置为了能够适用于各种电流容量的用途准备了标准尺寸的开关元件芯片。而且，采用只将与用途的电流容量相称的个数的该开关元件芯片并联联结起来进行使用的方式。
下面，我们参照图12到图14，简单地说明关于用于电力的半导体装置的构造的一个例子。又，这里，我们舍弃对上述半导体装置的电路工作的说明。而且，图12是已有的半导体装置的平面图。图13是图12的A-A线方向的截面图，图14是图12的B-B线方向的截面图。
如图所示，例如，在由铜构成的矩形状的第1电极板1的周边上形成第2电极板3。第2电极板3具有，例如，通过氧化铝那样的绝缘板2载置的口字少一竖的形状。而且，在第1电极1的中央部分上形成第3电极板5。第3电极板5，例如，通过氧化铝那样的绝缘板4被载置，具有长方向与第2电极板3的大致平行的2条边大致平行的带状。进一步，在第1电极板1上形成离开第2电极板3和第3电极板5，并且包围第3电极板5那样地载置的缓冲板6。缓冲板6是由，例如，钼那样的热膨胀系数与半导体接近的金属材料构成的。
而且，分别将每3个并列地设置的矩形状的IGBT(Insulated-Gate-Bipolar-Transistor(绝缘栅双极晶体管))芯片7粘结在缓冲板6上。又，分别将邻接地配置的2个矩形状的二极管芯片8粘结在缓冲板6上的角部。IGBT芯片7具有一对主表面，分别地在一个主表面上设置收集极9，在另一个主表面上设置发射极10和栅极11。而且，将收集极9载置在缓冲板6的一侧。另一方面，二极管芯片8具有一对主表面，分别地在一个主表面上设置阳极12，在另一个主表面上设置阴极13。而且，将阴极13载置在缓冲板6的一侧。
而且，通过接合引线14使IGBT芯片7上的多个发射极10和第2电极板3之间电连接起来。又，通过接合引线14使IGBT芯片7的栅极11和第3电极板5之间电连接起来。又，通过接合引线15也使二极管芯片8的多个阳极12与第2电极板3之间电连接起来。此外，由焊料等的粘合层16，第1引出端子17，第2引出端子18，第3引出端子19等构成。这些引出端子既可以与电极板形成一体，也可以直接或间接地与其它准备好的各电极板粘合。
如上所述，在已有的半导体装置上，通过接合引线14使IGBT芯片7上的发射极10与第2电极板3之间连接起来。这时，在IGBT芯片7上形成多个发射极10，分别将接合引线14焊接在各个发射极10上。而且，对于二极管芯片8也同样地，在芯片8上形成多个阳极12。因此，分别将接合引线15焊接在各个阳极12上。又，通过变更在上述半导体装置中使用的IGBT芯片7和二极管芯片8的数目，能够发挥出各种不同的功能。
即，例如，在1块IGBT芯片7上，为了向发射极区域供给均等的电流，与发射极10数目相同的接合引线14是必需的材料。而且，进一步，必须进行只与接合引线14的数目相等的焊接。因此，存在着需要很长的焊接时间，使作业效率恶化不能够提高大量生产性那样的课题。
进一步，为了通过接合引线14使IGBT芯片7上的多个发射极10与第2电极板3连接起来，实施通过焊接机的热压接引线接合法，超声波引线接合法等。这时，必然在IGBT芯片7上加上振动，在芯片7上加上很大的应力。结果，存在着由于重复这种作业，在由硅氧化膜等构成的层间绝缘膜中引入裂纹那样的课题。
发明内容
本发明是鉴于上述已有的课题提出来的，作为本发明的半导体装置的特征是它具备具有至少一个主表面，并具有在上述主表面上从设置在绝缘层中的孔露出一部分的主电极的半导体器件，以覆盖上述主电极的方式通过焊料粘结在上述主表面上的导电板，和使上述导电板和设置在上述半导体器件外部的上述主电极的取出导电区域电连接的导线。
进一步，本发明的半导体装置的特征是优先地上述取出导电区域由一体的导电箔构成，与一端与上述导电板连接的多条上述导线的另一端连接。
又，为了解决上述的已有课题，本发明的半导体装置的特征是它具备具有至少一个主表面，在上述主表面上具有绝缘层，并具有从设置在上述绝缘层中的至少2个孔露出一部分的电流通过电极和控制电极的半导体器件，以覆盖上述电流通过电极上方的方式通过焊料粘结在上述主表面上的导电板，和使上述导电板和设置在上述半导体器件外部的上述电流通过电极的取出导电区域电连接的导线。
进一步，本发明的半导体装置的特征是优先地上述电流通过电极的取出导电区域由一体的导电箔构成，与一端与上述导电板连接的多条上述导线的另一端连接。
又，为了解决上述的已有课题，本发明的半导体装置的特征是它具备具有至少一个主表面，在上述主表面上具有绝缘层，并具有从设置在上述绝缘层中的多个孔分别露出一部分的多个电流通过电极和控制电极的半导体器件，多个分别覆盖上述电流通过电极和控制电极，通过焊料带状地粘结在上述主表面上的导电板，和分别使上述导电板的一端和设置在上述半导体器件外部的上述电流通过电极的取出导电区域或上述控制电极的取出区域电连接的导线。
进一步，本发明的半导体装置的特征是优先地上述电流通过电极和控制电极分别交互地露出那样地进行配置，粘结在上述电流通过电极和控制电极上的上述导电板大致平行那样地进行配置。
附图说明
图1是说明本发明的第1实施形态中的半导体装置的斜视图。
图2是用于本发明的第1实施形态中的半导体装置的半导体器件的平面图。
图3是本发明的第1实施形态中的图1所示的半导体装置的X-X线方向的截面图。
图4是说明本发明的第1实施形态中的特征部分的截面图。
图5是本发明的第1实施形态中的图1所示的半导体装置的Y-Y线方向的截面图。
图6是说明本发明的第1实施形态中的半导体装置的斜视图。
图7是用于本发明的第1实施形态中的半导体装置的半导体器件的平面图。
图8是说明本发明的第2实施形态中的半导体装置的斜视图。
图9是用于本发明的第2实施形态中的半导体装置的半导体器件的平面图。
图10是说明本发明的第3实施形态中的半导体装置的斜视图。
图11是用于本发明的第3实施形态中的半导体装置的半导体器件的平面图。
图12是说明已有的半导体装置的平面图。
图13是说明已有的半导体装置的截面图。
图14是说明已有的半导体装置的截面图。
具体实施方式
现在我们参照图1～图11说明作为本发明的半导体装置的实施形态，但是我们通过以下所述的3个实施形态说明本实施形态。
第1实施形态
首先，本发明的第1实施形态，例如，是用在主表面上交互地形成2个不同的电极的IGBT芯片的情形。图1是用于说明本发明的半导体装置的基本构造的斜视图，图2是图1所示的半导体器件表面的平面图，图3是图1所示的斜视图的X-X线方向的截面图，图4是粘结在电极上的导电板的截面图，图5是图1所示的斜视图的Y-Y线方向的截面图。
如图1所示，本发明的半导体装置主要是由绝缘基板31，在绝缘基板31上由用于粘结半导体器件32的导电箔构成的收集极用的粘结区域33，在粘结区域33的两侧由绝缘材料构成的1组台座34，35，在台座34，35上由导电箔构成的发射极和栅极用的连接区域36，37，在半导体器件32表面上形成的发射极用的导电板38和栅极用的导电板39，使发射极用的导电板38和栅极用的导电板39与连接区域36，37电连接起来的导线40，41，分别使连接区域36，37与外部导线连接的发射极端子42，分别使栅极端子43和粘结区域33与外部导线连接的收集极端子44构成的。
而且，下面，我们说明构成本发明的半导体装置的各构成要素。
首先，说明基片31。在本实施形态中，在基片31上，例如，安装具有电流密度300A/cm2等的特性的IGBT芯片那样的用于电力的半导体器件32。因此，考虑到从半导体器件32产生的热的散热性，用散热性优良的陶瓷基片作为基片31。而且，作为构成基片31的其它材料，也能够采用对AlN(氮化铝)或铜基片，铁基片，Fe-Ni基片等的合金表面进行绝缘处理后的金属基片。进一步，也能够用在上述金属基片表面上粘合陶瓷基片的基片。
其次，考虑到加工性，散热性等，设置在这个基片31上的台座34，35由陶瓷构成。而且，与半导体器件32的两侧相对地配置台座34，35，使台座34，35的表面处于比半导体器件32的表面高的位置那样地形成台座34，35。通过这样做，形成防止导线40，41在半导体器件32的边缘发生短路的构造。而且，在本实施形态中，与为了使在台座34上在半导体器件32表面上形成的发射极45(请参照图2)与外部装置电连接起来的发射极45对应的连接区域36是，例如，由铜箔形成的。另一方面，在台座35一侧，与台座34相同，形成与栅极46(请参照图2)对应的连接区域37。
而且，用于使与发射极45对应的连接区域36与外部端子连接的发射极端子42与连接区域36形成一体。另一方面，同样地，用于使与栅极46对应的连接区域37与外部端子连接的栅极端子43与连接区域37形成一体。
又，也存在着从半导体器件32的表面导出的导线40，41直接与模块等的外部导电体连接的情形。这时，省略了上述的台座34，35，连接区域36，37和端子42，43。又，也可以具有省略台座34，35自身，在绝缘基片31上形成连接区域36，37的构造。而且，不限定于半导体器件32粘结在绝缘基片31上的情形，即便在粘结在引线架，印刷电路基片上等的情形中也能够实现本发明中的外部配线构造。
其次，我们说明如图2所示的半导体器件32的表面构造。在半导体器件32的表面上形成绝缘层47，通过设置在这个绝缘层47上的孔48露出多个发射极45和栅极46。这时，设置在绝缘层47上的孔48大致在纸面左右方向具有1行地开口，而在纸面上下方向形成多个这样的孔48。而且，在纸面上下方向大致平行的位置上形成多个孔48，发射极45和栅极46交互地从孔48露出来。又，图中未画出，但是在发射极45和栅极46的下部区域中形成例如硅氧化膜作为层间绝缘膜。
其次，如图3所示，在本发明的半导体装置中，具有例如，通过焊料49(请参照图4)将由铜或铜合金构成的导电板38，39粘结在从半导体器件32表面的绝缘层47露出的发射极45和栅极46上的特征。对于1个发射极45或栅极46用1块导电板38，39。
具体地说，如图1所示，导电板38，39形成能够大致完全覆盖从孔48露出的各个发射极45和栅极46的大小，或者将它们收藏在孔48内的大小。通过焊料49将这些导电板38，39与从设置在半导体器件32表面的绝缘层47中的孔48露出的发射极45和栅极46粘结起来。这时，绝缘层47由没有焊料沾润性的材料构成。因此，如图4所示，作为粘结材料的焊料通过由焊料表面张力引起的自调整性效果能够确实地将发射极45和栅极46与导电板38，39粘结起来。又，如上所述，通过导电板38，39和露出电极的大小关系，用焊料将导电板38，39在它的大致全部连接区域中确实地与电极45，46固定在一起。通过这样做，在本实施形态中，在半导体器件32的表面上在纸面上下方向大致等间隔地并大致平行地配置10行导电板38，39。
结果，与邻接的发射极45和栅极46对应的导电板38，39具有直线性，并且，通过利用由焊料的表面张力引起的自调整性效果，能够实现不会相互接触发生短路的构造。又，当将导电板38，39粘结在发射极45和栅极46上时，通过利用焊料的自调整性效果，能够使导电板38，39的粘结作业变得容易。
又，为了与使用的半导体器件32相应，并且应对与使用用途相应的电流容量，能够每次变更导电板38，39的宽度，厚度等的尺寸。
其次，如图1和图6所示，在本发明的半导体装置中，具有通过导线40，41将粘结在半导体器件32表面上的导电板38，39与连接区域36，37电连接起来的特征。而且，作为连接导线的方法具有下面说明的2个方法，我们说明由这些方法形成的构造。又，图6是用于说明本发明的半导体装置的基本构造的斜视图。
首先，作为第1构造是用例如金(Au)线和Al(铝)线作为导线40，41的情形。这种构造的特征是用引线接合法通过导线40，41将导电板38，39与连接区域36，37连接起来。而且，成为导线40，41在导电板38，39的端部进行连接的构造。这里，如上所述，因为通过焊料确实地粘结导电板38，39，所以能够作为1块导电板那样地分散每次由引线接合法引起的冲击。因此，在本发明中，不直接对半导体器件32的表面用引线接合法，也可以将导电板38，39用作缓冲板。结果，能够大幅度地减少给予半导体器件32的由引线接合法引起的冲击。而且，能够防止由于用引线接合法时的冲击在发射极45和栅极46的下部区域上形成的层间绝缘膜中引入裂纹。又，在本实施形态中，导线40，41和导电板38，39具有导线40，41在导电板38，39的端部进行连接的构造，但是不一定要限定于这种构造。即便在导线40，41在导电板38，39的任意位置进行连接的情形中，也能够得到与上述相同的效果。这里，导电板的端部是在导线与连接区域连接一侧的导电板的表面上，位于从孔露出的电极上的导电板的表面区域。
进一步，如上所述，在本发明的半导体装置中，导线40，41在导电板38，39的端部进行连接。而且，如上所述，导电板38，39通过焊料在大致全部区域中与露出的电极45，46粘结。通过这样做，能够实现可以向在半导体器件32表面上通过绝缘层47露出的电极45，46提供均等的电流的构造。例如，如图7所示，是电极45，46在半导体器件32的表面上以围棋棋盘目的状态一个一个地露出来的情形。即便在这种情形中，如图中的虚线和两点一划线所示，能够通过导电板38，39在纸面左右方向将每个发射极45或每个栅极46共同连接起来。而且，通过用导线40，41将导电板38，39与连接区域36，37连接起来，可以向各个电极45，46供给均等的电流。而且，也能够将用引线接合法的次数抑制到必须的最低限度的数目。结果，形成能够大幅度地缓冲由引线接合法引起的冲击。
进一步，在本发明的半导体装置中，如上所述，导电板38，39和连接区域36，37分别通过导线40，41连接起来。通过这样做，即便连接区域36，37和半导体器件32的粘结位置关系以及它们的高度关系相对于设计来说多少具有误差，因为导线40，41具有柔软性，延展性等，所以也能够灵活地应付该误差。结果，能够形成通过扩大台座34，35的厚度允许范围等提高半导体装置制造的作业性和大量生产性的构造。
进一步，在本发明的半导体装置中，将多个与发射极45对应的导电板38和与栅极46对应的导电板39安装在半导体器件32的表面上。而且，通过从各个导电板38，39将导线40，41鸟群状地取出到在半导体器件32两侧形成的连接区域36，37，能够简单地构成避免导线40，41密集的半导体装置的构造。
其次，作为第2构造是用例如铜线作为导线40，41的情形。这种构造的特征是通过焊料用导线40，41将导电板38，39与连接区域36，37连接起来。即，实现在半导体器件32的表面上完全不用引线接合法的构造。而且，在第2构造中，如图6所示，通过焊料用导线40，41将导电板38，39与发射极45和栅极46对应的连接区域36，37连接起来。而且，导线40，41的一端在导电板38，39的端部进行连接。这里，导电板38，39的端部与第1构造相同，但是也可以将导线40，41粘结在导电板38，39的任意位置上。而且，为了提高导线40，41与导电板38，39的连接性，在导线40，41和导电板38，39的粘结区域中预先实施例如，镀焊料，镀Au(金)，镀Ag(银)，镀铂(Pd)等。此外，不仅在粘结区域，而且也可以在导线40，41和导电板38，39的全体上实施上述镀敷。通过这种构造，在本发明中，因为在半导体器件32的表面上不用引线接合法，所以不会给予半导体器件32由引线接合法引起的冲击。结果，也不会在半导体器件32的电极45，46的下部区域上形成的层间绝缘膜中引入裂纹，从而能够提供制品品质的可靠性卓越的半导体装置。
又，因为能够与第1构造相同地得到利用导线40，41的柔软性，延展性等的效果等的其它效果，所以这里不再进行可以参照上述说明得到的说明。
最后，在基片31上，例如，形成与由铜箔构成的收集极对应的粘结区域33。而且，如上所述，在半导体器件32的里面形成收集极(图中未画出)，通过焊料使这个收集极与粘结区域33电连接。从粘结区域33，形成与粘结区域33成为一体的收集极端子44，通过这个收集极端子44与外部导线连接。
第2实施形态
其次，本发明的第2实施形态，例如，是用二极管芯片的情形。图8是用于说明本发明的半导体装置的基本构造的斜视图，图9是图8所示的半导体器件表面的平面图。又，在本实施形态的说明中，当与第1实施形态中说明的内容相同时参照第1实施形态中的说明，这里不再进行说明。
首先，如图8所示，本发明的半导体装置主要是由绝缘基板51，在绝缘基板51上与由用于粘结半导体器件52的导电箔构成的阴极对应的粘结区域53，在粘结区域53的两侧由绝缘材料构成的1组台座54，在台座54上与由导电箔构成的阳极对应的连接区域55，与在半导体器件52表面上形成的阳极对应的导电板56，使与阳极对应的导电板56与连接区域55电连接起来的导线57，分别使连接区域55与外部导线连接的阳极端子59，和使粘结区域53与外部导线连接的阴极端子62构成的。
下面，我们说明构成本发明的半导体装置的各构成要素。这里，关于绝缘基板51，粘结区域53，台座54，连接区域55，导线57，端子59，62，参照第1实施形态中的说明，这里不再进行说明。
如上所述，如图9所示，在本实施形态中，例如，是用二极管芯片作为半导体器件52。而且，在半导体器件52表面上形成绝缘层60，通过设置在这个绝缘层60中的孔61露出阳极58。另一方面，图中未画出，但是在半导体器件52的里面形成阴极，通过焊料与用于上述阴极的粘结区域53粘结。
如图8所示，例如，通过焊料将由铜或铜合金构成的导电板56粘结在这个阳极58的大致全部表面上。在本实施形态中，因为在半导体器件52表面上只形成1个电极，阳极58，所以具有与阳极58大致同等的粘结区域，或者，粘结着具有收入到孔61内那样大小的导电板56。而且，与第1实施形态相同，用引线接合法使导电板56和连接区域55与导线57电连接。作为导线57可以用例如Au线，铝线。这时，因为在半导体器件52一侧，在导电板56上与导线57连接，所以形成将导电板56用作缓冲板能够缓和由引线接合法引起的对半导体器件52的冲击的构造。由于具有这种构造产生的效果，又，由于用焊料粘结电极58和导电板56产生的效果与第1实施形态相同。因此，在本实施形态中，参照在第1实施形态中的说明，这里不再进行说明。
另一方面，如用第1实施形态中的图6说明的那样，也能够实现在用铜线作为导线57的半导体器件52表面上完全不用引线接合法的构造。关于在这种情形中的构造和效果也可以参照在第1实施形态中的说明，这里不再进行说明。
第3实施形态
其次，本发明的第3实施形态，例如，是用MOS晶体管的情形。图10是用于说明本发明的半导体装置的基本构造的斜视图，图11是图10所示的半导体器件表面的平面图。又，在本实施形态的说明中，当与第1实施形态中说明的内容相同时参照第1实施形态中的说明，这里不再进行说明。
首先，如图10所示，本发明的半导体装置主要是由绝缘基板71，在绝缘基板71上与由用于粘结半导体器件72的导电箔构成的漏极对应的粘结区域73，在粘结区域73的两侧由绝缘材料构成的1组用于源极的台座74，在台座74上与用于由导电箔构成的源极对应的连接区域75，与在半导体器件72表面上形成的用于源极的导电板76，使用于源极的导电板76与连接区域75电连接的导线77，使连接区域75与外部导线连接的源极端子81，和使栅极80与栅极端子82电连接的导线78构成的。
下面，我们说明构成本发明的半导体装置的各构成要素。这里，关于绝缘基板71，粘结区域73，台座74，连接区域75，导线77，78，端子81，82，83，参照第1实施形态中的说明，这里不再进行说明。
如上所述，如图10所示，在本实施形态中，例如，是用MOS晶体管作为半导体器件72。而且，在半导体器件72表面上形成绝缘层84，在这个绝缘层84中设置孔85，86。孔85用于源极79，例如，占据半导体器件72表面的大部分区域。又，孔86用于栅极80，例如，在半导体器件72表面的一部分中形成。而且，通过这些孔85，86露出源极79和栅极80。另一方面，图中未画出，但是在半导体器件72的里面形成漏极，通过焊料与用于上述漏极的粘结区域73粘结。
如图10所示，例如，通过焊料将由铜或铜合金构成的导电板76粘结在源极79的大致全部表面上。而且，在本实施形态中，不将导电板粘结在栅极80表面上，而是直接通过导线78使栅极80与栅极端子82连接起来。又，也可以形成与使用用途相应地将导电板粘结在栅极80表面上，使导电板与栅极端子82连接的构造。
而且，在半导体器件72表面上粘结着具有在源极79上与源极79大致同等的粘结区域，或者，具有收入到孔85内那样大小的导电板76。而且，与第1实施形态相同，用引线接合法使导电板76和连接区域75与导线77电连接。作为导线77，78可以用例如Au线，铝线。这时，因为在半导体器件72一侧，在导电板76上与导线77连接，所以形成将导电板76用作缓冲板能够缓和由引线接合法引起的对半导体器件72的冲击的构造。由于具有这种构造产生的效果，又，由于用焊料粘结电极79和导电板76产生的效果与第1实施形态相同。因此，在本实施形态中，参照在第1实施形态中的说明，这里不再进行说明。
另一方面，如用第1实施形态中的图6说明的那样，也能够实现在用铜线作为导线77的半导体器件72表面上完全不用引线接合法的构造。关于在这种情形中的构造和效果也可以参照在第1实施形态中的说明，这里不再进行说明。
又，在本发明的半导体装置中，不一定限定于上述实施形态，在需要具有表面电极构造的半导体装置的外部配线的情形中也能够得到同样的效果。此外，在不脱离本发明的要旨的范围内，可以进行种种的变更。
本发明的效果是
第一，如果根据本发明的半导体装置，则首先，通过设置在半导体器件表面的绝缘层中的孔露出电极。而且，具有通过焊料使导电板与露出的电极连接，当导线为例如金线，铝线时用引线接合法使连接区域与导电板连接起来的特征。通过这样做，能够将导电板用作缓冲板，能够实现在电极表面上不对导线直接用引线接合法的构造。结果，能够防止由于引线接合法引起的冲击在电极下部区域中形成的层间绝缘膜等中引入裂纹等，从而能够大幅度提高制品品质的可靠性。
第二，如果根据本发明的半导体装置，则首先，通过设置在半导体器件表面的绝缘层中的孔露出电极。而且，具有通过焊料使导电板与露出的电极连接，当导线为例如铜线时通过焊料使连接区域与导电板连接起来的特征。通过这样做，在半导体器件表面上能够完全不用引线接合法，从而能够消除由于引线接合法引起的对半导体器件的冲击。结果，能够防止在电极下部区域中形成的层间绝缘膜等中引入裂纹等，从而能够大幅度提高制品品质的可靠性。
第三，如果根据本发明的半导体装置，则通过设置在没有焊料沾润性的绝缘层中的孔露出电极。而且，因为通过焊料使电极与导电板连接，所以当将导电板粘结在电极上时，能够利用焊料的自调整性效果进行粘结。通过这样做，例如，在半导体器件表面上2个不同的电极交互地露出的情形中，能够实现在两者上的导电板不会相互接触发生短路的构造。又，能够利用焊料的自调整性效果，提高导电板的粘结位置精度和粘结作业性。
第四，如果根据本发明的半导体装置，则具有通过焊料使导电板与在半导体器件表面上通过绝缘层露出的电极连接，用导线使连接区域与导电板连接起来的特征。通过这样做，能够实现将在半导体器件上使用引线接合法抑制到必须的最低限度的构造。而且，通过在导电板上最低限度地使用引线接合法，能够将由于引线接合法引起的冲击对半导体器件的影响抑制到最小限度。结果，能够实现将一定形状的导电板粘结在电极上，将由必须的最低限度的引线接合法引起的对半导体器件的冲击产生的影响抑制到最小限度的构造。
第五，如果根据本发明的半导体装置，则具有通过焊料使导电板与在半导体器件表面上通过绝缘层露出的电极连接，用导线使连接区域与导电板连接起来的特征。通过这样做，即便粘结在电极上的导电板和连接区域的位置关系多少具有误差，由于导线的柔软性，延展性等，也能够灵活地应付该误差。结果，形成具有通过扩大台座厚度的允许范围等提高半导体装置的作业性和大量生产性的构造。

Claims (19)

1.半导体装置，其特征在于，具备：
具有至少一个主表面，并具有在上述主表面上从设置在绝缘层中的孔露出一部分的主电极的半导体器件，
以覆盖上述主电极的方式通过焊料粘结在上述主表面上的导电板，和
使上述导电板和设置在上述半导体器件外部的上述主电极的取出导电区域电连接的导线。
2.权利要求1记载的半导体装置，其特征在于，上述导线是铜线，通过焊料与上述导电板连接。
3.权利要求1记载的半导体装置，其特征在于，上述导线是金线或铝线，用引线接合法使上述导线与上述导电板连接。
4.权利要求1到权利要求3中任何一项记载的半导体装置，其特征在于，上述取出导电区域由一体的导电箔构成，与一端与上述导电板连接的多条上述导线的另一端连接。
5.权利要求4记载的半导体装置，其特征在于，上述导线在位于上述主电极上的上述导电板的上述取出导电区域一侧的表面上进行连接。
6.权利要求1记载的半导体装置，其特征在于，上述导电板是由铜板构成的。
7.半导体装置，其特征在于，具备
具有至少一个主表面，在上述主表面上具有绝缘层，并具有从设置在上述绝缘层中的至少2个孔露出一部分的电流通过电极和控制电极的半导体器件，
以覆盖上述电流通过电极上方的方式通过焊料粘结在上述主表面上的导电板，和
使上述导电板与设置在上述半导体器件外部的上述电流通过电极的取出导电区域电连接的导线。
8.权利要求7记载的半导体装置，其特征在于，上述导线是铜线，通过焊料与上述导电板连接。
9.权利要求7记载的半导体装置，其特征在于，上述导线是金线或铝线，用引线接合法使上述导线与上述导电板连接。
10.权利要求7到权利要求9中任何一项记载的半导体装置，其特征在于，上述电流通过电极的取出导电区域由一体的导电箔构成，与一端与上述导电板连接的多条上述导线的另一端连接。
11.权利要求10记载的半导体装置，其特征在于，上述导线在上述导电板的上述取出导电区域一侧的表面上进行连接。
12.权利要求7记载的半导体装置，其特征在于，上述导电板是由铜板构成的。
13.半导体装置，其特征在于，具备
具有至少一个主表面，在上述主表面上具有绝缘层，并具有从设置在上述绝缘层中的多个孔分别露出一部分的多个电流通过电极和控制电极的半导体器件，
分别覆盖多个上述电流通过电极和控制电极，通过焊料带状地粘结在上述主表面上的导电板，和
分别使上述导电板的一端和设置在上述半导体器件外部的上述电流通过电极的取出导电区域或上述控制电极的取出区域电连接的导线。
14.权利要求13记载的半导体装置，其特征在于，上述导线是铜线，通过焊料与上述导电板连接。
15.权利要求13记载的半导体装置，其特征在于，上述导线是金线或铝线，用引线接合法使上述导线与上述导电板连接。
16.权利要求13记载的半导体装置，其特征在于，上述电流通过电极和控制电极分别以交互地露出的方式进行配置，以使粘结在上述电流通过电极和控制电极上的上述导电板平行的方式进行配置。
17.权利要求13到权利要求15中任何一项记载的半导体装置，其特征在于，上述取出导电区域分别由一体的导电箔构成，分别与一端与上述导电板连接的多条上述导线的另一端连接。
18.权利要求17记载的半导体装置，其特征在于，上述导线分别在位于上述电流通过电极和控制电极上的上述导电板的上述取出导电区域一侧的表面上进行连接。
19.权利要求13记载的半导体装置，其特征在于，上述导电板是由铜板构成的。
CNB031033504A 2002-02-27 2003-01-24 半导体装置 Expired - Fee Related CN1309066C (zh)

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