CN1290387C - 卡制造技术和所制得的卡 - Google Patents

卡制造技术和所制得的卡 Download PDF

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CN1290387C
CN1290387C CNB028152859A CN02815285A CN1290387C CN 1290387 C CN1290387 C CN 1290387C CN B028152859 A CNB028152859 A CN B028152859A CN 02815285 A CN02815285 A CN 02815285A CN 1290387 C CN1290387 C CN 1290387C
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circuit board
edge
conductive layer
bus
conductive
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CN1539255A (zh
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罗伯特·F·华莱士
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SanDisk Corp
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Abstract

本发明提供一种卡制造技术和所制得的卡。该卡具有延伸到电路板的边缘的接地和/或电源层(112)以用于静电放电保护，而且还在接地和/或电源层(112)的边缘处具有间隙(112a)以避免当在制造过程中对卡进行修整时变形的另一层的导电片段(160)发生短路。

Description

卡制造技术和所制得的卡
技术领域
本发明大体上涉及电路板，制造集成有一电路板的存储卡的方法，以及所制成的存储卡。
背景技术
本发明大体上涉及电路板，且更具体涉及在便携式装置中用来存储数据的存储卡的电路板。尽管本发明可应用于广泛的电路板，但本文描述了在存储卡，特别是具有快速电擦除可编程只读存储器(快速EEPROM)的便携式存储卡中实施的情况。
在近些年，如数码相机、数码音频播放器及个人数码助理这样的装置变得流行起来。这些装置需要在小而不平的包装中拥有较大的存储容量。利用高密度非易失性存储器的存储卡经常被插入或拔出这些装置以及连接到个人电脑的打印机或外部读出器。对这些存储卡频繁地进行操作导致静电放电的风险较高。因此，希望有一种小而薄的存储卡，其可免于静电放电的风险并且易于制造和组装。
发明内容
存储卡正变得更小、更薄，而其容量在不断变大且它们的包装也更加紧密。频繁地操作这些存储卡导致静电放电(ESD)的风险较高。
本发明描述了存储卡和制造存储卡的方法，所制造的存储卡可抵抗由静电放电带来的损坏并且该卡的多个导电层更不易于短路。通过将电路板封装入或放置入塑料盖来形成存储卡。在塑料盖和电路板边缘之间的接合处，存在一个间隙，静电放电易于从此处进入并损坏存储卡的电路组件。接地和电源层延伸至电路板边缘，并沿电路板和存储卡之间的接合而延伸。因此任何静电放电都被这些层中的任一个所吸收，并且避免了由高电压放电所带来的对其他电路组件的损坏。避免短路的一个现有方法是修整处理，其涉及将导电层的整个边缘拉回，以离开电路板边缘，然而此方法(如果有的话)只能为存储卡的易受损组件提供很少的ESD保护。
在存储卡的制造过程中，将电路板修整到其成品尺寸。位于电路板边缘的金属层的导电片段在修整处理过程中变形，并且其可遍布绝缘层并接触第二金属层(在此情况下为接地或电源层中的任一个)，由此导致短路。如上文所述，希望将接地和/或电源层延伸到卡的接合处以用于静电放电目的。因此，为避免短路并保持最大的ESD保护，在第二导电层的边缘处形成与导电片段垂直对准的较小的间隙，使得在修整处理过程中发生的任何变形将不会导致短路。导电片段的变形将落入在第二导电层边缘处的间隙中，而不会与所述层接触。这些间隙的大小相对于在电路板和塑料盖之间接合处的接地和/或电源层的剩余边缘较小，因此确保了高水准的ESD保护，同时通过修整电路板避免了短路。
附图简单说明
图1为例示本发明的存储卡的顶视图。
图2为例示本发明的存储卡的横截面图。
图3为显示卡的导电层的透视分解图。
图4为显示卡的导电层在制造过程中的透视分解图。
图5a为存储卡边缘的放大透视图。
图5b为存储卡边缘的另一个例子的放大透视图。
图5c为存储卡边缘的再一个例子的放大透视图。
图6a为沿图4和5a中所示的卡的截面A-A的横截面图。
图6c为沿图4和5c中所示的卡的截面A-A的横截面图。
图7为图3-5的间隙的顶视图。
图8为卡的导电层中间隙的例子的顶视图。
具体实施方式
图1显示了例示本发明的存储卡的后侧。存储卡100包含电路板110，此电路板具有一个拥有端子140的外露的后侧和一个被覆盖的前侧(未图式)。被覆盖的一侧包含至少一个集成电路，此集成电路包括快速存储器、电路迹线和被动组件，这些图中都没有显示出。盖120覆盖前侧和电路板边缘，使得电路板的后侧外露以形成大体上整个存储卡的后侧。在电路板110的边缘与盖120之间的接合处存在狭窄间隙130。图中显示静电放电150在电路板110的边缘与盖120之间的接合处进入狭窄间隙130。Wallace的题为“使用在电路板的导电层上形成的端子的半导体包装”(Semiconductor Package UsingTerminals Formed on a Conductive Layer of a Circuit Board)的美国专利第6,040,622号，详细描述了存储器包装的构造，且其全文以引用的方式并入本文。
图2显示了电路板110与盖120之间的间隙130，为了展示目的，间隙被大大夸示。导电层112和114延伸到电路板110的边缘。间隙相当小，但已足够大到可以使静电放电(ESD)150到达导电层112和114。导电层可为接地层或电源层中的任何一个。就ESD来说，ESD将被导电层112和114而不是被电路板110的前侧180上的任何电路组件所吸收。前侧180具有包含快速存储器、电路迹线和被动组件的至少一个集成电路。
图3显示了具有导电层的片段160的电路板110的底部。这些片段可为电路板前侧上电路迹线的一部分，可为用于在电路板前或后侧中的任一侧上进行电镀的片段，或可为在电路板的测试或调试时间之后不再需要的测试引线。在电路板的生产过程中，将电路迹线切割或剪切到其成品尺寸并将其放置入塑料盖中或如图1中所示将其封装。沿从前侧180至后侧190的方向进行最终剪切或切割，使得任何由加工引起的变形将沿电路板110的边缘从被覆盖前侧180直到外露的后侧190延伸。因此为了描述在剪切或切割加工过程中组件部分的关系，将导电层112或114描述成在电路板的被覆盖前侧180上可见的导电片段160之下。
图4图示了在电路板生产过程中的中间阶段。在此阶段，将片段160连接到总线165。在将电路板180修整到其成品尺寸之前，片段160和总线165为相同导电层的一部分。在此中间阶段例子中的片段可为用于在电路板前或后侧中的任一侧上进行电镀的电路迹线，或如图3中可为功能性电路元件或测试引线。在切割或剪切操作过程中，本发明保护位于另一导电层之上的导电层的任何导电片段使其免于短路。
图5a为在剪切之后电路板的一些层的边缘的放大图，仅显示一个间隙或狭槽以用于说明。图5a显示导电层112位于导电片段160之下。绝缘层116位于导电片段160与导电层112之间。导电层112具有间隙112a和边缘部分112b。间隙112a比片段160宽(即在X方向上更大)，且在剪切或切割加工过程中可到达导电层112平面的片段160的任何变形将到达间隙112a，而不会接触导电层112的任何部分，因此避免了短路。应注意：如图1所示，电路板110的边缘部分112b位于电路板110与盖120之间的接合处130。因此，将导电层相当大的部分安置在电路板边缘以吸引可发生的任何ESD，与此同时避免了由片段160与层112或114相接触而引起的任何可能的短路。
图6a为沿5a中所示的电路板的截面A-A的横截面图。绝缘层116上的导电片段160在剪切或切割操作过程中已变形，使得片段160的变形160a向下延伸到电路板的边缘。变形的量和因此变形160a的大小取决于剪切力、剪切工具的几何形状和导电片段金属的弹性。可预见：变形可向下延伸到电路板的边缘，即沿Z方向，进入或离开电路板的边缘，即沿Y方向，并跨过电路板的边缘，即沿X方向。因此，将间隙112a制造的足够宽，使得在X方向上的任何变形量都将落入间隙并且不会接触边缘部分112b。间隙112a也足够的深，使得任何延伸入间隙或在Y方向上的变形也将不会接触导电层112。以同样的方法形成导电层114，并且导电层114与层112具有相同的结构。层112或114可分别为接地或电源层中的任一种。图7显示了间隙和片段在X和Y方向上的相对宽度或大小。导电片段的大小可根据片段的功能在较宽的范围内变化，但通常的范围从约1密耳(0.001″)直到约50密耳(0.05″)，并且间隙的宽度和深度与片段成比例且具有足够的公差，使得任何变形都将进入间隙而不会接触导电层。在一个例子中，图7中导电片段160a的宽度csw为4密耳宽(即沿X方向)，且间隙112a从边缘到边缘的宽度gw为40密耳(即沿X方向)，而深度gd为60密耳(即沿Y方向)。
图5b为电路板边缘的另一个例子的放大图。此图展示了片段160的可能变形图案。变形160a不仅可如图5b所示在Z方向上延伸，而且还可沿X轴横向延伸并由于对电路板的修整而沿Y轴进入间隙112a。将间隙112a制造的足够宽(即沿X方向)，使得任何变形160a都将落入间隙112a或114a并且不会接触导电层112或114的边缘部分112b。同样地，其也足够深(即沿Y方向)，使得任何进入存储卡100中的变形都将落入间隙112a或114a并且不会接触层112或114。在图5b中，仅显示了变形160a延伸到层112中。然而变形160a可延伸到层114中，并且因此将落入间隙114a而不会接触边缘部分114b。
图5c为电路板边缘的再一个例子的放大图。在这个例子中，在电路板边缘处对电路板的所有的层进行开槽。狭槽116c、112c和114c分别形成在绝缘层116、导电层112和导电层114中。狭槽穿过电路板的所有的层，包括未显示的层和未编号的层。狭槽116c、112c和114c在X和Y两个方向上都小于导电层112和114中的间隙112a和114a。因此，间隙112a和114a在狭槽112c和114c的任一侧上横向延伸(即沿X方向)。间隙112a和114a还比狭槽112c和114c延伸的更深(即沿Y方向)。因此，狭槽形成于间隙内并完全被间隙所包围。如同图5a和5b的先前例子一样，可发生的任何变形160a都将落入间隙112a和114a而不会接触导电层112或114的边缘部分112b或114b。因此，可避免短路。边缘且特别是狭槽116c、112c和114c的几何形状可具有许多不同的变化，只要导电层112和114中的间隙在X和Y方向上大于其所对准的导电片段160。
图6c为沿5c中所示的电路板的截面A-A的横截面图。如上文根据图6a所述，绝缘层116上的导电片段160在剪切或切割操作过程中已变形，使得片段160的变形160a向下延伸到电路板的边缘。变形的量和因此变形160a的大小取决于剪切力、剪切工具的几何形状和导电片段金属的弹性。可预见：变形可向下延伸到电路板的边缘，即沿Z方向，进入或离开电路板的边缘，即沿Y方向，并跨过电路板的边缘，即沿X方向。因此，将间隙112a制造的足够宽，使得在X方向上的任何变形量都将落入间隙并且不会接触边缘部分112b或114b。间隙112a也足够的深，使得任何延伸入间隙或在Y方向上的变形也将不会接触导电层112或导电层114。
图8显示了间隙112a可具有的不同形状中的一些。间隙112a可具有许多不同的大小和形状，所有的大小和形状都成比例地足够大，以避免在变形160a与导电层112或114之间的任何短路。
尽管已显示并描述了本发明的说明性例子，但很明显，所属技术领域的技术人员可想到并进行本发明所涉及的其他修改、变更和变化。
因此可设想本发明并不限于所示及所描述的实施例，并且可设想任何此类并入组成本发明基本特点的那些特点的修改和其他实施例为均等物且在本发明的真正精神和范畴内。

Claims (19)

1.一种电路板，其具有至少一个外围边缘，其包括：
一第一导电层，其在该电路板的边缘处具有导电片段；
一第一绝缘层；
一第二导电层，通过该第一绝缘层使其与该第一导电层分离，其位于该第一导电层之下，并延伸到该电路板的边缘，该第二导电层在该电路板的边缘处具有间隙，这些间隙中的一个或多个与这些导电片段对准，借此越过该边缘延伸到该第二导电层的平面的这些导电片段的任何变形在这些间隙内延伸并且不会接触该第二导电层。
2.根据权利要求1所述的电路板，其中这些间隙为狭槽。
3.根据权利要求1所述的电路板，其中该间隙在远离该边缘处的宽度小于其在该电路板的边缘处的宽度。
4.根据权利要求1所述的电路板，其中该第二导电层为一接地或电源层。
5.根据权利要求1所述的电路板，其还包括一第三导电层，该第三导电层在该电路板的边缘处具有间隙，这些间隙与这些导电片段对准，借此延伸到该第三导电层的平面的这些导电片段的任何变形在这些间隙内延伸并且不会接触该第三导电层。
6.根据权利要求5所述的电路板，其中该第三导电层为一接地或电源层。
7.根据权利要求1所述的电路板，还包括至少一个集成电路，该集成电路包括快速存储器、电路迹线和被动组件。
8.一种制造一多层电路板的方法：
形成一第一导电层，其具有沿该电路板的至少一个边缘安置的导电片段；
在该第一导电层之下形成一绝缘层；
在该第一导电层和该绝缘层之下形成一第二导电层，该第二导电层具有沿该电路板的至少一个边缘安置的间隙，这些间隙中的至少一个大于这些导电片段并且与这些导电片段对准；
修整该电路板和这些导电片段，使得这些片段的任何变形延伸进入这些间隙并且不会接触该第二导电层。
9.根据权利要求8所述的方法，其中该修整该电路板的步骤包括剪切该电路板的步骤。
10.根据权利要求9所述的方法，其中在该第二导电层之前剪切该第一导电层。
11.一种电路板，其具有至少一个边缘，其包括：
一电源层，其延伸到该至少一个边缘；
一接地层，其延伸到该至少一个边缘；和
至少一个额外层，其在该电路板的至少一个边缘处具有金属片段，通过一绝缘层将该至少一个额外层与该接地或电源层分离；
其中将位于该至少一个边缘处的这些金属片段下的该接地或电源层的多个部分开槽，借此这些金属片段在该至少一个边缘处的任何变形不会接触该接地或电源层。
12.根据权利要求11所述的电路板，其中这些金属片段连接到一总线，该总线也从该电路板处被修整。
13.根据权利要求11所述的电路板，其中这些金属片段为电路迹线。
14.根据权利要求11所述的电路板，其中这些金属片段为测试引线。
15.根据权利要求11所述的电路板，还包括至少一个集成电路，该集成电路包括快速存储器、电路迹线和被动组件。
16.一种结构，其包括：
一金属层，其包括至少一个总线、一第一区域和将该至少一个总线连接到该第一区域的片段；和
一电路板，其包括：
至少一个边缘，其中该金属层的第一区域形成该电路板的一第一层，并且其中将该总线连接到该第一区域的这些片段位于该电路板的至少一个边缘处，并越过该电路板的至少一个边缘延伸到该至少一个总线；
一绝缘层，其位于该金属层之下；和
一第二导电层，其位于该金属层和该绝缘层之下并延伸到该至少一个边缘，该第二导电层在该电路板的至少一个边缘处具有间隙，借此这些间隙中的至少一个与这些片段中的至少一个对准。
17.根据权利要求16所述的结构，借此越过该至少一个边缘延伸到该第二导电层的平面的这些导电片段的任何变形在这些间隙内延伸并且不会接触该第二导电层。
18.一种制造一存储器存储装置的方法，该装置包括一电路板、一盖和该电路板的边缘与该盖之间的一接合，该方法包括：
形成一第一金属层，其包括一第一区域、一总线和在该电路板的边缘处将该第一区域连接到该总线的复数个片段，该第一区域位于该电路板内，该总线位于该电路板外；
形成一绝缘层，其位于该第一金属层的该第一区域之下；
形成一第二金属层，其位于该绝缘层之下并且通过该绝缘层与该第一金属层分离，该第二金属层延伸到该电路板的边缘并且在位于这些复数个片段之下的该电路板的边缘处具有复数个间隙；
在该电路板的边缘处剪切这些复数个片段并且清除该总线，使得这些片段的任何变形落入该第二金属层的这些间隙之内。
19.根据权利要求18所述的方法，还包括将该电路板安置于该盖中，使得该电路板和该第二金属层的边缘处于该盖与该电路板之间的该接合处。
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