CN1256512A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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CN1256512A
CN1256512A CN99125526A CN99125526A CN1256512A CN 1256512 A CN1256512 A CN 1256512A CN 99125526 A CN99125526 A CN 99125526A CN 99125526 A CN99125526 A CN 99125526A CN 1256512 A CN1256512 A CN 1256512A
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interconnection layer
copper interconnection
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CN1114943C (zh
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松原义久
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Abstract

在本发明中,在此公开一种半导体器件,其铜互连层形成多级结构;其特征在于至少一个位于铜互连层之间的层间膜具有层状结构,其中按照次序从下层铜互连层一侧叠放一含氟的无定形碳膜与一SiO2膜;一层状结构,其中按次序叠放氮化硅,然后叠放氮氧化硅或碳化硅;或者包括单氮化硅层的一种结构。这种层间膜作为防反射涂层。

Description

半导体器件及其制造方法
本发明涉及一种半导体器件及其制造方法，特别涉及一种用于避免来自具有铜多级互连层的半导体器件中的较低级铜互连层的反射的方法。
近几年来，人们不断尝试在大规模集成电路器件中实现更高的速度和更高的集成度，在此产生不但要在晶体管中而且还要在该互连层中实现进一步小型化和更密集的空间分布的需要。
作为金属互连材料，到目前为止主要采用铝，但是这已知会导致电迁移(EM)的问题；即，由于互连层的电流密度增加以及由整个器件所产生的热量而造成的温度升高使得在互连层中的一些金属原子发生运动，这在一些部位产生空缺，这些原子从该空缺移走并且因此会产生互连层的断开。另外，在金属原子积累的一些部分形成称为小丘的颗粒，并且对位于该互连层上的绝缘层产生应力，这可能会造成裂缝。
为了解决该问题，人们已经提出可以采用在铝中掺有非常少量的硅或铜的合金，但是如果要进一步实现小型化和更密集的空间分布的话，即使这样还不够，因此人们考虑使用仍然具有更高的可靠性的铜互连层。
在金属材料中，铜具有仅次于银的第二最小电阻率(银的电阻率为1.7-1.8μΩ-cm，而AlCu的电阻率为3.1μΩ-cm)，并且具有优良的EM阻抗。从而，在实现更密集的空间分布的过程中，非常需要利用这些铜的特性的新技术。
例如，铜被用作为互连材料的技术公开于IEDM’97，pp.769-772中名为“利用铜金属化的高性能1.8V 0.2μm的CMOS技术”的文章，以及在IEDM’97，pp.769-772中名为“在低于0.25μm的CMOS超大规模集成电路技术中的完全铜布线”的文章。
铜是相对较难以通过蚀刻形成图案的金属。特别是在应用于低于0.25μm量级的半导体器件中，铜必须通过镶嵌金属化技术(在下文中简称为“镶嵌技术”)形成。
例如，这是按照图7中所示执行的。首先，在第一层间绝缘膜71上形成第一互连槽72(图7(a))，然后通过电镀方法、CVD(化学汽相淀积)方法等等在其上淀积阻挡金属层73和铜74(图7(b))。接着，通过化学机械抛光(CMP)方法进行抛光直到第一层间绝缘膜71的表面暴露出来，并且通过铜表面的平面化，以镶嵌形式完成第一级互连层75(图7(c))。为了在其上形成另一个铜互连层，在生长第二层间绝缘膜76之后，通过光刻方法形成与第一级互连层75相接触的第二互连槽78以及通孔77(图7(d))，然后按照类似方式用铜通过镶嵌形成第二级互连层79(图7(e))。顺便提一下，在上文所述的后一实例中，其中提到当形成测试芯片时形成作为倒装片模块的顶层铜互连层。
铜是相对较易被氧化的金属。当另一个铜互连层如上文所述置于较低层的铜互连层之上时，例如，如果采用氧化硅作为层间绝缘膜，则在形成氧化硅膜中(这通常是通过在氧化环境中利用硅烷进行的)，下层铜也受到氧化。结果，在被氧化的铜表面上同时形成氧化硅膜，这可能发生薄膜的脱落，这导致不一定形成规定的层间绝缘膜的问题。对于上述实例，没有提到具体采用什么金属，但是这给出一个在形成氧化膜之后形成阻蚀层(氮化硅或类似材料通常被用作为该阻蚀层)的实例。
另外，当通过光刻对该层间绝缘膜进行构图时，如上文所述，光刻胶由于来自下层互连层的反射而曝光过度，这会造成不能形成规定图案的问题。上述氮化硅膜通常被用作为不具有防反射效果的阻蚀层。随着互连图案小型化的继续该问题会变得更加尖锐，并且需要一种适当的解决措施。
为了避免来自普通金属互连层的反射，采用SiON膜是一种公知的方法。在此，SiON膜的形成通常是在300至400℃左右的基片温度中把氧化氮气体或者氮气和氧气的混合物添加到硅烷气中而进行的。但是，如果这在铜互连层之上在这样的条件下进行SiON膜的形成，则在形成上述SiO2膜的情况下铜表面被氧化，从而产生不能够形成规定的防反射涂层(ARC)的问题。
本发明提供一种可以克服上述问题的半导体器件。
就上述问题而言，本发明涉及一种形成多级结构的铜互连层的半导体器件；其中位于铜互连层之间的至少一个层间膜具有层状结构，其中按照次序从下层铜互连层的一侧叠放含有氟的无定形碳膜(在下文中简称为a-C：F膜)和SiO2膜。
另外，本发明涉及一种半导体器件，其铜互连层形成多级结构；其中至少一个置于该铜互连层之间的层间膜具有层状结构，其中按照次序从下层铜互连层的一侧叠放氮化硅和氮氧化硅；一个层状结构，其中按照次序叠放氮化硅和碳化硅；或者氮化硅层的单层结构。
在本发明中，当用于通过镶嵌技术形成铜互连层的槽或通孔被形成在另一个铜互连层上时，在该下层铜互连层上的膜的形成在无氧条件下执行，并且即使当用氧执行膜的形成时，该铜表面保持不被氧化，另外这样形成的膜具有防反射效果，使得可以易于实现互连图案的小型化。
图1(a)至图1(d)为示出本发明一个实施例的制造方法的步骤的一系列示意截面图。
图2为示出本发明一个实施例的多级互连结构的示意截面图。
图3为示出在铜表面上的氧化铜的厚度与基片温度之间的关系的曲线图。
图4为示出当a-C：F膜形成在铜膜的表面上并且(b)在400℃和(c)在450℃的温度下在该膜上形成SiO2膜时，铜膜表面的成分分布的一组SIMS(二次离子质谱分析)图。图4(a)表示在退火以前的状态。
图5为示出在铜表面上形成(a)a-C：F膜、(b)SiN膜、以及(c)不形成其它膜的几种情况下，反射率与波长之间的关系的一组曲线图。
图6为示出本发明的另一个实施例的多级互连结构的示意截面图。
图7(a)至图7(e)为示出常规多级互连结构的制造方法的步骤的示意截面图。
在本发明中，一层具有防氧化的保护效果的膜在无氧条件下形成，然后形成防反射涂层(ARC)，或者在无氧条件下形成ARC。在效果上，形成ARC，而铜互连层表面被防止氧化，使得不被剥落，从而可以进一步使互连图案小型化。
图5为示出铜互连层的反射率与波长的关系的一组曲线图，在一例子中，SiN膜(厚度为500nm)形成在铜互连层上作为阻蚀层，并且在作为本发明一个实施例的例子中，a-C：F膜(厚度为500nm)形成在铜互连层上。从图中可以清楚看出，在用于光刻工艺中的i-线(360nm)和氪氟激光(248nm)的波长处的反射率比较表明，铜表面的反射率与其上形成有SiN膜的样本的反射率接近于40％，而根据本发明具有a-C：F膜的样本的反射率对于i-线为5％或更小，对于氪氟激光为10％或更小。尽管在本例中a-C：F膜形成厚度为500nm，但是该反射率不取决于该膜厚，并且该膜具有与其膜厚无关的防反射效果。
在空气中加热，当基片温度超过150℃，铜表面通常瞬间被氧化(图3中的曲线A)。与此相反，在铜表面上形成a-C：F膜(厚度为100nm)抑制该氧化过程(图3中的曲线B)。但是必须注意，a-C：F膜本身允许氧通过并且氧化下层的铜，如图中所示。但是，当在所述a-C：F膜上形成SiO2膜时，在SiO2膜形成开始时，一些氧可能通过该膜并氧化铜表面，但是一但形成SiO2膜，该SiO2膜阻止氧的渗透，从而停止进一步的氧化，使得铜和a-C：F膜紧紧地相互附着而没有障碍。
对于a-C：F膜的膜厚没有具体的限制。但是，由于太薄的膜具有让氧通过并氧化下层的铜的趋势，因此该膜优选至少具有50nm的厚度，最好具有100nm或更厚的厚度。其最大值可以根据设计而适当设定。
另外，在SiN膜作为防止氧渗透的保护层而形成并且在其上形成有SiON膜或SiC膜的情况下，SiN膜形成具有类似于作为通常阻蚀层的厚度即可，即，至少为50nm，最好为100nm左右。并且，对于形成在SiN膜上的SiON膜或SiC膜，所需膜厚同样为至少50nm并且最好为100nm左右。另外，在SiC膜的情况，由于在膜形成过程中不使用氧，因此该膜可以直接形成在铜互连层上，以同样作为ARC。
第一实施例
首先，参照附图描述作为本发明一个实施例的形成多级铜互连层的方法。
在基片1上形成SiO2膜2之后，形成厚度为500nm左右的a-C：F膜3。在其上，通过CVD方法进一步形成200nm厚的SiO2膜4(图1(a))。在按该方法形成的SiO2膜4上，施加一层光刻胶5，然后通过光刻方法构图。接着，在a-C：F膜3和SiO2膜4上通过蚀刻形成要用于通过镶嵌技术形成铜互连层的槽(宽度为0.15μm，深度为0.2μm)(图1(b))。在形成有槽6的基片的整个表面上，通过溅射方法或类似方法形成厚度为150nm的TiN膜7作为阻挡膜，通过CVD方法或类似方法在其上形成铜膜8(图1(c))。通过CMP(化学机械抛光)方法对铜膜8和TiN膜7进行抛光，直到SiO2膜2暴露出来，从而完成铜互连层9(图1(d))。
另外，在按这种方式形成的铜互连层9上，按照如上文所述的相同方式，在a-C：F膜3和SiO2膜4上通过蚀刻形成用于通过镶嵌技术形成另一个铜互连层的另一个槽和/或另一个通孔，类似地形成阻挡膜和铜膜，然后对该表面进行平面化。重复这些步骤，则可完成多级互连层。
图4示出通过对该样本进行SIMS(二次离子质谱测定法)的表面分析的结果，其中该样本形成有a-C：F膜，并且然后分别在400℃和450℃的退火温度下形成SiO2膜。在这种情况下，各个样本的SiO2膜在测量之前被除去。如图中所示，与退火之前相比，确认该铜表面在任何一个温度下退火之后几乎不被氧化。
在本实例中，如上述图5中所示，由于a-C：F膜3具有特别强的防反射效果，该光刻胶不会在光刻的时候破裂，从而可以成功地形成微小的图案。
同时，在如上文所述完成多级互连层之后，适合地对作为顶级层覆盖层10(可能具有与所述层间绝缘膜相同的成份)进行蚀刻，从而形成接合区部分12和熔丝部分11。在此，如图2所示，通过至少用除了铜之外一种合适的互连材料(在本例中为铝)形成熔丝部分11，并且最好形成这两个部分，可以获得如下优点。即，当施加可能对元件产生反作用的过量电流时，所述熔丝部分被熔断，从而该电路得到保护。另外，如果接合区部分也是由除了铜之外的材料所形成，则可以采用廉价的金丝接合13。如果成本允许的话，该接合区部分可以由铜形成，在这种情况下，作为常规实例，可以形成引线凸起以进行倒装片接合。不用说，可以用除了铜之外的其它金属形成的接合区部分进行倒装片接合。另外，尽管在图中所示的铜互连层9具有四层结构，应当知道这不是对本发明的限制。
第二实施例
参照图6，下面描述本发明的第二实施例。图6为示出本实施例的铜多级互连层的示意截面图。
在象SiO2膜61这样形成在一基片上的绝缘膜中，形成要通过镶嵌技术形成铜互连层的槽，然后如第一实施例那样形成一阻挡膜。通过CMP方法类似地对该表面进行平面化，从而完成第一级互连层62。接着，利用硅烷气和氨气通过CVD方法在该第一级互连层62上生长一层厚度为150nm的SiN膜63，在该膜上进一步利用硅烷气和氧化氮生长一层厚度为150nm的SiON膜。接着，在形成象SiO2膜65或类似的膜这样的绝缘膜之后，通过光刻方法形成要通过镶嵌技术形成第二级互连层66的另一个槽和/或另一个通孔。在其上，成功地形成规定的槽，而不从下层互连层接收反射或使得该光刻胶破裂。在此之后，按照如上文所述的相同方法形成阻挡膜和铜的镶嵌，并且从而形成第二级互连层66。进一步按照相同的方法重复这些步骤，可以完成镶嵌形式的多级互连层。另外，尽管在图6中所示的互连层仅有三层，但是应当知道该互连结构可以具有任何规定的级数。另外，如上文所述，通过至少用除了铜之外的其他合适材料形成顶层的熔丝部分，可以按上文所述完成具有优良特性的半导体器件。
另外，当使用SiC膜取代SiN膜时，可以获得类似的效果。另外，即使表面即使没有形成SiON膜，SiC膜本身可以获得足够的防反射效果。

Claims (10)

1.一种半导体器件，其铜互连层形成多级结构；其特征在于至少一个位于铜互连层之间的层间膜具有层状结构，其中按照次序从下层铜互连层一侧叠放一含氟的无定形碳膜与一SiO2膜。
2.根据权利要求1所述的半导体器件，其特征在于，所述由含氟的无定形碳膜和SiO2膜所构成的结构叠放在形成于半导体基片上的氧化膜上，并且通过镶嵌技术在所述层状结构中形成一铜互连层，从而完成第一级互连层。
3.一种半导体器件，其铜互连层形成多级结构；其特征在于至少一个位于铜互连层之间的层间膜具有层状结构，其中按照次序从下层铜互连层一侧叠放氮化硅和氮氧化硅。
4.一种半导体器件，其铜互连层形成多级结构；其特征在于至少一个位于铜互连层之间的层间膜具有层状结构，其中按照次序从下层铜互连层一侧叠放氮化硅和碳化硅。
5.一种半导体器件，其铜互连层形成多级结构；其特征在于至少一个位于铜互连层之间的层间膜包括在下层铜互连层一侧上的碳化硅。
6.一种制造具有多层铜互连层的半导体器件的方法；其中包括如下步骤：
在一铜互连层上形成一绝缘层；以及在所述绝缘层内形成一个槽以通过镶嵌技术形成另一个铜互连层，和/或在所述绝缘层内形成一通孔以便于与一下级铜互连层相接触；
至少在该下层铜互连层上形成由含氟的无定形碳膜和SiO2膜所构成的层状结构；以及
通过用光刻工艺对所述层状结构构图形成所述槽和/或所述通孔，从而以镶嵌形式完成一上级铜互连层。
7.根据权利要求6所述的制造半导体器件的方法，其中还包括如下步骤：
在形成于半导体基片上的氧化膜上形成由含氟的无定形碳膜和SiO2膜所构成的层状结构；以及
在所述层状结构中以镶嵌形式形成铜互连层，从而完成第一级铜互连层。
8.一种制造具有多层铜互连层的半导体器件的方法；其中包括如下步骤：
在一铜互连层上形成一绝缘层；以及在所述绝缘层内形成一个槽以通过镶嵌技术形成另一个铜互连层，和/或在所述绝缘层内形成一通孔以便于与一下级铜互连层相接触；
至少在该下层铜互连层上形成一层状结构，其中按照次序从铜互连层一侧叠放氮化硅和氮氧化硅；以及
在其上形成一层间绝缘膜，此后通过用光刻工艺对所述层间绝缘膜和所述层状结构构图，形成所述槽和/或所述通孔，从而以镶嵌形式完成一上级铜互连层。
9.一种制造具有多层铜互连层的半导体器件的方法；其中包括如下步骤：
在一铜互连层上形成一绝缘层；以及在所述绝缘层内形成一个槽以通过镶嵌技术形成另一个铜互连层，和/或在所述绝缘层内形成一通孔以便于与一下级铜互连层相接触；
至少在该下层铜互连层上形成一层状结构，其中按照次序从铜互连层一侧叠放氮化硅和碳化硅；以及
在其上形成一层间绝缘膜，此后通过用光刻工艺对所述层间绝缘膜和所述层状结构构图，形成所述槽和/或所述通孔，从而以镶嵌形式完成一上级铜互连层。
10.一种制造具有多层铜互连层的半导体器件的方法；其中包括如下步骤：
在一铜互连层上形成一绝缘层；以及在所述绝缘层内形成一个槽以通过镶嵌技术形成另一个铜互连层，和/或在所述绝缘层内形成一通孔以便于与一下级铜互连层相接触；
至少在该下层铜互连层上，在该下层铜互连层的一侧形成碳化硅；以及
在其上形成一层间绝缘膜，此后通过用光刻工艺对所述层间绝缘膜和所述碳化硅构图形成所述槽和/或所述通孔，从而以镶嵌形式完成一上级铜互连层。
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CN100367530C (zh) * 2002-09-26 2008-02-06 奇美电子股份有限公司 图像显示装置、有机电致发光元件及图像显示装置的制造方法
CN101580928B (zh) * 2003-02-26 2012-07-18 住友电气工业株式会社 无定形碳膜及其制备方法以及无定形碳膜涂敷的材料
CN101958310B (zh) * 2009-07-16 2012-05-23 中芯国际集成电路制造(上海)有限公司 半导体器件及半导体器件的形成方法
CN103646912A (zh) * 2013-11-13 2014-03-19 上海华力微电子有限公司 通孔优先铜互连制作方法

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GB2344464B (en) 2004-02-25
GB9928740D0 (en) 2000-02-02
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US20010045655A1 (en) 2001-11-29
CN1114943C (zh) 2003-07-16
GB0325008D0 (en) 2003-11-26
JP2000174023A (ja) 2000-06-23

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