CN1222253A - 半导体芯片载体元件制作方法 - Google Patents

半导体芯片载体元件制作方法 Download PDF

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CN1222253A
CN1222253A CN97195504A CN97195504A CN1222253A CN 1222253 A CN1222253 A CN 1222253A CN 97195504 A CN97195504 A CN 97195504A CN 97195504 A CN97195504 A CN 97195504A CN 1222253 A CN1222253 A CN 1222253A
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strengthening membrane
chip
carrier element
matrix
framework
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CN1156002C (zh
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M·胡伯
P·斯塔姆卡
D·豪德奥
J·菲舍
J·海策尔
H·格拉夫
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Siemens AG
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Siemens AG
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Priority claimed from DE19623826A external-priority patent/DE19623826C2/de
Priority claimed from DE29621837U external-priority patent/DE29621837U1/de
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Abstract

一个半导体芯片(23)的载体元件,特别是要装在芯片卡上的载体元件,有一种安放芯片(23)的基体(15)和在安放芯片的基体(15)这一面上有一层加强膜(10),有一个安放芯片(23)和它的连接导线(24)的冲孔(14),其边缘有一个和膜(10)形成一体的框架(12)。

Description

半导体芯片载体元件制作方法
当今的芯片卡上，半导体芯片常用一种非导电的，柔性基体制成的载体元件安装在一般由塑料制成的卡上。在载体元件上不仅有半导体芯片还有接触面，通过它半导体芯片可以被阅读机接触。为此，一般是在非导电物体上加上一层表面精化的铜箔，以及例如用腐蚀方法构成。在非导电物体上在加层前被冲出孔，芯片借助导线穿过孔可以用线-体-技术与接触面连接成为可导电的。然后将半导体芯片和导线用一种保护的填充剂盖住。
芯片卡必须能承受由用户规定的弯曲负荷。然而这里出现的弯曲力必须被芯片避开，因为芯片比卡片材料脆得多。特别对于那些大约大于10mm2的芯片而言。按照EP0484353B1的规定，在柔性物体上要加上一个比柔性载体基体弯曲强度高很多的加强框架。
附图4表示了根据EP0484353B1规定的结构形式。不导电的，柔性的载体基体1上有冲孔2。一种金属膜3是用一层胶4粘在基体1上。金属膜3在接触面上通过沟槽5构成相互绝缘的。一个半导体芯片6粘在基体1上并且用导线7与接触面3电连接。为了加强柔性基体1，在基体1上粘上一个加强环8。加强环8的内部用填充物9填上，以保护芯片6和导线7。
因为考虑了相对较大的位置公差，安装加强环是没有问题的，并且此外为此还必须有专用的复杂的工具。总之这是一个非常困难和复杂的过程。此外由于上述的加强环使载体元件粘在卡上的面积受到了限制。
US5,147,982表示了一种载体元件，在一个冲出的形成接触面的金属网格上被铺上一层塑料膜，它是一个整体成形的加强-和保护框架。
此发明的任务是给出一种制造载体元件的简易方法。
此任务是按照权利要求1通过一种制造载体元件的方法解决的。具有优越性的进一步发展列举在从属权利要求中。
此发明的优点是，它具有和制造载体基体或上述载体元件一样或相似的方法步骤。就是冲压-和加层的方法步骤。因为加强膜具有载体元件一样的外部尺寸，制作加层时可以使用制作形成接触面铜膜的加层同样的机床。
一般情况下载体元件是在一条很长的带子上制作的，这时很多载体元件甚至可以并排摆放在一起。带子在它的边缘上有孔，因此带子可以在加工机床上被向前传送。如果加强膜上也有这种孔，则它们也可以用和柔性栽体基体或接触面薄膜相同的方法被传送和被加工。
由于深拉产生相对大的应力，当带子在带圈上卷起，放开和重卷时产生的机械负荷使这种应力至少部分地被释放因而可以导致在框架上部露出部分的材料损坏。此发明的进一步发展是在带上靠近以后通过冲压产生载体元件的地方安排卸荷孔，它可以被作成细缝。为了避免可能导致卸荷孔边缘微细裂缝的凹痕效应，边缘的过渡最好作成圆角。载体元件上的卸荷孔在载体元件从带上冲下来以后就看不见了，这样一来接触面的外观不会受到损害。没有尖角的框架经过深拉可以使整个带子的弹性进一步提高。
因为经过深拉和冲压产生的框架沿加强膜冲出孔的边缘只有和铜膜一样的厚度，在框架以外的部分留下足够的粘接位置，可以将载体元件固定在一个卡上。固定膜的厚度可以取决于所期望的总弯曲强度以及所应用的薄膜材料特性来选用。
特别是它的优点还在于，如果槽的整个底部没有被冲透，而在框架的边缘留下一个台阶时，它进一步提高了弯曲强度。
下面将用一个例子借助于附图对此发明进一步地加以说明。其中见
附图1a-1d制造此发明的加强膜的方法步骤和制造薄膜的上视图，
附图2a-2c柔性的载体基体、加强膜以及这两个零件的连接，
附图3此发明的载体元件的截面图，
附图4具有当代技术水平的一种载体元件和
附图5带卸荷孔的加强膜。
附图1a表示了轧制成相应厚度的金属加强膜的截面图。附图1b表示了经过深拉过程产生的槽11。经过一次冲压过程槽11的底部被脱离，这样一来只有槽11的壁留下来成为框架12，它和加强膜10连成一个整体并且沿以前的槽11决定的冲孔薄膜上。好在槽11的整个底部没有被冲去，这样还保留了用虚线表示的台阶17，它使弯曲强度进一步提高。
附图1d表示了此发明的加强膜10的上视图，加强膜是由长的带子制成的。沿着带的两个边缘打上孔13，它可以借助齿轮将带子向前传送。薄膜10上有冲出孔14，沿它的边缘是框架12。虚线是截面线，截面图表示在附图1c上。
附图2b再一次表示了此发明的加强膜。附图2a表示了可以用塑料制成的柔性栽体基体15，但是现在常用玻璃纤维加强的环氧树脂制成。同样，载体基体15也是由长的带子制成，并且在它的边缘打上孔13用于继续加工时的传送和准确定位。载体基体15上有冲孔16，其上可以被安放没有表示出来的半导体芯片，并且通过它可以将半导体芯片与载体基体15背面看不见的接触面电连接上。在附图2c上仅仅表示了与载体基体15连上的加强膜10。载体基体15上的冲孔16位于与加强膜10连成一个整体的框架12之内，这样一来一个没有表示出来的半导体芯片毫无问题的可以被放在中心的冲孔上并且通过载体基体15周边的冲孔可以被连接在载体基体背面的，看不见的接触面上。
附图3表示了由带子上冲出来的载体元件的截面图。在这种情况下非导电的，柔性的载体基体15只表示了周边的通过冲压形成的冲孔16。在它的背面是用一层胶21粘上的在接触面上由槽22构成的金属膜20。在栽体基体15上安放半导体芯片23，芯片借助于导线24穿过载体基体15上的冲孔16与接触面20连接。在载体基体15安放半导体芯片23的这个面上用胶再粘上一层所发明的加强膜10。为了保护半导体芯片23和导线24在与加强膜10连成一个整体的框架12内用一种填充物25填满。
与附图4相比较可以看出，此发明的载体元件在载体元件的周边留了一个较大的面积，使它可以比较好地粘在塑料卡上附    图5表示了此发明的加强膜上的卸荷孔18，它位于虚线表示的以后通过冲压生成的载体元件范围19之外。
附图3和4表示了一个不导电的载体基体15以及1，它显示了形成接触面的一个金属涂层20以及3。原则上也可以采用一种导电的，例如金属的载体基体。此外同样可以考虑选择塑料作为加强膜10的材料。也可以考虑用深拉和冲压以外的制造方法。

Claims (8)

1．制造一种半导体芯片(23)载体元件的方法，特别是要装在一个芯片卡上的载体元件，其工序为：-用深拉法在一个加强膜(10)上成形一个槽(11)，-槽的底部被冲空，这样就形成了一个安放芯片(23)和它的连接导线(24)的冲孔，因此由加强膜(10)形成的框架(12)是一个整体的，加强膜(10)安放在基体(15)的支撑芯片(23)的那一面上。
2．按照要求1的方法，其特征为，基体(15)是一个非导电膜，在芯片(23)这一面的背面被加上一层导电的、在接触面上构成的薄膜(20)。
3．按照要求1的方法，其特征为，基体(15)是一个金属膜。
4．按照要求1至3之一的方法，其特征为，加强膜(10)是金属的。
5．按照要求1至3之一的方法，其特征为，加强膜(10)是塑料的。
6．按照上述要求之一的方法，其特征为，基体(15)是一个非导电的薄膜，在加强膜(10)的背面被加上一层导电的、在接触面上构成的薄膜(20)。
7．按照上述要求之一的方法，其特征为，不是槽的整个底部被冲去，如此不与薄膜(10)连接的框架(12)的边缘安排了一个几乎和框架(12)垂直的并与框架(12)是一个整体的台阶(17)。
8．按上述要求之一的方法，其特征为，在加强膜(10)上，在以后成为载体元件范围(19)以外的地方装设卸荷孔(18)。
CNB971955042A 1996-06-14 1997-06-10 半导体芯片载体元件制作方法 Expired - Fee Related CN1156002C (zh)

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DE29621837U DE29621837U1 (de) 1996-12-16 1996-12-16 Trägerelement für Halbleiterchips

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CN100401510C (zh) * 2003-03-07 2008-07-09 Nxp股份有限公司 半导体装置、半导体主体及其制造方法
CN102171815A (zh) * 2008-11-21 2011-08-31 先进封装技术私人有限公司 半导体封装件及其制造方法
CN102916317A (zh) * 2011-05-03 2013-02-06 阿尔斯通运输股份有限公司 将至少一个电子元件与电源电互连的装置及相关电子系统
CN104021413A (zh) * 2013-02-28 2014-09-03 英飞凌科技股份有限公司 芯片布置和用于制造芯片布置的方法

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US8664750B2 (en) * 2008-11-17 2014-03-04 Advanpack Solutions Pte. Ltd. Semiconductor substrate, package and device

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JPS61204788A (ja) * 1985-03-08 1986-09-10 Dainippon Printing Co Ltd 携持用電子装置
FR2645680B1 (fr) * 1989-04-07 1994-04-29 Thomson Microelectronics Sa Sg Encapsulation de modules electroniques et procede de fabrication
DE3924439A1 (de) * 1989-07-24 1991-04-18 Edgar Schneider Traegerelement mit wenigstens einem integrierten schaltkreis, insbesondere zum einbau in chip-karten, sowie verfahren zur herstellung dieser traegerelemente

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CN100401510C (zh) * 2003-03-07 2008-07-09 Nxp股份有限公司 半导体装置、半导体主体及其制造方法
CN102171815A (zh) * 2008-11-21 2011-08-31 先进封装技术私人有限公司 半导体封装件及其制造方法
TWI421982B (zh) * 2008-11-21 2014-01-01 Advanpack Solutions Pte Ltd 半導體導線元件及其製造方法
CN102171815B (zh) * 2008-11-21 2014-11-05 先进封装技术私人有限公司 半导体封装件及其制造方法
US9847268B2 (en) 2008-11-21 2017-12-19 Advanpack Solutions Pte. Ltd. Semiconductor package and manufacturing method thereof
CN102916317A (zh) * 2011-05-03 2013-02-06 阿尔斯通运输股份有限公司 将至少一个电子元件与电源电互连的装置及相关电子系统
CN102916317B (zh) * 2011-05-03 2016-12-07 阿尔斯通运输科技公司 将至少一个电子元件与电源电互连的装置及相关电子系统
CN104021413A (zh) * 2013-02-28 2014-09-03 英飞凌科技股份有限公司 芯片布置和用于制造芯片布置的方法

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