CN1212768A - 三维蚀刻方法 - Google Patents

三维蚀刻方法 Download PDF

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CN1212768A
CN1212768A CN97192752A CN97192752A CN1212768A CN 1212768 A CN1212768 A CN 1212768A CN 97192752 A CN97192752 A CN 97192752A CN 97192752 A CN97192752 A CN 97192752A CN 1212768 A CN1212768 A CN 1212768A
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D·T·杜顿
A·B·德安
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Abstract

本文涉及一种利用单一反应性离子蚀刻操作在基片上形成三维结构的方法,在进行一系列的反复蚀刻之前,在所述基片上形成掩膜,每一反复蚀刻包含对掩膜的蚀刻和对基片的蚀刻,以便连续的反复蚀刻使掩膜区域减少和露出基片中的另一些区域。

Description

三维蚀刻方法
本发明涉及利用反应性离子蚀刻在一基片上形成三维结构。这种技术适用于各种材料，例如半导体、玻璃，聚酰亚胺或者其它可利用反应性离子的等离子体进行蚀刻的材料。
对于光约束(例如在可见光用/红外线用透镜、发射器或探测器)以及电磁约束(例如微波用电感器、探测器或信号源)需要三维的半导体结构。
已知很多技术可用于制造光约束结构例如微透镜。例如，Hutley等人提出构成一些光敏抗蚀剂的小的圆片，它们在加热熔化时由于表面张力的作用从而构成小的透镜的形状。(物理世界(physicsWorld),1991年7月，第27-32页)。
Liau等人提出通过重复地进行光刻和溴-甲醇蚀刻构成阶状结构。然后再次通过加热熔化在这种结构内部传质以形成透镜的形状(见应用物理通讯(Appl.phys.Lett.),55(2),1989,7；林肯实验室刊物，第三卷第三期，1990)。
其它形成微透镜的方法详细介绍在“具有很大潜力的微光学”(Micro-optics has macro potential)“激光聚焦世界”(Laser FocusWorld),1991年6月。包含反应性离子蚀刻的各种方法通常包含重复地涂覆光敏抗蚀剂和进行蚀刻。这样就使得制造过程很麻烦。
根据本发明，在基片上形成或改进三维表面外形的方法包含的步骤有：
(ⅰ)在基片上形成由抗蚀剂构成的掩膜，利用掩膜使基片上的某些区域得到保护，而某些区域露出，以及
(ⅱ)对基片进行多次反复蚀刻
其中每一反复蚀刻包含至少一次对抗蚀剂的蚀刻和至少一次对基片的蚀刻，利用合适的抗蚀剂的蚀刻剂对抗蚀剂进行蚀刻，通过蚀刻改进掩膜的形状并因此改进基片中露出的区域，并利用合适的基片蚀刻剂进行基片的蚀刻，掩膜对基片提供保护使之不受基片蚀刻剂的作用，并且蚀刻剂由基片中露出的区域除去材料。
在一优选实施例中，在基片上形成聚光器。
在一优选实施例中，该基片包含半导体材料。
在一优选实施例中，该基片包含InSb。
在另一优选实施例中，基片蚀刻剂包含一种CH4/H2等离子体。
在再一优选实施例中，抗蚀剂蚀刻剂包含氧等离子体。
在再一优选实施例中，在InSb异晶结构材料中形成温斯顿(Winston)锥体发射极。
下面参照如下附图介绍本发明，其中图1a-1e表示利用本发明的方法在蚀刻过程的各个阶段的有代表性的基片和掩膜。图2a和2b表示利用本发明的方法在形成微透镜的两个阶段的过程中的微透镜阵列的扫描电子显微镜所摄图像。
参阅图1a，一种圆顶或钮扣形的光刻用作掩膜的抗蚀剂1涂覆到半导体基片2上。这可由例如灰度光刻(见英国专利申请9310013.9)或抗蚀剂回流的方法形成。
然后利用基片蚀刻剂对基片进行蚀刻，抗蚀剂对基片提供保护使之不受蚀刻剂作用，以致材料从基片2上的区域可除去。这样就会产生如图1b中所示的结构。
参阅图1c，然后利用合适的抗蚀剂蚀刻剂将抗蚀剂1覆盖的区域减少，使得基片2上的另外区域4露出。
然后利用基片蚀刻剂对基片进行进一步蚀刻，以便由区域3和4除去材料，以形成图1d中所示的阶状结构。
在单一的反应性离子蚀刻的操作中，对抗蚀剂1和基片2重复进行蚀刻，形成如图1e所示的多阶状结构。
通过控制对于每一蚀刻步骤的速度和时间可以形成三维的细微结构。最终的外形的分辨率取决于在指定的结构高度范围内交替的对基片和抗蚀剂蚀刻步骤的数目。
这种技术还可以用于改进由其它技术形成的结构。
参阅图2a和2b，其中所示的微透镜是利用表面加工技术设备(STS)反应性离子蚀刻机，型号为340 PC，以及如下的蚀刻条件：
抗蚀剂蚀刻条件：
气体：O2，流量为80标准立方厘米/分(sccm)；
室内压力：60毫乇
RF功率：60瓦
基片蚀刻条件：
气体：GH4，流量为90sccm和H2，流量为10sccm；
室内压力：90毫乇
RF功率：50瓦
用12×10-6米厚的AZ 4562抗蚀剂涂复在基片(InSb)上，并利用按灰度光刻技术和离子束切削经加工成带直侧面的锥体(实现这一部分加工的其它方法对于本技术领域的技术人员是熟知的)。然后按照上述抗蚀剂蚀刻条件对试样进行抗蚀剂蚀刻5分钟。接着按照上述基片蚀刻条件对InSb加工5分钟，然后再进行5分钟抗蚀剂蚀刻。这样重复4次的5分钟对InSb蚀刻和2分钟对抗蚀剂蚀刻就得到图2a中所示的结构。
再进行另外7个步骤形成在图2b中所示的结构。
在某些条件，反应性离子蚀刻过程的放热性质引起抗蚀剂回流。这样就为该过程提供的更多的灵活性，并且可以不再需要例如利用加热片或加热炉进行按灰度光刻或非就地的抗蚀剂回流。

Claims (7)

1．一种在基片上形成或改进三维表面外形的方法，包含的步骤有：
(ⅰ)在基片上形成由抗蚀剂构成的掩膜，利用掩膜使基片上的某些区域得到保护，而某些区域露出，以及
(ⅱ)对基片进行多次反复蚀刻
其中每一反复蚀刻包含至少一次对抗蚀剂蚀刻和至少一次对基片蚀刻，利用合适的抗蚀剂蚀刻剂对抗蚀剂进行蚀刻，以改进掩膜的形状并因此改进基片上露出的区域；并且利用合适的基片蚀刻剂对基片进行蚀刻，掩膜对基片提供保护使之不受基片蚀刻剂作用，以及该蚀刻剂从基片上露出的区域除去材料。
2．如权利要求1所述的方法，其中，在基片上形成聚光器。
3．如权利要求1或2所述的方法，其中，基片包含半导体材料。
4．如权利要求3所述的方法，其中，基片包含InSb。
5．如权利要求4所述的方法，其中，基片蚀刻剂包含CH4/H2等离子体。
6．如权利要求5所述的方法，其中，抗蚀剂蚀刻剂包含氧等离子体，
7．如权利要求6所述的方法，其中，在InSb异晶结构材料中形成温斯顿锥体发射极。
CNB971927529A 1996-01-10 1997-01-09 三维蚀刻方法 Expired - Fee Related CN1135438C (zh)

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DE19904307C2 (de) * 1999-01-28 2001-09-20 Bosch Gmbh Robert Verfahren zur Herstellung von dreidimensionalen Strukturen mittels eines Ätzprozesses
DE10135872A1 (de) * 2001-07-24 2003-02-27 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Linse
JP4012156B2 (ja) * 2004-02-02 2007-11-21 独立行政法人科学技術振興機構 圧電素子の製造方法
DE112005002854T5 (de) * 2004-11-24 2007-10-11 Sumitomo Chemical Co., Ltd. Halbleitermehrschichtensubstrat, Verfahren zur Herstellung desselben und lichtemittierende Vorrichtung
WO2006101225A1 (ja) * 2005-03-22 2006-09-28 Sumitomo Chemical Company, Limited 自立基板、その製造方法及び半導体発光素子
JP2007019318A (ja) * 2005-07-08 2007-01-25 Sumitomo Chemical Co Ltd 半導体発光素子、半導体発光素子用基板の製造方法及び半導体発光素子の製造方法
GB2444448A (en) * 2005-09-29 2008-06-04 Sumitomo Chemical Co Method for producing group 3-5 nitride semiconductor and method for manufacturing light-emitting device
KR100998017B1 (ko) * 2009-02-23 2010-12-03 삼성엘이디 주식회사 발광소자 패키지용 렌즈 및 이를 구비하는 발광소자 패키지
JP5650388B2 (ja) * 2009-10-05 2015-01-07 三菱電機株式会社 有機ｅｌパネル、パネル接合型発光装置、有機ｅｌパネルの製造方法
JP2019121750A (ja) * 2018-01-11 2019-07-22 東京エレクトロン株式会社 エッチング方法およびエッチング装置
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Publication number Priority date Publication date Assignee Title
US4357704A (en) * 1980-09-15 1982-11-02 Science Applications, Inc. Disc or slab laser apparatus employing compound parabolic concentrator
US4514252A (en) 1982-11-18 1985-04-30 Hewlett-Packard Company Technique of producing tapered features in integrated circuits
CA1237824A (en) * 1984-04-17 1988-06-07 Takashi Mimura Resonant tunneling semiconductor device
JPS6144627A (ja) * 1984-08-09 1986-03-04 Pioneer Electronic Corp マイクロフレネルレンズの製造方法
EP0199497B1 (en) * 1985-04-10 1992-01-02 Fujitsu Limited Process for fabricating a self-aligned bipolar transistor
WO1987002179A1 (en) 1985-09-27 1987-04-09 Burroughs Corporation Method of fabricating a tapered via hole in polyimide
FR2590409B1 (fr) * 1985-11-15 1987-12-11 Commissariat Energie Atomique Procede de fabrication d'un transistor en couches minces a grille auto-alignee par rapport au drain et a la source de celui-ci et transistor obtenu par le procede
US4698128A (en) * 1986-11-17 1987-10-06 Motorola, Inc. Sloped contact etch process
GB8715211D0 (en) 1987-06-29 1987-08-05 Secr Defence Lensed photo detector
US5161059A (en) 1987-09-21 1992-11-03 Massachusetts Institute Of Technology High-efficiency, multilevel, diffractive optical elements
US4902377A (en) * 1989-05-23 1990-02-20 Motorola, Inc. Sloped contact etch process
US5227915A (en) 1990-02-13 1993-07-13 Holo-Or Ltd. Diffractive optical element
US5073007A (en) 1990-06-11 1991-12-17 Holo-Or Ltd. Diffractive optical element
US5316640A (en) * 1991-06-19 1994-05-31 Matsushita Electric Industrial Co., Ltd. Fabricating method of micro lens
US5286338A (en) * 1993-03-01 1994-02-15 At&T Bell Laboratories Methods for making microlens arrays
JP2795126B2 (ja) 1993-04-16 1998-09-10 株式会社デンソー 曲面加工方法及びその装置
US5853960A (en) * 1998-03-18 1998-12-29 Trw Inc. Method for producing a micro optical semiconductor lens

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CA2242634C (en) 2006-08-15
GB2322833A (en) 1998-09-09
CA2242634A1 (en) 1997-07-17
US6682657B2 (en) 2004-01-27
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PL194893B1 (pl) 2007-07-31
EP0873542B1 (en) 2011-04-27
JP2000503136A (ja) 2000-03-14
DE69740180D1 (de) 2011-06-09
GB9600469D0 (en) 1996-03-13
US20030057177A1 (en) 2003-03-27
KR19990077120A (ko) 1999-10-25
WO1997025653A1 (en) 1997-07-17
ATE507496T1 (de) 2011-05-15
EP0873542A1 (en) 1998-10-28
JP3965213B2 (ja) 2007-08-29
GB9813813D0 (en) 1998-08-26
AU1388497A (en) 1997-08-01
CN1135438C (zh) 2004-01-21
PL327667A1 (en) 1998-12-21
GB2322833B (en) 1999-10-20

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