CN1186725C - 减少信号路径延迟的列冗余电路 - Google Patents

减少信号路径延迟的列冗余电路 Download PDF

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Publication number
CN1186725C
CN1186725C CNB998128104A CN99812810A CN1186725C CN 1186725 C CN1186725 C CN 1186725C CN B998128104 A CNB998128104 A CN B998128104A CN 99812810 A CN99812810 A CN 99812810A CN 1186725 C CN1186725 C CN 1186725C
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CN
China
Prior art keywords
redundant
column
signal
standard
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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CNB998128104A
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English (en)
Chinese (zh)
Other versions
CN1331818A (zh
Inventor
魏方兴
菊川裕仁
辛西娅·马尔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mosaid Technologies Inc
Panasonic Holdings Corp
Original Assignee
Mosaid Technologies Inc
Matsushita Electric Industrial Co Ltd
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Application filed by Mosaid Technologies Inc, Matsushita Electric Industrial Co Ltd filed Critical Mosaid Technologies Inc
Publication of CN1331818A publication Critical patent/CN1331818A/zh
Application granted granted Critical
Publication of CN1186725C publication Critical patent/CN1186725C/zh
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CNB998128104A 1998-10-30 1999-10-29 减少信号路径延迟的列冗余电路 Expired - Lifetime CN1186725C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/182,495 1998-10-30
US09/182,495 US6137735A (en) 1998-10-30 1998-10-30 Column redundancy circuit with reduced signal path delay

Publications (2)

Publication Number Publication Date
CN1331818A CN1331818A (zh) 2002-01-16
CN1186725C true CN1186725C (zh) 2005-01-26

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ID=22668727

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB998128104A Expired - Lifetime CN1186725C (zh) 1998-10-30 1999-10-29 减少信号路径延迟的列冗余电路

Country Status (10)

Country Link
US (1) US6137735A (enExample)
EP (2) EP1526458B8 (enExample)
JP (1) JP4965025B2 (enExample)
KR (1) KR100724816B1 (enExample)
CN (1) CN1186725C (enExample)
AT (1) ATE278217T1 (enExample)
AU (1) AU1024500A (enExample)
CA (1) CA2347765C (enExample)
DE (2) DE69939716D1 (enExample)
WO (1) WO2000026784A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100363085B1 (ko) * 1999-11-05 2002-12-05 삼성전자 주식회사 리던던시 효율을 향상시키는 로우 리던던시 스킴을 갖는반도체장치
JP2002050191A (ja) * 2000-08-02 2002-02-15 Fujitsu Ltd 半導体記憶装置
US6775759B2 (en) * 2001-12-07 2004-08-10 Micron Technology, Inc. Sequential nibble burst ordering for data
US20040015645A1 (en) * 2002-07-19 2004-01-22 Dodd James M. System, apparatus, and method for a flexible DRAM architecture
US6674673B1 (en) 2002-08-26 2004-01-06 International Business Machines Corporation Column redundancy system and method for a micro-cell embedded DRAM (e-DRAM) architecture
EP1717814B1 (en) * 2004-02-20 2012-09-19 Spansion LLc Semiconductor storage device and semiconductor storage device control method
US7035152B1 (en) * 2004-10-14 2006-04-25 Micron Technology, Inc. System and method for redundancy memory decoding
US7251173B2 (en) * 2005-08-02 2007-07-31 Micron Technology, Inc. Combination column redundancy system for a memory array
CN105355233B (zh) * 2015-11-23 2018-04-10 清华大学 基于pcm反转纠错算法的高效数据写入方法
CN107389211B (zh) * 2017-06-29 2019-03-12 西安邮电大学 一种二进制码转温度计码电路

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4598388A (en) * 1985-01-22 1986-07-01 Texas Instruments Incorporated Semiconductor memory with redundant column circuitry
JP2564507B2 (ja) * 1985-04-16 1996-12-18 富士通株式会社 半導体記憶装置
JPH01125799A (ja) * 1987-11-11 1989-05-18 Fujitsu Ltd 半導体記憶装置
US5270975A (en) * 1990-03-29 1993-12-14 Texas Instruments Incorporated Memory device having a non-uniform redundancy decoder arrangement
DE69132951T2 (de) * 1991-08-28 2002-09-12 Oki Electric Industry Co., Ltd. Halbleiter-speicher-vorrichtung
US5257229A (en) * 1992-01-31 1993-10-26 Sgs-Thomson Microelectronics, Inc. Column redundancy architecture for a read/write memory
US5268866A (en) * 1992-03-02 1993-12-07 Motorola, Inc. Memory with column redundancy and localized column redundancy control signals
ATE187826T1 (de) * 1994-08-12 2000-01-15 Siemens Ag Redundanz-schaltungsanordnung für einen integrierten halbleiterspeicher
KR0130030B1 (ko) * 1994-08-25 1998-10-01 김광호 반도체 메모리 장치의 컬럼 리던던시 회로 및 그 방법
US5572470A (en) * 1995-05-10 1996-11-05 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column
JPH0955080A (ja) * 1995-08-08 1997-02-25 Fujitsu Ltd 半導体記憶装置及び半導体記憶装置のセル情報の書き込み及び読み出し方法
DE59510258D1 (de) * 1995-08-09 2002-08-08 Infineon Technologies Ag Integrierte Halbleiter-Speichervorrichtung mit Redundanzschaltungsanordnung
US5646896A (en) * 1995-10-31 1997-07-08 Hyundai Electronics America Memory device with reduced number of fuses
US5732030A (en) * 1996-06-25 1998-03-24 Texas Instruments Incorporated Method and system for reduced column redundancy using a dual column select
JPH10275493A (ja) * 1997-03-31 1998-10-13 Nec Corp 半導体記憶装置
CA2202692C (en) * 1997-04-14 2006-06-13 Mosaid Technologies Incorporated Column redundancy in semiconductor memories
KR100281284B1 (ko) * 1998-06-29 2001-02-01 김영환 컬럼 리던던시 회로

Also Published As

Publication number Publication date
KR20010085983A (ko) 2001-09-07
EP1526458A2 (en) 2005-04-27
EP1526458B1 (en) 2008-10-08
US6137735A (en) 2000-10-24
JP2002529874A (ja) 2002-09-10
EP1125203B1 (en) 2004-09-29
KR100724816B1 (ko) 2007-06-04
JP4965025B2 (ja) 2012-07-04
EP1526458A3 (en) 2006-03-29
CN1331818A (zh) 2002-01-16
DE69920735D1 (de) 2004-11-04
CA2347765C (en) 2008-07-29
AU1024500A (en) 2000-05-22
EP1125203A1 (en) 2001-08-22
DE69939716D1 (de) 2008-11-20
CA2347765A1 (en) 2000-05-11
ATE278217T1 (de) 2004-10-15
EP1526458B8 (en) 2008-12-24
WO2000026784A1 (en) 2000-05-11
DE69920735T2 (de) 2005-02-10

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Owner name: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

Free format text: FORMER NAME: MOSAID TECH INC

CP01 Change in the name or title of a patent holder

Address after: Ontario, Canada

Patentee after: MOSAID TECHNOLOGIES Inc.

Patentee after: Matsushita Electric Industrial Co.,Ltd.

Address before: Ontario, Canada

Patentee before: MOSAID TECHNOLOGIES Inc.

Patentee before: Matsushita Electric Industrial Co.,Ltd.

CX01 Expiry of patent term

Granted publication date: 20050126

CX01 Expiry of patent term