CN117832071A - 通过选择性沉积的硅化物膜 - Google Patents

通过选择性沉积的硅化物膜 Download PDF

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Publication number
CN117832071A
CN117832071A CN202311645258.2A CN202311645258A CN117832071A CN 117832071 A CN117832071 A CN 117832071A CN 202311645258 A CN202311645258 A CN 202311645258A CN 117832071 A CN117832071 A CN 117832071A
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Prior art keywords
substrate
metal
exposing
silicon
film
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S·斯里尼瓦桑
A·玛里克
N·布赖尔
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Applied Materials Inc
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Applied Materials Inc
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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Abstract

公开了用于形成硅化物膜的方法。公开了在被进一步处理以形成硅化物膜的硅表面上选择性地沉积含金属膜的方法。本公开的具体的实施方式涉及在FinFET结构上形成硅化物膜而不在电介质上形成金属层。

Description

通过选择性沉积的硅化物膜
本申请是申请日为2018年12月14日、申请号为201880086359.1、名称为“通过选择性沉积的硅化物膜”的中国专利申请(PCT申请号为PCT/US2018/065686)的分案申请。
技术领域
本公开的实施方式涉及用于形成硅化物膜的方法。更具体地，本公开的实施方式涉及在被进一步处理以形成硅化物膜的硅表面上选择性地沉积膜的方法。
背景技术
鳍式场效应晶体管，也被称为FinFET，是在现代处理器设计中使用的一种类型的非平面或三维晶体管。就像在更早前的平面设计中一样，FinFET典型地构建在SOI(绝缘体上硅)基板上。然而，FinFET设计还使用了上升到绝缘体的水平上方的导电通道，从而形成形状像鳍的薄硅基结构，它被称为栅电极。此鳍状电极允许多个栅极在单个晶体管上操作。与主流CMOS技术相比，FinFET器件还具有显著更快的切换时间和更高的电流密度。
持续存在对新的FinFET设计的需要。具体地，存在对新的材料和表面组合物的需要以允许一组扩展设计选项。选择性沉积已经展示出是有前景的，因为它具有允许在选择表面上沉积膜并简化集成方案的潜力。
材料的选择性沉积可以以多种方式完成。例如，一些工艺可只基于表面的表面化学物质而具有对该表面的固有选择性。这些工艺极其少见并通常需要具有极为不同的表面能的表面，诸如金属和电介质。在FinFET中以及在表面类似(例如，SiO2对SiN)的其他情况下，需要通过采用与一个表面选择性地反应而不与其他表面选择性地反应的表面处理来选择性地阻挡表面，从而在后续沉积工艺期间有效地阻止任何表面反应。然而，一些沉积前驱物没有通过当前技术被有效地阻挡。
因此，本领域中持续存在对抑制在某些表面上的沉积而在其他表面上选择性地沉积膜的方法和材料的需要。
发明内容
本公开的一个或多个实施方式针对一种基板处理方法，包括提供基板，所述基板包括第一半导体表面和第二电介质表面。将所述基板暴露于阻挡化合物以相对于所述第一表面在所述第二表面上选择性地形成阻挡层。将所述基板暴露于钛前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ti层。加热所述基板以形成包含钛和硅的经改性的第一表面。
本公开的附加的实施方式针对一种基板处理方法，包括提供基板，所述基板包括第一半导体表面和第二电介质表面。将所述基板暴露于阻挡化合物以在所述第二表面上选择性地形成阻挡层。将所述基板暴露于钛前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ti层。将所述基板暴露于锗前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ge层。加热所述基板以形成包含钛、锗和硅的经改性的第一表面。
本公开的进一步实施方式针对一种基板处理方法，包括提供基板，所述基板包括第一硅表面和第二氧化硅表面。将所述基板暴露于阻挡化合物以在所述第二表面上选择性地形成阻挡层。将所述基板暴露于钛前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ti层。将所述基板暴露于硅前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Si层。加热所述基板以形成基本上由TiSi2组成的经改性的第一表面。
附图说明
以能够详细地理解本公开的上述特征的方式，可参考实施方式来对上文简要概述的本公开进行更具体的描述，其中一些在附图中示出。然而，应注意，附图仅示出了本公开的典型的实施方式并因此不应视为对本公开的范围的限制，因为本公开可允许其他等效实施方式。
图1示出了根据本公开的一个或多个实施方式的选择性沉积工艺；以及
图2示出了根据本公开的一个或多个实施方式的用于在半导体表面上选择性地沉积含钛层的示例性工艺顺序。
在附图中，类似部件和/或特征可具有相同附图标记。进一步地，相同类型的各种部件可通过在附图标记后加上区分类似部件的划线和第二标记来区分。如果在本说明书中仅使用了第一附图标记，那么不管第二附图标记如何，所述描述适用于具有相同第一附图标记的类似部件中的任一个。
具体实施方式
在描述本公开的若干示例性实施方式之前，应理解，本公开不限于以下描述中阐述的构造或工艺步骤的细节。本公开能够具有其他实施方式并能够以各种方式实践或实施。
本公开的实施方式提供了用于处理基板的方法，所述方法造成在半导体表面而非电介质表面上形成TiSi膜。各种实施方式的工艺使用选择性沉积在基板的被进一步处理的部分上形成膜。
如本文中所使用的，“基板表面”是指基板的任何部分或形成在基板上的材料表面的部分，在所述部分上执行膜处理。例如，其上可执行处理的基板表面包括以下材料，诸如硅、氧化硅、氮化硅、掺杂硅、锗、砷化镓、玻璃、蓝宝石和任何其他材料(诸如金属、金属氮化物、金属合金和其他导电材料)，这取决于应用。基板包括但不限于半导体晶片。基板可暴露于预处理工艺以对基板表面进行抛光、蚀刻、还原、氧化、羟化、退火、UV固化、电子束固化和/或烘烤。除了直接地在基板本身的表面上进行的膜处理之外，在本发明中，所公开的膜处理步骤中的任一个还可如下文更详细公开地在形成在基板上的下层上执行，并且术语“基板表面”旨在包括如上下文所指示的此类下层。因此，例如，在膜/层或部分膜/层已经沉积到基板表面上的情况下，新沉积的膜/层的暴露表面就变成了基板表面。基板可具有各种尺寸，诸如200mm或300mm直径晶片，以及矩形或方形窗格。在一些实施方式中，基板包括刚性离散材料。
如本文中所使用的，“原子层沉积”是指将基板顺序地暴露于两种或更多种沉积气体以在基板表面上沉积材料层。如在本说明书和所附权利要求书中所使用的，术语“反应化合物”、“反应气体”、“反应物质”、“前驱物”、“工艺气体”、“沉积气体”等可互换地使用以表示具有能够在化学反应(例如，取代、消除、添加、氧化、还原)中与基板表面或在基板表面上的材料反应的物种的物质。基板或基板的部分顺序地暴露于被引入处理腔室的反应区中的两种或更多种反应化合物。在时域工艺中，暴露于每种反应化合物以一定时间延迟分开，从而允许每种化合物与基板表面反应并然后从处理腔室被净化。在空间工艺中，基板表面的不同部分或在基板表面上的材料同时地暴露于两种或更多种反应化合物，使得基板上的任何给定点基本上不同时地暴露于多于一种反应化合物。如在本说明书和所附权利要求书中所使用的，在这方面所使用的术语“基本上”如本领域的技术人员将理解的那样表示，存在基板的一小部分可能因扩散而被同时暴露于多种反应气体的可能性，并且同时暴露是不想要的。
在时域工艺的一个方面中，将第一反应气体(即，第一前驱物或化合物A)脉冲到反应区中，之后是第一时间延迟。接下来，将第二前驱物或化合物B脉冲到反应区中，之后是第二延迟。在每个时间延迟期间，将净化气体(诸如氩)引入处理腔室中以净化反应区或以其他方式从反应区去除任何残余反应化合物或反应副产物。作为可替代地，净化气体可在整个沉积工艺中持续地流动，使得在反应化合物的脉冲之间的时间延迟期间仅净化气体流动。替代地脉冲反应化合物，直到在基板表面上形成所期望的分子层或层厚度。在任一场景中，脉冲化合物A、净化气体、化合物B和净化气体的工艺是一个循环。循环可从化合物A或化合物B开始，并继续该循环的相应次序，直到实现具有预定厚度的膜为止。
在空间工艺的实施方式中，第一反应气体和第二反应气体被同时递送到反应区，但是被惰性气帘和/或真空帘分开。基板相对于气体递送设备移动，使得在基板上的任何给定点都暴露于第一反应气体和第二反应气体，尽管并不是同时地暴露于第一反应气体和第二反应气体。
本公开的一个或多个实施方式有利地提供了处理基板的方法，所述方法包括在半导体表面(例如，硅)上选择性地沉积膜而在电介质表面(例如，氧化硅)上基本上没有沉积。在一些实施方式中，通过组合选择性表面阻挡步骤来有利地实现选择性沉积，该选择性表面阻挡步骤利用了与电介质表面选择性地反应以形成阻挡表面的阻挡化合物。沉积在保持未被阻挡的其他基板表面上进行。
可实施本公开的一个或多个实施方式的一般表面机制以阻挡电介质表面并在随后当在半导体表面上沉积膜的同时停止或最小化在其上的这些膜的沉积。不受任何特定操作理论的束缚，认为当本文中所描述的阻挡化合物与本文中所描述的前驱物一起使用时，可防止前驱物与电介质表面反应。
在一些实施方式中，可使电介质表面基团与具有与-OH封端有反应性且不与-H封端有反应性的阻挡分子反应。这些分子可经由气相递送以溶液的形式或以纯态的形式被引入到基板。在选择性表面阻挡之后，可采用ALD或CVD工艺在半导体表面上选择性地生长膜。
参考图1和图2，本公开的一个或多个实施方式针对基板处理的方法200。该方法包括提供基板，所述基板包含第一材料20和第二材料30。如以此方式使用的，术语“提供基板”意味着将基板放置在用于进行处理的位置(例如，在处理腔室内)。在一些实施方式中，第一材料20包括半导体，并且第一材料20具有半导体表面25。在一些实施方式中，第二材料30包括电介质，并且第二材料30具有电介质表面35。就此而言，半导体表面25可被称为第一半导体表面。类似地，电介质表面35可被称为第二电介质表面。应理解，本公开不要求多个电介质表面。
第一材料20可以是任何合适的半导体材料。在一些实施方式中，第一材料20基本上由硅组成。如在本说明书和所附权利要求书中所使用的，“基本上由所陈述的组合物组成”的材料意味着材料的大于或等于约95％、98％或99％是所陈述的组合物。
第二材料30可以是任何合适的电介质材料。在一些实施方式中，第二材料30包括氧化硅。在一些实施方式中，第二材料30基本上由SiO2组成。就此而言，氧化硅是包含硅和氧的任何合适的材料。在一些实施方式中，第二表面35基本上由硅和氧组成。在一些实施方式中，第二表面35的材料是化学计量的氧化硅。在一些实施方式中，第二表面35中的硅与氧的比率为约1:2。在一些实施方式中，硅原子与氧原子的比率为非化学计量比。在一些实施方式中，第二表面35中的硅与氧的比率小于1:2。在一些实施方式中，第二表面35中的硅与氧的比率大于1:2。
图1示出了根据本文中所描述的一个或多个实施方式的具有在其上形成的三维(3D)结构的基板10的示意性截面图。在一些实施方式中，基板10包括从基底材料层延伸的3D结构。在一些实施方式中，基底材料层可以是电介质材料，诸如氧化物、氮化物等。例如，基板10可以是绝缘体上硅基板。本文中所描述的实施方式一般参考300mm圆形基板进行，然而，设想的是，各种其他基板尺寸可受益于本文所描述的实施方式。
基板的3D结构可通过各种图案化和蚀刻工艺形成在基底材料层上。在一些实施方式中，可以以适合于实施作为互补金属氧化物半导体(CMOS)晶体管中的鳍式场效应晶体管(FinFET)的尺寸形成3D结构，然而，其他晶体管类型、基板特征和无特征的基板表面也可受益于本文中所描述的实施方式。在一些实施方式中，3D结构可适合于并可具有与在当前技术节点和先进技术节点(诸如低于10nm的节点)中的使用相称的尺寸。
3D结构可以是与基底材料层相同的材料，或者可以是与基底材料层不同的材料(如图1所示)。在一些实施方式中，3D结构可由硅形成。在一些实施方式中，3D结构从基底材料层延伸并由沟槽间隔开。
在202，将包括第一表面25和第二表面35的基板10暴露于阻挡化合物。阻挡化合物可以是可与第二表面35而非第一表面25反应的任何合适的化合物。阻挡化合物与第二表面35反应以在第二表面35上形成阻挡层40。
在一些实施方式中，阻挡化合物包含通式R3Si-X的化合物，其中每个R独立地为C1-C4烷基，并且X为离去基团。如就此所使用地，C1-C4烷基表示具有1-4个碳原子的饱和碳链。在一些实施方式中，这些碳链是直链的。在一些实施方式中，这些碳链是支链的。在一些实施方式中，每个R为甲基。在一些实施方式中，X选自卤化物、叠氮化物、氨基、酰肼、氰化物或异氰酸酯基团。
在一些实施方式中，X包含具有直链C1-6烷基或支链C1-4烷基基团的伯、仲或叔胺。在一些实施方式中，X是具有多达6元环的环胺。在一些实施方式中，X包含环状吡咯基基团(-N(CH2)4)。在一些实施方式中，X包含环状吡咯烷基基团(-N(CH)4)。在一些实施方式中，阻挡化合物包括三甲基甲硅烷基吡咯烷(CH3)3SiN(CH2)4。在一些实施方式中，阻挡化合物基本上由三甲基甲硅烷基吡咯烷组成。三甲基甲硅烷基吡咯烷是式I的化合物：
如以此方式所使用的，术语“基本上由……组成”意味着以摩尔计，阻挡化合物的反应组分(不包括惰性、稀释或载体物质)大于或等于所述物质的约95％、98％或99％。
阻挡层可在任何合适的温度下形成。在一些实施方式中，将基板维持在范围为约200℃至约500℃的温度、范围为约250℃至约450℃的温度、范围为约250℃至约400℃的温度或范围为约300℃至约450℃的温度下。在一些实施方式中，将基板维持在小于或等于约450℃、小于或等于约400℃、小于或等于约375℃、小于或等于约350℃、小于或等于约300℃或小于或等于约250℃的温度下。在一些实施方式中，将基板维持为在大于或等于约200℃、大于或等于约225℃、大于或等于约250℃、大于或等于约300℃或大于或等于约350℃的温度下。
在204，在形成阻挡层40之后，可在第一表面25上执行金属层50的选择性沉积。可通过技术人员所已知的任何合适的沉积技术来沉积金属层50。合适的技术包括但不限于化学气相沉积、原子层沉积或物理气相沉积。在一些实施方式中，金属层50包含钛，并且金属层50通过原子层沉积来进行沉积。
以下描述公开了用于在基板10上沉积金属层的一般工艺。在一些实施方式中，金属是钛，并且金属层是含钛层50。在一些实施方式中，金属层还包含与钛合金化的附加金属。
在一些实施方式中，锗与钛合金化。在一些实施方式中，锗与钛分开地沉积以形成双层膜。
将包括第一表面25和阻挡层40的基板10暴露于金属前驱物。在一些实施方式中，金属前驱物化学吸附到第一表面25上以在第一表面25上沉积金属物质层。在这些实施方式中，在第一表面25上的金属物质层与试剂反应以形成金属膜。在一些实施方式中，同时将金属前驱物和试剂暴露于基板10并反应以在第一表面25上形成金属膜。在一些实施方式中，分开地将金属前驱物和试剂各自暴露于基板10。在一些实施方式中，同时地将金属前驱物和试剂暴露于基板10。一些实施方式通过时域ALD工艺沉积金属膜50。一些实施方式通过空间ALD工艺沉积金属膜50。
金属膜是用于描述含金属的材料的通用术语。在一些实施方式中，金属膜是纯金属膜。如就此所使用地，“纯金属膜”表示以原子计(不包括氢)，金属原子大于或等于金属膜的约98％、99％或99.5％。在一些实施方式中，金属膜包含其他原子。在一些实施方式中，金属膜包含氧、氮、碳、硅、硼或锗中的一种或多种。
金属前驱物可以是可与试剂反应以形成金属膜50的任何合适的化合物。在一些实施方式中，金属前驱物包含至少一种胺配体。在一些实施方式中，金属前驱物包含式M(NR’ 2)a的化合物，其中每个R’独立地为H、C1-C4烷基或三甲基甲硅烷基，并且a大于或等于1。如就此所使用地，C1-C4烷基表示具有1-4个碳原子的饱和碳链。在一些实施方式中，这些碳链是直链的。在一些实施方式中，这些碳链是支链的。
在一些实施方式中，R’基本上由乙基基团组成。在一些实施方式中，R’基本上由甲基基团组成。在一些实施方式中，在单个配体内的R’基团是相同的(例如，N(CH3)2)。在一些实施方式中，在单个配体内的R’基团是不同的(例如，N(CH3)(C2H5))。在一些实施方式中，金属前驱物基本上由四(乙基甲基氨基)钛组成。如以此方式所使用的，术语“基本上由……组成”表示以摩尔计，金属前驱物的反应组分(不包括惰性、稀释或载体物质)大于或等于所述物质的约95％、98％或99％。
在一些实施方式中，金属前驱物包含至少一种卤化物配体。在一些实施方式中，金属前驱物不包含任何金属卤化物。在一些实施方式中，膜包含钛，并且金属前驱物不包含任何TiCl4。
在一些实施方式中，金属前驱物包含至少一种氧代配体。在一些实施方式中，氧代配体具有通式-OR*，其中R*是C1-C8烷基基团。在一些实施方式中，至少一个氧代配体选自由以下项组成的组：甲氧基、乙氧基、丙氧基、异丙氧基、丁氧基、叔丁氧基和乙基己氧基。
金属前驱物的金属可以是任何合适的金属。在一些实施方式中，金属前驱物的金属选自Ti、Zr、Hf或Ta。在一些实施方式中，金属前驱物基本上由包含Ti的化合物组成。就此而言，金属前驱物可被称为钛前驱物。在一些实施方式中，金属前驱物基本上由包含Zr的化合物组成。在一些实施方式中，金属前驱物基本上由包含Hf的化合物组成。在一些实施方式中，金属前驱物基本上由包含Ta的化合物组成。
试剂可以是可与金属前驱物反应以形成金属膜50的任何合适的化合物。在一些实施方式中，将试剂暴露于与金属前驱物分开的基板。合适的试剂可包括但不限于氢、氨、肼、肼衍生物、硅烷、卤代硅烷、聚硅烷、硼烷、卤代硼烷和用于制作金属、金属氮化物、金属硅化物和/或金属硼化物膜的其他共试剂。合适的试剂还可包括但不限于氧、臭氧、水和用于制作金属或金属氧化物膜的其他基于氧的试剂。在一些实施方式中，试剂的等离子体用于形成金属膜50。在一些实施方式中，试剂的等离子体是远程生成的。在一些实施方式中，试剂包含氢、氨或水中的一种或多种。
在一些实施方式中，试剂基本上由氢组成，并且金属膜是纯金属膜。在一些实施方式中，试剂基本上由氨组成，并且金属膜是金属氮化物膜。在一些实施方式中，试剂基本上由水组成，并且金属膜是金属氧化物膜。如以此方式所使用的，术语“基本上由……组成”意味着以摩尔计，试剂(不包括惰性、稀释或载体物质)大于或等于所述组分的约95％、98％或99％。如就此所使用地，纯金属膜是基本上由金属原子组成的任何膜。如就此所使用地，金属氮化物膜是包含金属和氮原子的任何膜。如就此所使用地，金属氧化物膜是包含金属和氧原子的任何膜。包含除金属以外的原子(例如，金属氮化物或金属氧化物)的膜可包含或可不包含以化学计量比计的原子。
在206，在第一表面上沉积含锗层。含锗层的沉积是可选工艺。在一些实施方式中，在第一表面上沉积含钛层，并且在第一表面上也沉积了含锗层。在一些实施方式中，首先沉积含钛层。在一些实施方式中，首先沉积含锗层。
可通过任何合适的工艺来沉积含锗层。在一些实施方式中，通过类似于上文针对其中锗是所述金属的金属层所描述的工艺的工艺来沉积含锗层。
在208，在第一表面上沉积含硅层。含硅层的沉积是可选工艺。在一些实施方式中，在第一表面上沉积含钛层，并且在第一表面上也沉积了含硅层。在一些实施方式中，首先沉积含钛层。在一些实施方式中，首先沉积含硅层。
可通过任何合适的工艺来沉积含硅层。在一些实施方式中，通过类似于上文针对其中硅是所述金属的金属层描述的工艺的工艺来沉积含硅层。在一些实施方式中，通过将基板暴露于硅前驱物来沉积含硅层。在一些实施方式中，还将基板暴露于反应物。在一些实施方式中，在第一表面和阻挡层两者上沉积含硅层。在一些实施方式中，可通过PVD和/或CVD来沉积含硅层。在一些实施方式中，含硅层是非晶的。在一些实施方式中，含硅层是多晶的。在一些实施方式中，含硅层是外延沉积的。
在210，在形成金属膜50之后，加热基板以形成经改性的第一表面60。不受理论的约束。认为加热基板使金属层结合到半导体材料的表面(即，第一表面25)中。在一些实施方式中，经改性的第一表面60包括硅化物。在一些实施方式中，经改性的第一表面60包括钛和硅。在一些实施方式中，经改性的第一表面60基本上由TiSi2组成。
在一些实施方式中，工艺210包括退火工艺。在一些实施方式中，经改性的第一表面60包含TiSi-C49。在一些实施方式中，形成经改性的第一表面60包括在范围为约500℃至约700℃的温度下使基板退火以形成TiSi-C49。在一些实施方式中，执行退火工艺大于约1分钟。在一些实施方式中，形成经改性的第一表面60包括将基板激光退火到范围为约800℃至约1000℃的温度以形成TiSi-C49。在一些实施方式中，激光退火工艺是毫秒激光退火。
在一些实施方式中，经改性的第一表面60包含TiSi-C54。在一些实施方式中，形成经改性的第一表面60包括使基板在范围为约700℃至约900℃的温度下退火以形成TiSi-C54。在一些实施方式中，执行退火工艺大于约1分钟。在一些实施方式中，形成经改性的第一表面60包括将基板激光退火到范围为约1000℃至约1200℃的温度以形成TiSi-C54。在一些实施方式中，激光退火工艺是毫秒激光退火。
尽管本文中的公开内容已经参考特定实施方式进行描述，但是应理解，这些实施方式仅示出了本公开的原理和应用。本领域的技术人员将清楚，在不脱离本公开的精神和范围的情况下，可对本公开的方法和设备作出各种修改和变化。因此，本公开旨在包括在所附权利要求书和其等效物的范围内的修改和变化。

Claims (20)

1.一种选择性沉积方法，包括：
将基板暴露于阻挡化合物以在第二电介质表面上选择性地形成阻挡层，所述基板包括第一半导体表面和所述第二电介质表面；
将所述基板暴露于钛前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ti层；
将所述基板暴露于硅前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Si层；以及
退火所述基板以形成包括钛和硅的经改性的第一表面。
2.如权利要求1所述的方法，其中所述含Si层是非晶的。
3.如权利要求1所述的方法，其中所述经改性的第一表面包括TiSi-C49。
4.如权利要求1所述的方法，其中所述经改性的第一表面包括TiSi-C54。
5.一种选择性沉积方法，包括：
将具有包括第一半导体表面和第二电介质表面的基板表面的基板暴露于阻挡化合物以相对于所述第一表面在所述第二表面上选择性地形成阻挡层；
将所述基板表面暴露于钛前驱物以相对于所述第二表面在所述第一表面上选择性地沉积含Ti膜；以及
退火所述基板以形成包括钛和硅的经改性的第一表面。
6.如权利要求5所述的方法，其中将所述基板在范围为约500℃至约900℃的温度下退火达大于约1分钟的时间段。
7.如权利要求5所述的方法，其中通过毫秒激光退火将所述基板在范围为约800℃至约1200℃的温度下退火。
8.一种选择性沉积方法，包括：
将具有包括第一半导体表面和第二电介质表面的基板表面的基板暴露于阻挡化合物以相对于所述第一表面在所述第二表面上选择性地形成阻挡层；
将所述基板表面暴露于金属前驱物以相对于所述第二表面在所述第一表面上选择性地沉积金属膜，所述金属前驱物包括Ti、Zr、Hf或Ta中的一者或多者；以及
加热所述基板以形成包括金属和硅的经改性的第一表面。
9.如权利要求8所述的方法，其中所述阻挡化合物包括通式为R3Si-X的阻挡剂，其中每个R独立地为C1-C4烷基，并且X为任何离去基团。
10.如权利要求9所述的方法，其中X是选自卤化物、叠氮化物、氨基、酰肼、氰化物或异氰酸酯的离去基团。
11.如权利要求8所述的方法，其中将所述基板在范围为约200℃至约500℃的温度下暴露于所述阻挡化合物。
12.如权利要求8所述的方法，其中所述金属前驱物包括包含至少一种卤化物配体的物质。
13.如权利要求8所述的方法，其中所述金属前驱物不包含任何金属卤化物。
14.如权利要求8所述的方法，其中所述金属前驱物包括包含通式为–OR*的至少一种氧代配体的物质，其中R*是C1-C8烷基基团。
15.如权利要求14所述的方法，其中所述至少一种氧代配体选自由以下各项组成的群组：甲氧基、乙氧基、丙氧基、异丙氧基、丁氧基、叔丁氧基和乙基己氧基。
16.如权利要求8所述的方法，其中将所述基板暴露于金属前驱物进一步包括将所述基板暴露于试剂，所述试剂包括氢、氨或水中的一者或多者。
17.如权利要求16所述的方法，其中所述试剂基本上由氢组成，并且所述金属膜是纯金属膜。
18.如权利要求16所述的方法，其中所述试剂基本上由氨组成，并且所述金属膜是金属氮化物膜。
19.如权利要求16所述的方法，其中所述试剂基本上由水组成，并且所述金属膜是金属氧化物膜。
20.如权利要求19所述的方法，其中所述经改性的第一表面包括硅化物。
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US10607841B2 (en) 2020-03-31
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US20200227265A1 (en) 2020-07-16
CN111602228A (zh) 2020-08-28
US10950450B2 (en) 2021-03-16
KR20200088519A (ko) 2020-07-22
CN111602228B (zh) 2023-12-12
US11978635B2 (en) 2024-05-07
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