CN116867274A - 存储器装置 - Google Patents

存储器装置 Download PDF

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Publication number
CN116867274A
CN116867274A CN202211070105.5A CN202211070105A CN116867274A CN 116867274 A CN116867274 A CN 116867274A CN 202211070105 A CN202211070105 A CN 202211070105A CN 116867274 A CN116867274 A CN 116867274A
Authority
CN
China
Prior art keywords
electrode unit
area
region
memory device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211070105.5A
Other languages
English (en)
Chinese (zh)
Inventor
川西绚子
荒井伸也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kioxia Corp
Original Assignee
Kioxia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kioxia Corp filed Critical Kioxia Corp
Publication of CN116867274A publication Critical patent/CN116867274A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/60Arrangements for protection of devices protecting against electrostatic charges or discharges, e.g. Faraday shields
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00Direct bonding of chips, wafers or substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B80/00Assemblies of multiple devices comprising at least one memory device covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00Direct bonding of chips, wafers or substrates
    • H10W80/301Bonding techniques, e.g. hybrid bonding
    • H10W80/327Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/297Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/792Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Non-Volatile Memory (AREA)
CN202211070105.5A 2022-03-24 2022-08-30 存储器装置 Pending CN116867274A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022-048021 2022-03-24
JP2022048021A JP7757223B2 (ja) 2022-03-24 2022-03-24 メモリデバイス

Publications (1)

Publication Number Publication Date
CN116867274A true CN116867274A (zh) 2023-10-10

Family

ID=88096429

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211070105.5A Pending CN116867274A (zh) 2022-03-24 2022-08-30 存储器装置

Country Status (4)

Country Link
US (2) US12388031B2 (https=)
JP (1) JP7757223B2 (https=)
CN (1) CN116867274A (https=)
TW (1) TWI834241B (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240057523A (ko) * 2022-10-24 2024-05-03 삼성전자주식회사 반도체 패키지
EP4566095A1 (en) * 2023-09-25 2025-06-11 Yangtze Memory Technologies Co., Ltd. Semiconductor device having dummy pad and method for forming the same

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106910746B (zh) * 2017-03-08 2018-06-19 长江存储科技有限责任公司 一种3d nand存储器件及其制造方法、封装方法
US11114171B2 (en) * 2017-11-08 2021-09-07 Samsung Electronics Co., Ltd. Non-volatile memory device
JP2019153675A (ja) 2018-03-02 2019-09-12 ルネサスエレクトロニクス株式会社 固体撮像装置およびその製造方法
KR102624170B1 (ko) * 2018-04-30 2024-01-12 삼성전자주식회사 3차원 반도체 메모리 장치
JP7273488B2 (ja) 2018-12-04 2023-05-15 ソニーセミコンダクタソリューションズ株式会社 半導体装置、及び電子機器
US10665607B1 (en) 2019-01-18 2020-05-26 Sandisk Technologies Llc Three-dimensional memory device including a deformation-resistant edge seal structure and methods for making the same
WO2021003635A1 (en) * 2019-07-08 2021-01-14 Yangtze Memory Technologies Co., Ltd. Structure and method for forming capacitors for three-dimensional nand
KR102739662B1 (ko) * 2019-09-02 2024-12-10 삼성전자주식회사 3차원 반도체 메모리 소자
US11233043B2 (en) * 2019-09-02 2022-01-25 Samsung Electronics Co., Ltd. Three-dimensional semiconductor memory device
JP2021136271A (ja) 2020-02-25 2021-09-13 キオクシア株式会社 半導体装置およびその製造方法
JP2021136320A (ja) 2020-02-26 2021-09-13 キオクシア株式会社 半導体装置およびその製造方法
JP2021150511A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 半導体記憶装置
JP2022035158A (ja) 2020-08-20 2022-03-04 キオクシア株式会社 半導体記憶装置
JP2022050233A (ja) 2020-09-17 2022-03-30 キオクシア株式会社 半導体記憶装置
KR102942729B1 (ko) * 2021-05-21 2026-03-24 삼성전자주식회사 반도체 장치 및 이를 포함하는 전자 시스템
US12581930B2 (en) * 2021-11-29 2026-03-17 Samsung Electronics Co., Ltd. Semiconductor device including electrodes each having a pad part and electronic system including the same
US20230255037A1 (en) * 2022-02-04 2023-08-10 Samsung Electronics Co., Ltd. Three-dimensional non-volatile memory device including peripheral circuits

Also Published As

Publication number Publication date
TWI834241B (zh) 2024-03-01
TW202339225A (zh) 2023-10-01
JP2023141616A (ja) 2023-10-05
JP7757223B2 (ja) 2025-10-21
US20250293181A1 (en) 2025-09-18
US20230307387A1 (en) 2023-09-28
US12388031B2 (en) 2025-08-12

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