CN116301179A - Low temperature coefficient reference current source circuit - Google Patents

Low temperature coefficient reference current source circuit Download PDF

Info

Publication number
CN116301179A
CN116301179A CN202310289069.XA CN202310289069A CN116301179A CN 116301179 A CN116301179 A CN 116301179A CN 202310289069 A CN202310289069 A CN 202310289069A CN 116301179 A CN116301179 A CN 116301179A
Authority
CN
China
Prior art keywords
electrode
electrically connected
current
source
drain electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202310289069.XA
Other languages
Chinese (zh)
Other versions
CN116301179B (en
Inventor
叶益迭
奚争辉
潘春彪
王晗冰
夏桦康
王健
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ningbo University
Original Assignee
Ningbo University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ningbo University filed Critical Ningbo University
Priority to CN202310289069.XA priority Critical patent/CN116301179B/en
Publication of CN116301179A publication Critical patent/CN116301179A/en
Application granted granted Critical
Publication of CN116301179B publication Critical patent/CN116301179B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)

Abstract

The invention provides a low temperature coefficient reference current source circuit, which comprises: a start-up circuit; the PTAT current generation circuit is electrically connected with the starting circuit and is used for generating positive temperature coefficient current according to the voltage difference between the base electrodes and the emitter electrodes of the PNPs of the two triodes; the CTAT current generation circuit is electrically connected with the starting circuit generation circuit and is used for generating negative temperature coefficient current according to the voltage difference between the base electrode and the emitter electrode of the triode NPN acting on the other resistor; and the current summing circuit is electrically connected with the PTAT current generation circuit and the CTAT current generation circuit and is used for generating a reference current with a low temperature coefficient according to the current with a positive temperature coefficient, the current with a negative temperature coefficient and the MOS tube sub-threshold leakage current. The invention utilizes the triode to generate different temperature coefficient currents, ensures the advantages of the reference current source with low temperature coefficient, and simultaneously improves the stability of the circuit under different processes to generate the reference current with low temperature coefficient.

Description

Low temperature coefficient reference current source circuit
Technical Field
The invention relates to the technical field of analog circuits in integrated circuits, in particular to a reference current source circuit with a low temperature coefficient.
Background
Reference current sources have found wide application in analog and mixed signal integrated circuits. It provides a high precision, high stability reference current for a/D converters, sensor interfaces and many other signal processing systems. The key principle of the reference current source circuit is to provide an output from a weighted sum of two voltages or currents, one with a positive temperature coefficient Proportional To Absolute Temperature (PTAT) and the other with a negative temperature coefficient, commonly referred to as Complementary To Absolute Temperature (CTAT). By properly adjusting the weights, the derivative of the output with respect to temperature can be forced to disappear at the inflection point Temperature (TINF), suppressing the variation of the reference voltage due to the temperature variation to some extent.
The reference source circuit is one of the most important basic modules in the integrated circuit; it can not only provide static working points for each module of the chip, but also provide reference voltage and reference current in various digital-analog systems. The reference current source with high precision has very important influence on the performance of the chip, and one of the most important factors influencing the precision of the reference current source is temperature. The conventional temperature ranges from-20 ℃ to 100 ℃, but with the increase of the power consumption of the device and the change of the ambient temperature, in fact, the temperature ranges from-40 ℃ to 125 ℃ from the practical working environment.
The conventional reference current source only uses PN junction voltage V BE Is applied to the resistor to generate a negative temperature characteristic current, and two PN junction voltage differences DeltaV at different current densities BE The positive temperature coefficient of the reference current source is acted on the resistor to generate the current with positive temperature characteristic to compensate each other, so that the output current has lower temperature coefficient, the change of the reference current source caused by temperature change is restrained to a certain extent, but the reference current source can only generate a first-order reference current source in the mode, so that in the actual working environment, the reference current source in the prior art can not lead the reference current to obtain effective high-order temperature compensation, and the reference current source can not meet the requirements of a high-precision analog circuit and a digital-analog hybrid circuitCurrent requirements.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the reference current source circuit with the low temperature coefficient solves the problem that the reference current source requirements of a high-precision analog circuit and a digital-analog hybrid circuit are difficult to meet in the prior art.
The invention solves the problems by adopting the following technical scheme: a low temperature coefficient reference current source circuit comprising:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
the PTAT current generation circuit is electrically connected with the starting circuit and is used for generating a positive temperature coefficient current I according to the voltage difference between the base electrode and the emitter electrode of the PNP of the two P-type triodes PTAT
CTAT current generation circuit electrically connected with the start circuit generation circuit for generating negative temperature coefficient current I according to the voltage difference between base and emitter of one N-type triode NPN acting on another resistor CTAT
A current summing circuit electrically connected with the PTAT current generation circuit and the CTAT current generation circuit for generating a current I according to a positive temperature coefficient PTAT Negative temperature coefficient current I CTAT And MOS tube sub-threshold leakage current I LEAK Superimposed to generate a reference current I of low temperature coefficient VREF
Compared with the prior art, the invention has the advantages that: the triode is utilized to generate currents with different temperature coefficients, the stability of the circuit under different processes is greatly improved while the advantages of the reference current source with the low temperature coefficient are ensured, and the reference current with the low temperature coefficient is generated.
Preferably, the starting circuit includes: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37; the source electrode of the M30 is electrically connected with the power supply end VDD, the grid electrode of the M30 is electrically connected with the bias voltage end A, and the drain electrode of the M30 is electrically connected with the drain electrode of the M36, the grid electrode of the M36 and the grid electrode of the M37; the source electrode of the M31 is electrically connected with the power supply end VDD, the drain electrode of the M31 is electrically connected with the source electrode of the M32, the drain electrode of the M32 is electrically connected with the source electrode of the M33, and the drain electrode of the M33 is electrically connected with the source electrode of the M34 and the bias voltage C end; the drain electrode of the M34 is electrically connected with the drain electrode of the M37 and the grid electrode of the M35, the drain electrode of the M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit; the gate of M31, the gate of M32, the gate of M33, the gate of M34, the source of M35, the source of M36 and the source of M37 are all grounded.
The technical scheme has the technical effects that: the start-up circuit provides a start-up signal to the PTAT current generation circuit and the CTAT current generation circuit.
Preferably, the PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3; the source electrode of the M6, the source electrode of the M7 and the source electrode of the M10 are electrically connected with a power supply end VDD; the source electrode of the M8 is electrically connected with the drain electrode of the M6, the grid electrode of the M8 is electrically connected with the grid electrode of the M9, the grid electrode of the M11, the drain electrode of the M12, the other end of the resistor R2 and the bias voltage B end, and the drain electrode of the M8 is electrically connected with the drain electrode of the M13, the grid electrode of the M13 and the grid electrode of the M14; the source electrode of the M9 is electrically connected with the drain electrode of the M7, the source electrode of the M11 is electrically connected with the drain electrode of the M10, and the grid electrode of the M6 is electrically connected with the grid electrode of the M7, the grid electrode of the M10, the drain electrode of the M9, one end of the resistor R2 and the bias voltage A end; the grid electrode of the M12 is electrically connected with the bias voltage C end, and the source electrode of the M12 is connected with the drain electrode of the M14; the source electrode of the M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of the M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3; the base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded; the drain electrode of the M11 is electrically connected with the grid electrode of the M15, the drain electrode of the M15 and the grid electrode of the M16, and the source electrode of the M15 is electrically connected with the grid electrode of the M17, the drain electrode of the M17 and the grid electrode of the M18; the source electrode of the M18 is grounded to the source electrode of the M17, and the drain electrode of the M18 is electrically connected with the source electrode of the M16; the drain electrode of the M16 is electrically connected with the output end D and serves as an output end of the PTAT current generation circuit.
The technical scheme has the technical effects that: by passing throughThe first-order reference current utilizes the voltage difference DeltaV between the base and the emitter of the PNP of two P-type triodes BE R3 acting on the resistor generates a positive temperature coefficient current I PTAT
Preferably, the CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4; the source electrode of the M19, the source electrode of the M21, the source electrode of the M23 and the source electrode of the M25 are electrically connected with a power supply end VDD, the grid electrode of the M19 is electrically connected with an end A of bias voltage, and the drain electrode of the M19 is electrically connected with the source electrode of the M20; the grid electrode of the M20 is electrically connected with the end B of the bias voltage, and the drain electrode of the M20 is electrically connected with the grid electrode of the M27 and the collector electrode of the triode NPN 1; the grid electrode of the M21 is electrically connected with the drain electrode of the M21, the grid electrode of the M23, the grid electrode of the M25 and the source electrode of the M22; the grid electrode of the M22 is electrically connected with the drain electrode of the M22, the grid electrode of the M24, the grid electrode of the M26 and the drain electrode of the M27; the source electrode of the M24 is electrically connected with the drain electrode of the M23, and the drain electrode of the M24 is electrically connected with the base electrode of the triode NPN1 and one end of the resistor R4; the source electrode of the M26 is electrically connected with the drain electrode of the M25, and the drain electrode of the M26 is electrically connected with the drain electrode of the M28, the grid electrode of the M28 and the grid electrode of the M29; the source electrode of the M27 and the source electrode of the M28 are respectively grounded, the source electrode of the M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1; the drain electrode of the M29 is electrically connected with the output end E and serves as an output end of the CTAT current generation circuit.
The technical scheme has the technical effects that: voltage difference V between base and emitter through an N-type triode NPN BE R4 acting on the resistor generates a negative temperature coefficient current I CTAT
Preferably, the current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1; the source electrode of the M1 and the source electrode of the M2 are electrically connected with a power supply end VDD; the source electrode of the M3 is electrically connected with the drain electrode of the M1, and the drain electrode of the M3 is electrically connected with the grid electrode of the M1, the grid electrode of the M2 and one end of the resistor R1; the source electrode of the M4 is electrically connected with the drain electrode of the M2, the grid electrode of the M4 is electrically connected with the grid electrode of the M3, the other end of the resistor R1, the drain electrode of the M5, the output end D and the output end E, and the drain electrode of the M4 is electrically connected with the output end Vref; the source electrode of the M5 and the grid electrode of the M5 are grounded.
The technical scheme has the technical effects that: positive temperature coefficient current I generated by PTAT current generation circuit PTAT And a negative temperature coefficient current I generated by a CTAT current generation circuit CTAT The two are weighted to obtain a first-order reference current, and the second-order reference current utilizes the current I of positive temperature coefficient PTAT And introducing a CTAT current generation circuit to compensate, so as to obtain a reference current source of high-order temperature compensation.
Preferably, all MOS tubes in the PTAT current generation circuit work in a saturation region,
the base and emitter voltage difference of triode PNP2 is
Figure BDA0004140728560000041
Generating a current with positive temperature coefficient across resistor R3
Figure BDA0004140728560000042
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1.
Preferably, all MOS tubes in the CTAT current generation circuit work in a saturation region,
collector current of triode NPN1
Figure BDA0004140728560000043
Wherein, beta is the magnification factor of triode NPN1, I B Is the base current of triode NPN1, V BE The voltage difference between the base electrode and the emitter electrode of the triode NPN 1;
the gate voltage of M27 is V g =V DD -r 0 I C
Wherein V is DD For supplying the voltage of the terminal r 0 Equivalent impedance for M19 and M20;
the drain of the M27 generates drain current
Figure BDA0004140728560000051
Wherein u is electron mobility, C ox The unit area gate oxide layer capacitor is provided, W is the channel width of the MOS tube, L is the channel length of the MOS tube, V gs For the voltage difference between the M27 gate and the source, V gs =V g ,V TH Is the threshold voltage of MOS, I D Obtaining the negative temperature coefficient current I generated by a CTAT current generation circuit through current mirror proportional copying CTAT
Preferably, the M5 is operated in a cut-off region, the M1, M2, M3 and M4 are all operated in a saturation region, and leakage current generated by the M5 drain electrode
Figure BDA0004140728560000052
Wherein η is a subthreshold oscillation coefficient; the output end Vref obtains a reference current I with a low temperature coefficient VREF =I PTAT +I CTAT +I LEAK
Drawings
FIG. 1 is a circuit diagram of a low temperature coefficient reference current source circuit according to the present invention;
FIG. 2 is a circuit diagram of a start-up circuit in a low temperature coefficient reference current source circuit according to the present invention;
FIG. 3 is a circuit diagram of a PTAT current generation circuit in a low temperature coefficient reference current source circuit according to the present invention;
FIG. 4 is a circuit diagram of a CTAT current generation circuit in a low temperature coefficient reference current source circuit according to the present invention;
fig. 5 is a circuit diagram of a current summing circuit in a low temperature coefficient reference current source circuit according to the present invention.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
As shown in fig. 1 to 5, the present embodiment relates to a low temperature coefficient reference current source circuit including:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
PTAT current generation circuit electrically connected to the start circuit for generating positive temperature coefficient current I based on voltage difference between base and emitter of PNP transistors PTAT
CTAT current generation circuit electrically connected with the start circuit generation circuit for generating negative temperature coefficient current I based on voltage difference between base and emitter of N-type triode NPN acting on another resistor CTAT
A current summing circuit electrically connected with the PTAT current generation circuit and the CTAT current generation circuit for generating a current I according to a positive temperature coefficient PTAT Negative temperature coefficient current I CTAT And MOS tube sub-threshold leakage current I LEAK Superimposed to generate a reference current I of low temperature coefficient VREF
The triode is utilized to generate currents with different temperature coefficients, the stability of the circuit under different processes is greatly improved while the advantages of the reference current source with the low temperature coefficient are ensured, and the reference current with the low temperature coefficient is generated.
Referring to fig. 2, in this embodiment, a start-up circuit is used to ensure that the reference current source starts up normally and provides a dc bias. The power supply end VDD of the CTAT current generation circuit is electrically connected with the power supply end VDD of the current summation circuit; the bias voltage end A provides direct current bias for the PTAT current generation circuit, the CTAT current generation circuit and the current summation circuit; the bias voltage end B provides direct current bias for the PTAT current generation circuit, the CTAT current generation circuit and the current summation circuit; the bias voltage C end of the power supply circuit provides direct current bias for the PTAT current generation circuit; the common ground of which is grounded.
The specific circuit of the starting circuit comprises: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37;
the source electrode of M30 is electrically connected with the power supply end VDD, the grid electrode of M30 is electrically connected with the bias voltage end A, and the drain electrode of M30 is electrically connected with the drain electrode of M36, the grid electrode of M36 and the grid electrode of M37;
the source electrode of M31 is electrically connected with the power supply end VDD, the drain electrode of M31 is electrically connected with the source electrode of M32, the drain electrode of M32 is electrically connected with the source electrode of M33, and the drain electrode of M33 is electrically connected with the source electrode of M34 and the bias voltage C end;
the drain electrode of M34 is electrically connected with the drain electrode of M37 and the grid electrode of M35, the drain electrode of M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit;
the gate of M31, the gate of M32, the gate of M33, the gate of M34, the source of M35, the source of M36 and the source of M37 are all grounded.
Starting circuit theory of operation: when the power supply end VDD starts to be electrified, the PMOS tubes M31-M35 are sequentially conducted. The output end of the starting circuit outputs a low level by the bias voltage B end, the bias voltage C end outputs a high level, and the two output levels enable the PTAT current generating circuit to deviate from a zero working point, so that the starting function of the starting circuit is finished, but the starting circuit is closed by itself to avoid the influence of the operation of the starting circuit on a subsequent circuit.
Referring to fig. 3, the PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3;
the source electrode of M6, the source electrode of M7 and the source electrode of M10 are electrically connected with a power supply end VDD;
the source electrode of M8 is electrically connected with the drain electrode of M6, the grid electrode of M8 is electrically connected with the grid electrode of M9, the grid electrode of M11, the drain electrode of M12, the other end of the resistor R2 and the end of the bias voltage B, and the drain electrode of M8 is electrically connected with the drain electrode of M13, the grid electrode of M13 and the grid electrode of M14;
the source electrode of M9 is electrically connected with the drain electrode of M7, the source electrode of M11 is electrically connected with the drain electrode of M10, the grid electrode of M6 is electrically connected with the grid electrode of M7, the grid electrode of M10, the drain electrode of M9, one end of a resistor R2 and the end of bias voltage A;
the grid electrode of M12 is electrically connected with the bias voltage C end, and the source electrode of M12 is connected with the drain electrode of M14;
the source electrode of M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3;
the base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded;
the drain electrode of M11 is electrically connected with the grid electrode of M15, the drain electrode of M15 and the grid electrode of M16, and the source electrode of M15 is electrically connected with the grid electrode of M17, the drain electrode of M17 and the grid electrode of M18;
the source electrode of M18 is grounded to the source electrode of M17, and the drain electrode of M18 is electrically connected to the source electrode of M16;
the drain of M16 is electrically connected to output D as the output of the PTAT current generation circuit.
Wherein, all MOS tubes in the PTAT current generation circuit work in a saturation region,
the base and emitter voltage difference of triode PNP2 is
Figure BDA0004140728560000071
Generating a current with positive temperature coefficient across resistor R3
Figure BDA0004140728560000072
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1. Voltage DeltaV BE Has positive temperature characteristic, current I PTAT Has positive temperature characteristics.
PTAT current generation circuit theory of operation: when the PTAT current generating circuit is started, the bias voltage end A of the circuit outputs a low-level signal D to the starting circuit, at the moment, the grid electrode of the PMOS tube M30 is low level, the source electrode of the PMOS tube M30 is high level, and the PMOS tube M30 is conducted. The gate of the NMOS transistor M36 is high, the source is low, and the NMOS transistor M36 is turned on. The gate of the NMOS tube M37 is high, the source is low, and M37 is conductive. The grid electrode of the NMOS tube M35 is at a low level, the source electrode of the NMOS tube M35 is at a low level, and the NMOS tube M35 is cut off. The bias voltage B end of the output end of the starting circuit is in a high resistance state, and the self-closing function of the starting circuit is finished, so that the influence on the subsequent circuits is avoided. Generating a positive temperature coefficient current I according to the voltage difference between the base electrode and the emitter electrode of the PNP of the two P-type triodes acting on a resistor PTAT
Referring to fig. 4, the CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4;
the source electrode of M19, the source electrode of M21, the source electrode of M23 and the source electrode of M25 are all electrically connected with a power supply end VDD, the grid electrode of M19 is electrically connected with an end A of bias voltage, and the drain electrode of M19 is electrically connected with the source electrode of M20;
the grid electrode of M20 is electrically connected with the end B of the bias voltage, and the drain electrode of M20 is electrically connected with the grid electrode of M27 and the collector electrode of triode NPN 1;
the grid electrode of M21 is electrically connected with the drain electrode of M21, the grid electrode of M23, the grid electrode of M25 and the source electrode of M22;
the grid electrode of M22 is electrically connected with the drain electrode of M22, the grid electrode of M24, the grid electrode of M26 and the drain electrode of M27;
the source electrode of M24 is electrically connected with the drain electrode of M23, and the drain electrode of M24 is electrically connected with the base electrode of triode NPN1 and one end of resistor R4;
the source electrode of M26 is electrically connected with the drain electrode of M25, and the drain electrode of M26 is electrically connected with the drain electrode of M28, the grid electrode of M28 and the grid electrode of M29;
the source electrode of M27 and the source electrode of M28 are respectively grounded, the source electrode of M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1;
the drain of M29 is electrically connected to output E as the output of the CTAT current generation circuit.
Wherein, all MOS tubes in the CTAT current generation circuit work in a saturation region,
collector current of triode NPN1
Figure BDA0004140728560000091
Wherein, beta is the magnification factor of triode NPN1, I B Is the base current of triode NPN1, V BE The voltage difference between the base electrode and the emitter electrode of the triode NPN 1;
the gate voltage of M27 is V g =V DD -r 0 I C
Wherein V is DD For supplying the voltage of the terminal r 0 Equivalent impedance for M19 and M20;
drain generation of drain current for M27
Figure BDA0004140728560000092
Wherein u is electron mobility, C ox The unit area gate oxide capacitance is W is the channel width of the MOS tube M27, L is the channel length of the MOS tube M27, V gs For the voltage difference between the M27 gate and the source, V gs =V g ,V TH Is the threshold voltage of the MOS tube M27, I D Obtaining the negative temperature coefficient current I generated by a CTAT current generation circuit through current mirror proportional copying CTAT In this embodiment I CTAT =I D 。V gs Has negative temperature characteristics, I D Has negative temperature characteristics.
Referring to fig. 5, the current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1;
the source electrode of M1 and the source electrode of M2 are electrically connected with a power supply end VDD;
the source electrode of M3 is electrically connected with the drain electrode of M1, and the drain electrode of M3 is electrically connected with the grid electrode of M1, the grid electrode of M2 and one end of a resistor R1;
the source electrode of M4 is electrically connected with the drain electrode of M2, the grid electrode of M4 is electrically connected with the grid electrode of M3, the other end of the resistor R1, the drain electrode of M5, the output end D and the output end E, and the drain electrode of M4 is electrically connected with the output end Vref;
the source electrode of M5 and the grid electrode of M5 are grounded.
Wherein M5 works in a cut-off region, M1, M2, M3 and M4 all work in a saturation region,
m5 generating drain current
Figure BDA0004140728560000093
Wherein u is electron mobility, C ox The unit area of the gate oxide layer capacitor is W is the channel width of the MOS tube, L is the channel length of the MOS tube, eta is the subthreshold swing coefficient, k is the Peltzmann constant, T is the absolute temperature, q is the electron charge, and V TH For the threshold voltage of the MOS tube M5, the output end Vref obtains the reference of the low temperature coefficientCurrent I VREF =I PTAT +I CTAT +I LEAK
The beneficial effects of the invention are as follows: the first-order reference current of the invention utilizes the voltage difference delta V between the base electrode and the emitter electrode of the PNP of the two P-type triodes BE R3 acting on the resistor generates a positive temperature coefficient current I PTAT Voltage difference V between base and emitter of N-type triode NPN BE R4 acting on the resistor generates a negative temperature coefficient current I CTAT The two are weighted to obtain a first-order reference current, and the second-order reference current utilizes the current I of positive temperature coefficient PTAT And a CTAT current generation circuit is introduced to compensate, so that a reference current source for high-order temperature compensation is obtained, different temperature coefficient currents are generated by utilizing a triode, and the stability of the circuit under different process angles can be greatly improved while the advantages of the reference current source with low temperature coefficient are ensured.
While the foregoing description illustrates and describes the preferred embodiments of the present invention, it is to be understood that the invention is not limited to the forms disclosed herein, but is not to be construed as limited to other embodiments, and is capable of use in various other combinations, modifications and environments and is capable of changes or modifications within the spirit of the invention described herein, either as a result of the foregoing teachings or as a result of the knowledge or skill of the relevant art. And that modifications and variations which do not depart from the spirit and scope of the invention are intended to be within the scope of the appended claims.
Although the present disclosure is described above, the scope of protection of the present disclosure is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the disclosure, and these changes and modifications will fall within the scope of the invention.

Claims (8)

1. A low temperature coefficient reference current source circuit, characterized by: comprising the following steps:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
PTAT current generation circuit electrically connected with the start-up circuit for generating a PTAT current based on two P-type transistorsThe voltage difference between the base and the emitter of PNP acts on a resistor to generate a positive temperature coefficient current I PTAT
CTAT current generation circuit electrically connected with the start circuit generation circuit for generating negative temperature coefficient current I according to the voltage difference between base and emitter of one N-type triode NPN acting on another resistor CTAT
A current summing circuit electrically connected with the PTAT current generation circuit and the CTAT current generation circuit for generating a current I according to a positive temperature coefficient PTAT Negative temperature coefficient current I CTAT And MOS tube sub-threshold leakage current I LEAK Superimposed to generate a reference current I of low temperature coefficient VREF
2. A low temperature coefficient reference current source circuit according to claim 1, wherein: the start-up circuit includes: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37;
the source electrode of the M30 is electrically connected with the power supply end VDD, the grid electrode of the M30 is electrically connected with the bias voltage end A, and the drain electrode of the M30 is electrically connected with the drain electrode of the M36, the grid electrode of the M36 and the grid electrode of the M37;
the source electrode of the M31 is electrically connected with the power supply end VDD, the drain electrode of the M31 is electrically connected with the source electrode of the M32, the drain electrode of the M32 is electrically connected with the source electrode of the M33, and the drain electrode of the M33 is electrically connected with the source electrode of the M34 and the bias voltage C end;
the drain electrode of the M34 is electrically connected with the drain electrode of the M37 and the grid electrode of the M35, the drain electrode of the M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit;
the gate of M31, the gate of M32, the gate of M33, the gate of M34, the source of M35, the source of M36 and the source of M37 are all grounded.
3. A low temperature coefficient reference current source circuit according to claim 2, wherein: the PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3;
the source electrode of the M6, the source electrode of the M7 and the source electrode of the M10 are electrically connected with a power supply end VDD;
the source electrode of the M8 is electrically connected with the drain electrode of the M6, the grid electrode of the M8 is electrically connected with the grid electrode of the M9, the grid electrode of the M11, the drain electrode of the M12, the other end of the resistor R2 and the bias voltage B end, and the drain electrode of the M8 is electrically connected with the drain electrode of the M13, the grid electrode of the M13 and the grid electrode of the M14;
the source electrode of the M9 is electrically connected with the drain electrode of the M7, the source electrode of the M11 is electrically connected with the drain electrode of the M10, and the grid electrode of the M6 is electrically connected with the grid electrode of the M7, the grid electrode of the M10, the drain electrode of the M9, one end of the resistor R2 and the bias voltage A end;
the grid electrode of the M12 is electrically connected with the bias voltage C end, and the source electrode of the M12 is connected with the drain electrode of the M14;
the source electrode of the M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of the M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3;
the base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded;
the drain electrode of the M11 is electrically connected with the grid electrode of the M15, the drain electrode of the M15 and the grid electrode of the M16, and the source electrode of the M15 is electrically connected with the grid electrode of the M17, the drain electrode of the M17 and the grid electrode of the M18;
the source electrode of the M18 is grounded to the source electrode of the M17, and the drain electrode of the M18 is electrically connected with the source electrode of the M16;
the drain electrode of the M16 is electrically connected with the output end D and serves as an output end of the PTAT current generation circuit.
4. A low temperature coefficient reference current source circuit according to claim 3, wherein: the CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4;
the source electrode of the M19, the source electrode of the M21, the source electrode of the M23 and the source electrode of the M25 are electrically connected with a power supply end VDD, the grid electrode of the M19 is electrically connected with an end A of bias voltage, and the drain electrode of the M19 is electrically connected with the source electrode of the M20;
the grid electrode of the M20 is electrically connected with the end B of the bias voltage, and the drain electrode of the M20 is electrically connected with the grid electrode of the M27 and the collector electrode of the triode NPN 1;
the grid electrode of the M21 is electrically connected with the drain electrode of the M21, the grid electrode of the M23, the grid electrode of the M25 and the source electrode of the M22;
the grid electrode of the M22 is electrically connected with the drain electrode of the M22, the grid electrode of the M24, the grid electrode of the M26 and the drain electrode of the M27;
the source electrode of the M24 is electrically connected with the drain electrode of the M23, and the drain electrode of the M24 is electrically connected with the base electrode of the triode NPN1 and one end of the resistor R4;
the source electrode of the M26 is electrically connected with the drain electrode of the M25, and the drain electrode of the M26 is electrically connected with the drain electrode of the M28, the grid electrode of the M28 and the grid electrode of the M29;
the source electrode of the M27 and the source electrode of the M28 are respectively grounded, the source electrode of the M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1;
the drain electrode of the M29 is electrically connected with the output end E and serves as an output end of the CTAT current generation circuit.
5. The low temperature coefficient reference current source circuit of claim 4, wherein: the current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1;
the source electrode of the M1 and the source electrode of the M2 are electrically connected with a power supply end VDD;
the source electrode of the M3 is electrically connected with the drain electrode of the M1, and the drain electrode of the M3 is electrically connected with the grid electrode of the M1, the grid electrode of the M2 and one end of the resistor R1;
the source electrode of the M4 is electrically connected with the drain electrode of the M2, the grid electrode of the M4 is electrically connected with the grid electrode of the M3, the other end of the resistor R1, the drain electrode of the M5, the output end D and the output end E, and the drain electrode of the M4 is electrically connected with the output end Vref;
the source electrode of the M5 and the grid electrode of the M5 are grounded.
6. The low temperature coefficient reference current source circuit of claim 5, wherein: all MOS tubes in the PTAT current generation circuit work in a saturation region,
the base and emitter voltage difference of triode PNP2 is
Figure FDA0004140728550000031
Generating a current with positive temperature coefficient across resistor R3
Figure FDA0004140728550000032
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1.
7. The low temperature coefficient reference current source circuit of claim 6, wherein: all MOS tubes in the CTAT current generation circuit work in a saturation region,
collector current of triode NPN1
Figure FDA0004140728550000041
Wherein, beta is the magnification factor of triode NPN1, I B Is the base current of triode NPN1, V BE The voltage difference between the base electrode and the emitter electrode of the triode NPN 1;
the gate voltage of M27 is V g =V DD -r 0 I C
Wherein V is DD For supplying the voltage of the terminal r 0 Equivalent impedance for M19 and M20;
the drain of the M27 generates drain current
Figure FDA0004140728550000042
Wherein u is electron mobility, C ox The unit area gate oxide layer capacitor is provided, W is the channel width of the MOS tube, L is the channel length of the MOS tube, V gs For the voltage difference between the M27 gate and the source, V gs =V g ,V TH Is the threshold voltage of MOS, I D By passing throughThe current mirror copies proportionally to obtain the negative temperature coefficient current I generated by the CTAT current generating circuit CTAT
8. The low temperature coefficient reference current source circuit of claim 7, wherein: m5 is operated in a cut-off region, M1, M2, M3 and M4 are all operated in a saturation region,
leakage current generated by the M5 drain electrode
Figure FDA0004140728550000043
Wherein η is a subthreshold oscillation coefficient; the output end Vref obtains a reference current I with a low temperature coefficient VREF =I PTAT +I CTAT +I LEAK
CN202310289069.XA 2023-03-23 2023-03-23 Low temperature coefficient reference current source circuit Active CN116301179B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310289069.XA CN116301179B (en) 2023-03-23 2023-03-23 Low temperature coefficient reference current source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310289069.XA CN116301179B (en) 2023-03-23 2023-03-23 Low temperature coefficient reference current source circuit

Publications (2)

Publication Number Publication Date
CN116301179A true CN116301179A (en) 2023-06-23
CN116301179B CN116301179B (en) 2024-06-07

Family

ID=86802919

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310289069.XA Active CN116301179B (en) 2023-03-23 2023-03-23 Low temperature coefficient reference current source circuit

Country Status (1)

Country Link
CN (1) CN116301179B (en)

Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1987713A (en) * 2005-12-23 2007-06-27 深圳市芯海科技有限公司 Reference voltage source for low temperature coefficient with gap
US20100073070A1 (en) * 2008-09-25 2010-03-25 Hong Kong Applied Science & Technology Research Intitute Company Limited Low Voltage High-Output-Driving CMOS Voltage Reference With Temperature Compensation
CN101950191A (en) * 2010-09-16 2011-01-19 电子科技大学 Voltage reference source with high-order temperature compensation circuit
CN102122190A (en) * 2010-12-30 2011-07-13 钜泉光电科技(上海)股份有限公司 Voltage reference source circuit and method for generating voltage reference source
CN102495661A (en) * 2011-12-26 2012-06-13 电子科技大学 Band-gap reference circuit based on two threshold voltage metal oxide semiconductor (MOS) devices
CN105425891A (en) * 2015-11-19 2016-03-23 苏州市职业大学 Zero-temperature coefficient adjustable voltage reference source
CN205247255U (en) * 2015-12-17 2016-05-18 陕西省电子技术研究所 Novel reference voltage source circuit
CN105786077A (en) * 2016-04-20 2016-07-20 广东工业大学 High-order temperature drift compensation band-gap reference circuit without operational amplifier
CN107045370A (en) * 2017-06-20 2017-08-15 上海灿瑞科技股份有限公司 It is a kind of that there is high-order temperature compensated band gap reference voltage source circuit
CN107272804A (en) * 2017-07-25 2017-10-20 桂林电子科技大学 A kind of high-precision reference voltage source based on unlike material resistance
CN207051761U (en) * 2017-07-25 2018-02-27 桂林电子科技大学 A kind of high-precision reference voltage source based on unlike material resistance
CN108897365A (en) * 2018-08-27 2018-11-27 桂林电子科技大学 A kind of high-precision current model reference voltage source
DE202020104160U1 (en) * 2019-07-18 2020-07-28 Guangzhou Runxin Information Technology Co., Ltd Circuitry for establishing a bandgap reference output voltage with low noise
CN113220060A (en) * 2021-04-30 2021-08-06 深圳市国微电子有限公司 Band-gap reference circuit with high power supply rejection ratio and electronic equipment
CN114115417A (en) * 2021-11-12 2022-03-01 中国兵器工业集团第二一四研究所苏州研发中心 Band gap reference circuit
CN114200997A (en) * 2021-12-10 2022-03-18 中国兵器工业集团第二一四研究所苏州研发中心 No-operational-amplifier type curvature compensation band gap reference voltage source
CN114489222A (en) * 2022-02-10 2022-05-13 重庆邮电大学 Band-gap reference circuit for power supply chip
CN115525092A (en) * 2022-10-24 2022-12-27 桂林电子科技大学 High-precision full CMOS curvature compensation reference voltage source

Patent Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1987713A (en) * 2005-12-23 2007-06-27 深圳市芯海科技有限公司 Reference voltage source for low temperature coefficient with gap
US20100073070A1 (en) * 2008-09-25 2010-03-25 Hong Kong Applied Science & Technology Research Intitute Company Limited Low Voltage High-Output-Driving CMOS Voltage Reference With Temperature Compensation
CN101950191A (en) * 2010-09-16 2011-01-19 电子科技大学 Voltage reference source with high-order temperature compensation circuit
CN102122190A (en) * 2010-12-30 2011-07-13 钜泉光电科技(上海)股份有限公司 Voltage reference source circuit and method for generating voltage reference source
CN102495661A (en) * 2011-12-26 2012-06-13 电子科技大学 Band-gap reference circuit based on two threshold voltage metal oxide semiconductor (MOS) devices
CN105425891A (en) * 2015-11-19 2016-03-23 苏州市职业大学 Zero-temperature coefficient adjustable voltage reference source
CN205247255U (en) * 2015-12-17 2016-05-18 陕西省电子技术研究所 Novel reference voltage source circuit
CN105786077A (en) * 2016-04-20 2016-07-20 广东工业大学 High-order temperature drift compensation band-gap reference circuit without operational amplifier
CN107045370A (en) * 2017-06-20 2017-08-15 上海灿瑞科技股份有限公司 It is a kind of that there is high-order temperature compensated band gap reference voltage source circuit
CN107272804A (en) * 2017-07-25 2017-10-20 桂林电子科技大学 A kind of high-precision reference voltage source based on unlike material resistance
CN207051761U (en) * 2017-07-25 2018-02-27 桂林电子科技大学 A kind of high-precision reference voltage source based on unlike material resistance
CN108897365A (en) * 2018-08-27 2018-11-27 桂林电子科技大学 A kind of high-precision current model reference voltage source
DE202020104160U1 (en) * 2019-07-18 2020-07-28 Guangzhou Runxin Information Technology Co., Ltd Circuitry for establishing a bandgap reference output voltage with low noise
CN113220060A (en) * 2021-04-30 2021-08-06 深圳市国微电子有限公司 Band-gap reference circuit with high power supply rejection ratio and electronic equipment
CN114115417A (en) * 2021-11-12 2022-03-01 中国兵器工业集团第二一四研究所苏州研发中心 Band gap reference circuit
CN114200997A (en) * 2021-12-10 2022-03-18 中国兵器工业集团第二一四研究所苏州研发中心 No-operational-amplifier type curvature compensation band gap reference voltage source
CN114489222A (en) * 2022-02-10 2022-05-13 重庆邮电大学 Band-gap reference circuit for power supply chip
CN115525092A (en) * 2022-10-24 2022-12-27 桂林电子科技大学 High-precision full CMOS curvature compensation reference voltage source

Also Published As

Publication number Publication date
CN116301179B (en) 2024-06-07

Similar Documents

Publication Publication Date Title
CN106774592B (en) A kind of high-order temperature compensation bandgap reference circuit of no bipolar transistor
CN111338417B (en) Voltage reference source and reference voltage output method
CN105824348B (en) A kind of circuit of reference voltage
CN114690831B (en) Current self-biased series CMOS band-gap reference source
CN113608568B (en) Low-power-consumption low-voltage low-temperature-drift band-gap reference voltage source
CN113031690B (en) High-order temperature compensation MOS band gap reference circuit with low temperature drift
CN115145347B (en) Second-order temperature compensation band-gap reference circuit insensitive to operational amplifier offset
CN114489221B (en) Band-gap reference voltage source circuit and band-gap reference voltage source
CN114237339A (en) Band-gap reference voltage circuit and compensation method of band-gap reference voltage
CN103399612B (en) Resistance-less bandgap reference source
CN210270647U (en) Reference current source circuit and chip based on temperature compensation
CN102147631B (en) Non-band gap voltage reference source
CN111930170A (en) high-PSRR high-precision multi-order current compensation band gap reference source
CN109828630B (en) Low-power-consumption reference current source irrelevant to temperature
CN114661085B (en) Band gap reference source high-order temperature compensation circuit and method
CN214202192U (en) Band gap reference source high-order temperature compensation circuit
CN117055681A (en) Band gap reference circuit with high-order temperature compensation
CN111796625B (en) Ultra-low power consumption CMOS voltage reference circuit
CN116301179B (en) Low temperature coefficient reference current source circuit
CN103472878A (en) Reference current source
CN112731998A (en) Voltage reference circuit of ZTC operating point based on MOSFET
Gopal et al. Trimless, pvt insensitive voltage reference using compensation of beta and thermal voltage
CN116954296B (en) Low-power-consumption self-bias second-order compensation band-gap reference circuit
CN118226918A (en) Non-resistance full CMOS sub-threshold voltage reference circuit and working method
CN117193461A (en) Temperature-independent reference source circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant