CN109828630B

CN109828630B - Low-power-consumption reference current source irrelevant to temperature

Info

Publication number: CN109828630B
Application number: CN201910069815.8A
Authority: CN
Inventors: 蔡超波; 古天龙; 宋树祥; 岑明灿; 李叶; 杨小燕; 胡文灿
Original assignee: Guilin University of Electronic Technology
Current assignee: Guilin University of Electronic Technology
Priority date: 2019-01-24
Filing date: 2019-01-24
Publication date: 2020-06-12
Anticipated expiration: 2039-01-24
Also published as: CN109828630A

Abstract

The invention discloses a low-power-consumption reference current source irrelevant to temperature, which comprises a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a starting circuit and a reference current output circuit. The negative temperature coefficient current generating circuit is used for generating a negative temperature coefficient current, and the positive temperature coefficient current generating circuit is used for generating a positive temperature coefficient current; the start-up circuit is used to avoid a zero-current (degenerate) state; the reference current output circuit adds the positive temperature coefficient current and the negative temperature coefficient current to generate a reference current independent of temperature. The circuit has the characteristics of simple structure, low power consumption, small area and wide working voltage range.

Description

Low-power-consumption reference current source irrelevant to temperature

Technical Field

The invention belongs to the technical field of microelectronic circuits, and particularly relates to a low-power-consumption reference current source irrelevant to temperature.

Background

The reference current source is used for providing a stable current, the current value of the reference current source does not change along with the voltage, the temperature and the process of a power supply, the traditional reference current source irrelevant to the temperature is shown in figure 1, the essence of the reference current source is that a reference voltage irrelevant to the temperature is converted into a reference current irrelevant to the temperature, the working principle of the reference current source is that an operational amplifier is connected into negative feedback, the voltage of the same-phase end and the opposite-phase end of the operational amplifier is equal, and the same-phase end of the operational amplifier is connected with a reference voltage V irrelevant_REFThen the voltage at the inverting terminal of the operational amplifier is also V_REFI.e. the voltage across the resistor R1 is also V_REFThe current flowing through the resistor R1 is

Reference current thus output

Due to V_REFIndependent of temperature, therefore I_REFIs also independent of temperature. Although the reference voltage V is generated by a bandgap reference source_REFHas good temperature characteristics such that_REFThe temperature characteristic is good, but the structure needs a complete bandgap reference voltage source, an operational amplifier A1, a MOS transistor M1 and a resistor R1, and therefore, the power consumption is large and the chip area is large.

Disclosure of Invention

The invention provides a low-power-consumption reference current source irrelevant to temperature, which comprises a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a starting circuit and a reference current output circuit. The invention has the advantages of realizing reference current with lower temperature coefficient and greatly reducing the power consumption and chip area of the circuit.

The negative temperature coefficient current generating circuit is used for generating a negative temperature coefficient current and comprises NMOS transistors M1 and M2, PMOS transistors M3 and M4 and a resistor R1; wherein: the gate of M1 is connected to node Y; the gate of M2 is connected to node X; the sources of M1 and M2 are connected with each other and then grounded GND through a resistor R1; the drains of M1 and M3 are connected with the gates of M3 and M4 to form a first bias voltage terminal V_B1(ii) a The drains of M2 and M4 are connected to form a second bias voltage terminal V_B2(ii) a The sources of M3 and M4 are both connected to the power supply VDD.

The positive temperature coefficient current generating circuit is used for generating a positive temperature coefficient current and comprises PMOS tubes M5 and M6, PNP type triodes Q1 and Q2 and a resistor R2; wherein: the bases of Q1 and Q2 and the collectors of Q1 and Q2 are all grounded GND; the emitter of Q1 and the drain of M5 are both connected to node X, and the emitter of Q2 is connected to node Y through resistor R2; the gates of M5, M6 are both connected to a second bias voltage terminal V_B2(ii) a The sources of M5 and M6 are both connected to the power supply VDD.

The starting circuit is used for avoiding a zero current (degeneracy) state, supplying starting current to the reference circuit at the moment of electrifying to enable the circuit to be separated from the zero current state, and automatically closing the starting circuit after the circuit works normally. The starting circuit comprises PMOS tubes M7, M8, M9, M10, M11 and an NMOS tube M12, and a capacitor C1; wherein: gate connection of M7To a second bias voltage terminal V_B2(ii) a The sources of M7 and M8 are connected to a power supply VDD; the drain of M7 and the first terminal of capacitor C1 are connected with the gates of M8, M9, M10 and M11; the second terminal of the capacitor C1 and the source of M12 are grounded GND; the gate of M12 is connected to node Y; the drain electrode of M12 is connected with the drain electrode of M9 and the source electrode of M10; the drain of the M8 is connected with the source of the M9; the drain of the M10 is connected with the source of the M11; the drain of M11 is connected to node X.

The reference current output circuit adds the positive temperature coefficient current and the negative temperature coefficient current to generate a reference current independent of temperature. The circuit comprises PMOS tubes M13 and M14; the gate of M13 is connected to a first bias voltage terminal V_B1(ii) a The gate of M14 is connected to a second bias voltage terminal V_B2(ii) a The sources of M13 and M14 are connected with a power supply VDD; the drains of M13 and M14 are connected to form a reference current output terminal I_REF。

Drawings

Fig. 1 is a schematic diagram of a conventional temperature-independent reference current source circuit.

Fig. 2 is a schematic diagram of a conventional bandgap reference source circuit.

Fig. 3 is a schematic circuit diagram of the present invention.

Detailed Description

The technical solution and the technical effects of the present invention will be described in detail again with reference to the accompanying drawings.

On the basis of the traditional band gap reference source, the negative temperature coefficient current generating circuit and the operational amplifier are skillfully combined into a whole, so that the negative temperature coefficient current is realized, the function of the operational amplifier is realized, and the power consumption of the circuit is reduced. In the conventional bandgap reference source main body circuit, as shown in fig. 2, M1 and M2 have the same size, and the gate-source voltages thereof are also the same, so that the currents flowing through M1 and M2 are all the same, and are set as I_PTATSince the operational amplifier has a virtual break characteristic, the currents flowing through Q1 and M1 are the same as I_PTATQ2, R1 and M2 have the same current I_PTAT. Since the negative feedback structure formed by the operational amplifier A1 has a virtual short characteristic, the voltages at the X and Y points are equal, and therefore the current flowing through the resistor R1

Setting Q2 to be n times Q1, then

Thus, therefore, it is

Due to V_TIs a positive temperature coefficient, therefore I_PTATIs a positive temperature coefficient current.

As shown in fig. 3, the reference current source with low power consumption and independent of temperature provided by the present invention includes a negative temperature coefficient current generating circuit, a positive temperature coefficient current generating circuit, a start circuit, and a reference current output circuit. The negative temperature coefficient current generating circuit is used for generating a negative temperature coefficient current (I)_CTAT) The positive temperature coefficient current generating circuit is used for generating a positive temperature coefficient current (I)_PTAT) (ii) a The start-up circuit is used to avoid a zero-current (degenerate) state; the reference current output circuit adds the positive temperature coefficient current and the negative temperature coefficient current for generating a temperature independent reference current (I)_REF). The positive temperature coefficient current generating circuit comprises a PMOS tube M5, a PMOS tube M6, a resistor R2, a PNP type triode Q1 and a PNP type triode Q2, the working principle of the circuit is the same as that of the circuit shown in the figure 2, the voltage of two points X and Y is equal due to the fact that the circuit forms a negative feedback structure, the sizes of the M5 and the M6 are completely the same, the Q2 is n times of that of the Q1, and therefore current flowing through the resistor R2 is achieved

Current I of_R2Is a positive temperature coefficient current.

The negative temperature coefficient current generating circuit shown in fig. 3 includes an NMOS transistor M1, an NMOS transistor M2, a PMOS transistor M3, a PMOS transistor M4, and a resistor R1, and its operating principle is: since the negative feedback structure is formed by the circuit, the voltages at the points X and Y are equal, i.e. the gate voltages of M1 and M2 are equal,

current flowing through R1

To do so

Is a negative temperature coefficient, so that the current I_R1For negative temperature coefficient currents, the currents through M3 and M4 are equal to

Also negative temperature coefficient current. The negative temperature coefficient current generating circuit not only realizes the generation of negative temperature coefficient current, but also realizes the function of operational amplifier, and because of I_R1Is (V)_EB1-V_GS,M1) R1, therefore, can be produced without the need for a large R1_R2The currents with the same order of magnitude not only reduce the circuit area, but also are beneficial to the design of a reference current output circuit.

The reference current output circuit shown in fig. 3 includes a PMOS transistor M13 and a PMOS transistor M14, and its operation principle is: m13 and M3 form a mirror current source, the current flowing through M3 is a negative temperature coefficient, so the current I flowing through M13_CTATAlso negative temperature coefficient; m14, M5 and M6 form a mirror current source, and the current flowing through M5 and M6 is a positive temperature coefficient, so the current I flowing through M14_PTATAlso positive temperature coefficient; due to I_R1And I_R2The current is of the same order of magnitude, so the sizes of M13 and M14 are relatively close, the matching design of M13 and M14 is more facilitated, the reasonable sizes of MOS (M13 and M14) are set, and the negative temperature coefficient current I is converted into the negative temperature coefficient current I_CTATAnd positive temperature coefficient current I_PTATBy superposition, a temperature-independent current reference current I can be obtained_REF. The reference current output circuit has the characteristics of simple structure and contribution to layout design.

The starting circuit shown in fig. 3 comprises a PMOS transistor M7, a PMOS transistor M8, a PMOS transistor M9, a PMOS transistor M10, a PMOS transistor M11, an NMOS transistor M12 and a capacitor C1. The working principle is as follows: assuming that zero current (degeneracy) state exists in the circuit after power-on, the current flowing through the branch where M5, M6 and M7 are located is 0, so that the X point, the Y point and the capacitor C1 are up and downThe voltage of the plate is 0, and the gate voltages V of M5, M6 and M7_B2The voltage is VDD; because the voltages of the upper and lower electrode plates of the C1 are both 0 and the voltage of the X point is also 0, the PMOS tubes M8, M9, M10 and M11 are conducted to supply current to the Q1, so that the circuit is slowly separated from a zero state and finally works normally. In the process that the circuit is slowly separated from a zero state, the current flowing through M7 is gradually increased and charges C1, so that the voltage of the upper plate of C1 is continuously increased, finally the voltage of the upper plate of C1 is VDD, M7 enters a deep linear region, no current flows, and M8, M9, M10 and M11 are not conducted due to the fact that the voltage of the upper plate of C1 is VDD; in the process that the circuit slowly departs from the zero state, the voltage of the Y point gradually rises to enable the M12 to be conducted, the voltage of the M10 source electrode is pulled down to 0 potential, and further the M10 and the M11 are completely disconnected without influencing the normal working state of the circuit. The starting circuit provided by the invention can supply the starting current to the reference circuit at the moment of electrifying, so that the circuit is separated from a zero-current state, and the starting circuit is automatically closed after the circuit works normally without power consumption, and has the characteristics of quick starting and double closing after the starting is finished.

Claims

1. A low-power consumption reference current source irrelevant to temperature comprises a starting circuit, a negative temperature coefficient current generating circuit and a positive temperature coefficient current generating circuit, and is characterized in that:

the negative temperature coefficient current generating circuit comprises NMOS transistors M1 and M2, PMOS transistors M3 and M4 and a resistor R1; wherein: the gate of M1 is connected to node Y; the gate of M2 is connected to node X; the sources of M1 and M2 are connected with each other and then grounded GND through a resistor R1; the drains of M1 and M3 are connected with the gates of M3 and M4 to form a first bias voltage terminal V_B1(ii) a The drains of M2 and M4 are connected to form a second bias voltage terminal V_B2(ii) a The sources of M3 and M4 are connected to a power supply VDD;

the positive temperature coefficient current generating circuit comprises PMOS tubes M5 and M6, PNP type triodes Q1 and Q2 and a resistor R2; wherein: the bases of Q1 and Q2 and the collectors of Q1 and Q2 are all grounded GND; the emitter of Q1 and the drain of M5 are both connected to node X, and the emitter of Q2 is connected to node Y through resistor R2; the gates of M5 and M6 are connected to the second bias voltageTerminal V_B2(ii) a The sources of M5 and M6 are both connected to a power supply VDD;

the starting circuit comprises PMOS tubes M7, M8, M9, M10, M11 and an NMOS tube M12, and a capacitor C1; wherein: the gate of M7 is connected to a second bias voltage terminal V_B2(ii) a The sources of M7 and M8 are connected to a power supply VDD; the drain of M7 and the first terminal of capacitor C1 are connected with the gates of M8, M9, M10 and M11; the second terminal of the capacitor C1 and the source of M12 are grounded GND; the gate of M12 is connected to node Y; the drain electrode of M12 is connected with the drain electrode of M9 and the source electrode of M10; the drain of the M8 is connected with the source of the M9; the drain of the M10 is connected with the source of the M11; the drain of M11 is connected to node X.

2. The low-power-consumption reference current source according to claim 1, further comprising a reference current output circuit comprising PMOS transistors M13, M14; the gate of M13 is connected to a first bias voltage terminal V_B1(ii) a The gate of M14 is connected to a second bias voltage terminal V_B2(ii) a The sources of M13 and M14 are connected with a power supply VDD; the drains of M13 and M14 are connected to form a reference current output terminal I_REF。