CN102122190A - Voltage reference source circuit and method for generating voltage reference source - Google Patents

Abstract

The invention relates to an integrated circuit and discloses a voltage reference source circuit and a method for generating a voltage reference source. The method comprises the following steps of: generating a self-adaption nonlinear PTAT (positive temperature coefficient) current through a high-order temperature coefficient compensation circuit; converting the current into a self-adaption nonlinear PTAT voltage and then superposing the voltage with a first-order reference voltage; and generating the reference voltage approximate to zero-temperature coefficient, as the voltage reference source. The self-adaption nonlinear PTAT voltage counteracts the nonlinear negative temperature coefficient in the first-order reference voltage, so the voltage reference source has lower temperature coefficient. In addition, the structure is simple, the compensation branch stability is better and the influence on the initial precision of the voltage reference source is small.

Description

Voltage reference source circuit and voltage-reference generation method

Technical field

The present invention relates to integrated circuit, particularly the voltage-reference in the integrated circuit.

Background technology

The bandgap reference voltage source is one of IP circuit important in Analogous Integrated Electronic Circuits and the hybrid digital-analog integrated circuit design.It mainly acts on is at low pressure difference linear voltage regulator (Low Dropout Regulator, be called for short " LDO "), DC-DC (DC-to-dc conversion), analog to digital converter (Analog Digital Converter, be called for short " ADC ")/digital to analog converter (Digital Analog Converter, abbreviation " DAC ") and in system level chip (System on Chip is called for short " the SoC ") system provide stable voltage or electric current, in fine measuring instrument, also be widely used simultaneously.

Existing bandgap reference voltage source is based on two transistor bases-emitter voltage difference Δ V _BEProduce positive temperature coefficient (PTC) voltage and transistor base and emitter voltage both end voltage V _BEThe principle of negative temperature coefficient linear superposition.Along with improving constantly of accuracy requirement in the circuit design, because still residual certain temperature coefficient after the linear compensation of reference voltage, its index temperature coefficient is difficult to satisfy the requirement of high performance analog circuit.Therefore adopt high-order temperature compensated technology to realize the reference voltage of lower temperature coefficient, high-order temperature compensated generally is to utilize extra high-order compensation circuit to produce non-linear positive temperature coefficient (PTC) voltage and the reference circuit of single order reference voltage stack with the realization low-temperature coefficient.

Specifically, in present a kind of scheme, adopted digital switch control to insert the number of the PMOS pipe (P type metal-oxide-semiconductor) in the calibration circuit, regulated the equivalent channel length of dividing pressure pipe and control tube, thereby obtain the reference voltage of low-temperature coefficient.Although this bandgap reference voltage source circuit can reach lower nonlinear temperature coefficient, as: simulation result 10.6ppm/ ℃.But because the influence of operational amplifier offset voltage and temperature coefficient thereof will inevitably produce serious influence to the temperature coefficient and the precision of reference voltage when using in the High Definition Systems.Meanwhile, obtain accurate reference voltage, carry out more careful raceway groove regulation and control with regard to the quantity that must increase switch.This has also increased the complicacy of total system steering logic and the quantity of chip limb.

In present another kind of scheme, produce single order, second order, the positive temperature characterisitic electric current in three rank by design, be converted to non-linear positive temperature characterisitic voltage after the passing ratio stack, thereby non-linear negative temperature coefficient in the reference voltage is offset.Its emulation Optimal Temperature coefficient is 0.7ppm/ ℃, although it is the reference voltage of inferior 1ppm/ ℃ magnitude that this structure can realize temperature coefficient, but its temperature coefficient stability is along with the variation of process corner, the positive temperature characterisitic electric current of high-order has greatly changed, because its ratio is fixed, therefore the non-linear positive temperature characterisitic after its stack is compared with ideal value very big deviation can be taken place, can't carry out the compensation of high-order self-adaptive temperature, and because the non-ideal characteristic of amplifier, the reference voltage temperature coefficient is further degenerated, also can influence the precision of output voltage simultaneously.

Summary of the invention

The object of the present invention is to provide a kind of voltage reference source circuit and voltage-reference generation method, realize having ultralow temperature coefficient and the comparatively stable voltage-reference of temperature coefficient with better simply structure.

For solving the problems of the technologies described above, embodiments of the present invention provide a kind of voltage reference source circuit, comprise:

The benchmark core circuit is used to generate the positive temperature coefficient (PTC) electric current;

High-order tc compensation circuit is used to generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes;

Reference voltage output circuit, the positive temperature coefficient (PTC) current conversion that is used for the benchmark core circuit is generated is a positive temperature coefficient (PTC) voltage, and negative temperature coefficient voltage and positive temperature coefficient (PTC) voltage superposeed, obtain the single order reference voltage, the non-linear positive temperature coefficient (PTC) current conversion that high-order tc compensation circuit is generated is non-linear positive temperature coefficient (PTC) voltage, and non-linear positive temperature coefficient (PTC) voltage and the single order reference voltage that will change superpose, and obtains voltage-reference.

Embodiments of the present invention also provide a kind of voltage-reference generation method, comprise following steps:

Generate positive temperature coefficient (PTC) electric current and negative temperature coefficient voltage;

With the positive temperature coefficient (PTC) current conversion that generates is positive temperature coefficient (PTC) voltage, and the negative temperature coefficient voltage of generation and the positive temperature coefficient (PTC) voltage after the conversion are superposeed, and obtains the single order reference voltage;

Generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes;

With the non-linear positive temperature coefficient (PTC) current conversion that generates is non-linear positive temperature coefficient (PTC) voltage, and non-linear positive temperature coefficient (PTC) voltage and the single order reference voltage that will change superpose, and obtains voltage-reference.

Embodiment of the present invention compared with prior art, the key distinction and effect thereof are:

Produce a kind of self-adaptation nonlinear PTAT (positive temperature coefficient (PTC)) electric current by high-order tc compensation circuit, superpose with the single order reference voltage after this electric current is converted into a self-adaptation nonlinear PTAT voltage, produce a kind of reference voltage of approximate zero temperature coefficient, as voltage-reference.Because this nonlinear adaptive PTAT voltage is offset the non-linear negative temperature coefficient in the single order reference voltage, thereby makes voltage-reference have lower temperature coefficient.That is to say that high-order temperature compensated technology has self-adaptation nonlinear tc compensation characteristic on the basis that has kept single order benchmark primary characteristic, greatly improved the temperature coefficient of voltage-reference.And, simple in structurely be easy to integratedly, compensation branch road stability is better, and is and less to the initial precision influence of voltage-reference.

Further, utilize the base-emitter voltage difference of two triodes, generate the positive temperature coefficient (PTC) electric current; Utilize the base-emitter of a triode, generate negative temperature coefficient voltage; Utilize a PMOS pipe to generate non-linear positive temperature coefficient (PTC) electric current.Further guaranteed of the present invention simple in structurely, be easy to realize.

Further, voltage reference source circuit also comprises the feedback bias loop, is used to the benchmark core circuit that generates the positive temperature coefficient (PTC) electric current that bias voltage and electric current are provided, and constitutes feedback control loop with this benchmark core circuit.Because this feedback bias loop can provide stable dc point, therefore can guarantee the steady operation of circuit.

Description of drawings

Fig. 1 is the synoptic diagram according to the voltage reference source circuit of first embodiment of the invention;

Fig. 2 is the synoptic diagram according to the voltage reference source circuit of second embodiment of the invention;

Fig. 3 is the concrete structure figure according to the voltage reference source circuit of second embodiment of the invention;

Fig. 4 is the concrete structure figure that realizes current branch according to the one PTAT electric current of the usefulness in the second embodiment of the invention;

Fig. 5 is the non-linear PTAT current diagram that generates according to the high-order tc compensation circuit in the second embodiment of the invention;

Fig. 6 is according to the effect temperature compensation synoptic diagram that reaches in the second embodiment of the invention;

Fig. 7 is the voltage-reference generation method flow diagram according to third embodiment of the invention.

Embodiment

In the following description, in order to make the reader understand the application better many ins and outs have been proposed.But, persons of ordinary skill in the art may appreciate that even without these ins and outs with based on the many variations and the modification of following each embodiment, also can realize each claim of the application technical scheme required for protection.

For making the purpose, technical solutions and advantages of the present invention clearer, embodiments of the present invention are described in further detail below in conjunction with accompanying drawing.

Core of the present invention is, comprises in the voltage reference source circuit:

The benchmark core circuit is used to generate the positive temperature coefficient (PTC) electric current;

High-order tc compensation circuit is used to generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes;

Reference voltage output circuit, the positive temperature coefficient (PTC) current conversion that is used for this benchmark core circuit is generated is a positive temperature coefficient (PTC) voltage, and negative temperature coefficient voltage and described positive temperature coefficient (PTC) voltage that this reference voltage output circuit is generated superpose, obtain the single order reference voltage, the non-linear positive temperature coefficient (PTC) current conversion that described high-order tc compensation circuit is generated is non-linear positive temperature coefficient (PTC) voltage, and the described non-linear positive temperature coefficient (PTC) voltage that will change and described single order reference voltage superpose, and obtains voltage-reference.

First embodiment of the invention relates to a kind of voltage reference source circuit.In the present embodiment, by obtaining the single order reference voltage after positive temperature coefficient (PTC) voltage and the stack of negative temperature coefficient voltage, and utilize PMOS pipe to produce non-linear positive temperature coefficient (PTC) electric current, superpose with the single order reference voltage after this electric current is converted into self-adaptation nonlinear PTAT (positive temperature coefficient (PTC)) voltage, produce a kind of reference voltage of approximate zero temperature coefficient, with the reference voltage that produces as voltage-reference.

Specifically as shown in Figure 1, this voltage reference source circuit comprises:

Benchmark core circuit 101 is used to generate the positive temperature coefficient (PTC) electric current.Specifically, the benchmark core circuit is by utilizing the base-emitter voltage difference delta V of two triodes _BE, generate the positive temperature coefficient (PTC) electric current.

Reference voltage output circuit 102, the positive temperature coefficient (PTC) current conversion that is used for the benchmark core circuit is generated is a positive temperature coefficient (PTC) voltage, and negative temperature coefficient voltage and positive temperature coefficient (PTC) voltage are superposeed, and obtains the single order reference voltage.Wherein, reference voltage output circuit can be utilized the base-emitter of a triode, generates negative temperature coefficient voltage.

High-order tc compensation circuit 103 is used to generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes.This high-order tc compensation circuit can generate non-linear positive temperature coefficient (PTC) electric current by utilizing a PMOS pipe.

The non-linear positive temperature coefficient (PTC) current conversion that reference voltage output circuit 102 also is used for high-order tc compensation circuit is generated is non-linear positive temperature coefficient (PTC) voltage, and non-linear positive temperature coefficient (PTC) voltage and the single order reference voltage that will change superpose, and obtains voltage-reference.Certainly, it will be appreciated by those skilled in the art that, the nonlinear temperature characteristic of the non-linear positive temperature coefficient (PTC) voltage after the conversion, approximate identical circuit working temperature range planted agent with the temperature characterisitic of the negative temperature coefficient voltage of reference voltage output circuit 102 generations, so that realize the reference voltage of ultralow temperature coefficient characteristics preferably.

In the present embodiment, produce a kind of self-adaptation nonlinear PTAT (positive temperature coefficient (PTC)) electric current by high-order tc compensation circuit, superpose with the single order reference voltage after this electric current is converted into a self-adaptation nonlinear PTAT voltage, produce a kind of reference voltage of approximate zero temperature coefficient, as voltage-reference.Because this nonlinear adaptive PTAT voltage is offset the non-linear negative temperature coefficient of the negative temperature coefficient voltage of generation, thereby makes reference voltage have lower temperature coefficient.That is to say that high-order temperature compensated technology has self-adaptation nonlinear tc compensation characteristic on the basis that has kept single order benchmark primary characteristic, greatly improved the reference voltage temperature coefficient.And owing to simple in structurely be easy to integratedly, compensation branch road stability better, and is and less to the initial precision influence of reference voltage.

Second embodiment of the invention relates to a kind of voltage reference source circuit.Present embodiment has been carried out replenishing on the details on the basis of first embodiment.

Specifically, the voltage reference source circuit in the present embodiment also comprises feedback bias loop 104 and start-up circuit 105.This feedback bias loop is used to the benchmark core circuit that bias voltage and electric current are provided, and constitutes feedback control loop with the benchmark core circuit; This start-up circuit is used to start the benchmark core circuit, as shown in Figure 2.Concrete composition structure to the benchmark core circuit 101 in the present embodiment, reference voltage output circuit 102, high-order tc compensation circuit 103 and feedback bias loop 104 describes below.

As shown in Figure 3, benchmark core circuit 101 is made of 2 triodes, resistance, 2 NMOS pipes (N type metal-oxide-semiconductor), 4 PMOS pipes.Specifically, benchmark core circuit 101 is by triode Q1, Q2; Resistance R 1; NMOS manages MN3, MN4; PMOS pipe MP4～MP7 constitutes jointly.Wherein Q1 is 1 with the ratio of the area of the emitter junction of Q2: N.MN3 and MN4 constitute current-mirror structure, make the source potential of two NMOS pipes equate, thereby produce Δ VBE pressure drop on resistance R 1, thereby produce a PTAT electric current that is directly proportional with absolute temperature in the benchmark core circuit.MP4～MP7 constitutes cascade Cascode current mirror, and (MP4～MP7) the Cascode current mirror is carried out to the ratio transmission to the PTAT electric current that produces in the benchmark core circuit by PMOS.Wherein, MP4 and MP6 source electrode all are connected to supply voltage, the drain electrode of MP4 is connected to the source electrode of MP5, the drain electrode of MP6 is connected to the source electrode of MP7, the drain electrode of MP5 is connected to the drain electrode of MN3, the drain electrode of MP7 is connected to the drain electrode of MN4, the grid of MN3 and MN4 links to each other, the source electrode of MN3 links to each other with the emitter of Q1, the grid of MN4 links to each other with drain electrode, and source electrode links to each other with the end of R1, and other one of this R1 is connected to the emitter of Q2, the base stage of Q1 links to each other with collector and is connected to circuit potential minimum GND, and the base stage of Q2 links to each other with collector and is connected to circuit potential minimum GND.

As shown in Figure 3, feedback bias loop 104 is made of 2 triodes, 2 NMOS pipes, 3 PMOS pipes.Specifically, the feedback bias loop is by triode Q4, Q5; NMOS manages MN1, MN2, and PMOS pipe MP1～MP3 forms.Biasing circuit provides bias voltage and electric current by the mode of automatic biasing for the PMOS Cascode current mirror in the benchmark core circuit 101.Feed back bias loop 104 simultaneously and constitute feedback control loop with benchmark core circuit 101.Wherein, the base stage of Q4 links to each other with collector and is connected to circuit potential minimum GND, the base stage of Q5 links to each other with collector and is connected to circuit potential minimum GND, the grid of MN1 is connected to the grid of MN4, the source electrode of MN1 links to each other with the emitter of Q5, the drain electrode of MN1 is connected to grid and the drain electrode of MP1, the grid of MN2 links to each other with the drain electrode of described MN3, the source electrode of MN2 links to each other with the Q4 emitter, the drain electrode of MN2 links to each other with the drain terminal of MP3, the grid of MP1 links to each other with drain electrode, and the grid of MP1 is connected to the grid of MP5 and MP7, and the source electrode of MP1 links to each other with supply voltage, the MP2 drain and gate links to each other with drain electrode with the source electrode of MP3 respectively, and the grid of MP2 is connected to the grid of MP4 and MP6, and the source electrode of MP2 is connected to supply voltage, and the grid of MP3 links to each other with the grid of MP1.MN3 → MN1 → MP1 → MP7 → MN4 → MN3 is a regenerative feedback loop, MN3 → MN1 → MP1 → MP2 → MP6 → MN4 → MN3, and these two loops of MN3 → MN2 → MP2 → MP6 → MN4 → MN3 are feedback loop.As long as make the feedback loop gain greater than the regenerative feedback loop gain, reference circuit just can steady operation.

As shown in Figure 3, reference voltage output circuit 102 is made of a triode, a resistance, 2 PMOS pipes.Specifically, reference voltage output circuit 102 is by triode Q3; Resistance R 2, PMOS manages MP8, and MP9 constitutes, MP8, MP9 constitutes the Cascode current mirror.Triode Q3 produces a voltage V with negative temperature coefficient (IPTAT) for diode B-C knot short circuit is the diode connected mode _EBMP8, the PTAT current delivery that the PMOS Cascode current mirror that MP9 constitutes produces benchmark core circuit 101 is on resistance R 2, and the PTAT electric current that benchmark core circuit 101 is produced is converted into the PTAT voltage with positive temperature coefficient (PTC), so this PTAT voltage and the V with IPTAT characteristic _EBThe single order reference voltage of superimposed generation lower temperature coefficient.Wherein, the grid of MP8 links to each other with the grid of described MP2, the source electrode of MP8 links to each other with supply voltage, the drain electrode of MP8 links to each other with the source electrode of MP9, the grid of MP9 links to each other with the grid of MP1, the drain electrode of MP9 links to each other with the end of R2, and the other end of R2 links to each other with the emitter of Q3, and the base stage of Q3 is connected with collector and is connected to circuit potential minimum GND.

As shown in Figure 3, high-order tc compensation circuit 103 by a PMOS manage, a N metal-oxide-semiconductor and have the temperature characterisitic of positive temperature coefficient (PTC) or the current branch of zero-temperature coefficient characteristic constitutes.Specifically, high-order tc compensation circuit 103 is made up of PMOS pipe MPC, diode type of attachment NMOS MN6 and a current branch I (T) who has the uniform temperature coefficient feature.Wherein, the grid of MN6 links to each other with drain electrode, and the source electrode of MN6 is connected to circuit potential minimum GND, current branch is injected among the MN6 with the diode connected mode, the source electrode of MPC is connected to the drain electrode of M N6, and the grid of MPC links to each other with the emitter of Q3, and the drain electrode of MPC is connected to the drain electrode of described MP9.This I (T) is the electric current of PTAT electric current or zero-temperature coefficient characteristic, the mode that realizes this current branch I (T) with a PTAT electric current as shown in Figure 4, the PTAT electric current that 2 PMOS pipes (MP10, MP11) can be realized is as this current branch I (T), be that MP10 is connected in the cascode mode with MP11, with the positive temperature coefficient (PTC) current mirror that generates in the described benchmark core circuit to described current branch.Along with the continuous rising of temperature, because PMOS MPC pipe source voltage terminal raises, the grid terminal potential descends, thereby makes the electric current in this PMOS pipe raise along with the rising of temperature, and this electric current has non-linear PTAT characteristic

As shown in Figure 3, the R2 two ends stack of the voltage that all temps characteristic is different in reference voltage output circuit 102 produces reference voltage.The non-linear PTAT electric current that is produced by high-order tc compensation circuit 103 is injected in the reference voltage output circuit 102, on R2, form a non-linear PTAT voltage, this voltage and the ultralow temperature coefficient reference voltage of single order reference voltage stack back output are as voltage-reference.Produce non-linear positive temperature coefficient (PTC) electric current by flexible Application one PMOS pipe, be superposed to non-linear positive temperature coefficient (PTC) voltage on the resistance of this electric current in reference voltage output circuit 102, and this voltage is along with its nonlinear characteristic grow of increase of temperature, the remaining amount of nonlinearity of single order reference voltage temperature is effectively offset, thereby realized extremely low temperature coefficient.

Start-up circuit 105 in the present embodiment is in order to make benchmark core circuit 101 in the circuit back operate as normal and adding that powers on, owing to start various informatively, and present embodiment do not caused substantial influence, do not repeat them here.

Need to prove that in the circuit structure as shown in Figure 3, the substrate of each PMOS pipe both can link to each other with own source electrode, can also be connected to supply voltage, NMOS pipe substrate is connected to circuit minimum level GND.

With circuit structure shown in Figure 3 is example, and the technique effect that can reach at present embodiment is made a concrete analysis of below.

The ratio of supposing the emitter junction area of Q1 and Q2 is 1: N, and first compensation phase reference voltage expression formula is:

$V_{\mathrm{ref}0}=V_{\mathrm{EB}3}+\frac{R_2}{R_1}\·V_T\ln N=V_{\mathrm{EB}3}+{\mathrm{mV}}_T\ln N---\left(1\right)$

Wherein, V _T=KT/q is a thermal voltage, and K is a Boltzmann constant, and T is an absolute temperature, and q is an electronic charge.M is resistance ratio R ₂/ R ₁Consider V _BENon-linear:

$V_{\mathrm{EB}}\left(T\right)=V_{G0}\left(T\right)-(V_{G0}-V_{\mathrm{EB}0})\frac{T}{T_0}-V_T(\mathrm{\γ}-\mathrm{\α})\ln \frac{T}{T_0}---\left(2\right)$

V in the formula 2 _G0Be the band gap voltage of silicon materials under the 0K, representative value is 1.205V, normal temperature T ₀=300K, γ, α are respectively the coefficient relevant with collector current index temperature coefficient with triode base hole mobility.Therefore the single order reference voltage can be expressed as:

$V_{\mathrm{ref}}^{\′}=V_{G0}-(V_{G0}-V_{\mathrm{EB}3})\frac{T}{T_0}+{\mathrm{mV}}_T\ln N-(\mathrm{\γ}-\mathrm{\α})V_T\ln \frac{T}{T_0}---\left(3\right)$

Therefore the single order reference voltage has stronger non-linear negative temperature characteristic is arranged in middle high-temperature region.

Consider the electric current among the MPC:

$I_{\mathrm{MPC}}=\frac{1}{2}{\mathrm{\β}}_{\mathrm{MPC}}{(\sqrt{\frac{{2I}_{\mathrm{PTAT}}}{{\mathrm{\β}}_{\mathrm{MN}6}}}+V_{\mathrm{THN}}-V_{\mathrm{EB}3}-V_{\mathrm{THP}})}^2\≈\frac{1}{2}{\mathrm{\β}}_{\mathrm{MPC}}{(\sqrt{\frac{{2I}_{\mathrm{PTAT}}}{{\mathrm{\β}}_{\mathrm{MN}6}}}-V_{\mathrm{EB}3})}^2---\left(4\right)$

Wherein, β _MPCAnd β _MN6Represent the gain factor (β=μ C of PMOS pipe MPC and NMOS pipe MN6 respectively _OxW/L), V _THN, V _THPBe respectively the threshold voltage of NMOS pipe and PMOS pipe.Because I _RefHas the PTAT of presenting characteristic, V _EB3Have non-linear negative temperature characteristic, so I _MPCHas non-linear PTAT characteristic.

Bring V into _EBTemperature characterisitic is further analyzed.Utilize (1+x) ^α≈ 1+ α x+O (x ²) obtain:

$I_{\mathrm{MPC}}=I_{\mathrm{mpc}0}+\sqrt{{2I}_{\mathrm{mpc}0}{\mathrm{\β}}_{\mathrm{MPC}}\mathrm{\κ}}{V}_T(\mathrm{\γ}-\mathrm{\α})\ln \frac{T}{T_0}---\left(5\right)$

I wherein _Mpc0PTAT linear current during for T=T0 among the PMOS pipe MPC, κ is the current delivery coefficient.Second is non-linear PTAT electric current in the following formula, and this electric current is injected into the voltage that is converted into non-linear PTAT on the electric current stack resistance of reference voltage output circuit:

$V_{\mathrm{NL}}=R_3\·\sqrt{2I_{\mathrm{MPC}0}{\mathrm{\β}}_{\mathrm{MPC}}\mathrm{\κ}}(\mathrm{\γ}-\mathrm{\α})V_T\ln \frac{T}{T_0}---\left(6\right)$

This voltage is at output node and the V ' that has non-linear negative temperature coefficient _RefAddition, thus greatly decayed the non-linear IPTAT voltage of single order reference voltage shown in (3) formula, therefore obtain the very low reference voltage of temperature coefficient.The non-linear PTAT electric current that high-order tc compensation circuit in the present embodiment generates as shown in Figure 5, the effect temperature compensation that is reached is as shown in Figure 6.

Simulation result shows that behind high-order compensation, the temperature coefficient of voltage-reference is reduced to 0.3ppm/ ℃, by optimizing temperature coefficient and stability thereof, temperature coefficient is at 3.4ppm/ ℃, and along with the metal-oxide-semiconductor process corner changes, voltage-reference deviation maximal value is no more than 7.6ppm/ ℃.

Need to prove that present embodiment is a kind of concrete implementation, in actual applications, each circuit can also be other implementation structure.Such as the triode that is comprised in each circuit can replace with the metal-oxide-semiconductor of working group's subthreshold region, realizes with full metal-oxide-semiconductor.

Third embodiment of the invention relates to a kind of voltage-reference generation method, and idiographic flow as shown in Figure 7.

In step 701, generate positive temperature coefficient (PTC) electric current and negative temperature coefficient voltage.Specifically, it is poor to utilize the base-emitter voltage difference of two triodes or be operated in the gate source voltage of subthreshold region metal-oxide-semiconductor, generates linear positive temperature coefficient (PTC) electric current; Utilize the base-emitter of a triode, generate negative temperature coefficient voltage, or utilize and be operated in subthreshold region metal-oxide-semiconductor gate source voltage, generate nonlinear negative temperature parameter current.

In step 702, be positive temperature coefficient (PTC) voltage with the positive temperature coefficient (PTC) current conversion that generates, and the negative temperature coefficient voltage of generation and the positive temperature coefficient (PTC) voltage after the conversion are superposeed, obtain the single order reference voltage.

In step 703, generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes.Such as, can utilize PMOS pipe to generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes.Because when metal-oxide-semiconductor was operated in the saturation region, its electric current and gate source voltage had square law relationship, therefore, can utilize this characteristic to realize a kind of non-linear positive temperature coefficient (PTC) electric current.

In step 704, be non-linear positive temperature coefficient (PTC) voltage with the non-linear positive temperature coefficient (PTC) current conversion that generates, and non-linear positive temperature coefficient (PTC) voltage and the single order reference voltage that will change superpose, obtain voltage-reference.

Be not difficult to find that present embodiment is and the corresponding method embodiment of first embodiment, present embodiment can with the enforcement of working in coordination of first embodiment.The correlation technique details of mentioning in first embodiment is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in the present embodiment also can be applicable in first embodiment.

Present embodiment all can realize in modes such as software, hardware, firmwares.No matter the present invention be with software, hardware, or the firmware mode realize, instruction code can be stored in the storer of computer-accessible of any kind (for example permanent or revisable, volatibility or non-volatile, solid-state or non-solid-state, fixing or removable medium or the like).Equally, storer can for example be programmable logic array (Programmable Array Logic, be called for short " PAL "), random access memory (Random Access Memory, be called for short " RAM "), programmable read only memory (Programmable Read Only Memory, be called for short " PROM "), ROM (read-only memory) (Read-Only Memory, be called for short " ROM "), Electrically Erasable Read Only Memory (Electrically Erasable Programmable ROM, be called for short " EEPROM "), disk, CD, digital versatile disc (Digital Versatile Disc is called for short " DVD ") or the like.

Because in embodiments of the present invention, by nonlinear adaptive PTAT voltage the non-linear negative temperature coefficient in the single order reference voltage is offset, thereby make voltage-reference have lower temperature coefficient.And, simple in structurely be easy to integratedly, compensation branch road stability is better, and is and less to the initial precision influence of voltage-reference.In addition, when voltage reference source circuit also comprises the feedback bias loop,, therefore can guarantee the steady operation of circuit because this feedback bias loop can provide stable dc point.

Though pass through with reference to some of the preferred embodiment of the invention, the present invention is illustrated and describes, but those of ordinary skill in the art should be understood that and can do various changes to it in the form and details, and without departing from the spirit and scope of the present invention.

Claims (14)

1. a voltage reference source circuit is characterized in that, comprises:

The benchmark core circuit is used to generate the positive temperature coefficient (PTC) electric current;

High-order tc compensation circuit is used to generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes;

Reference voltage output circuit, the positive temperature coefficient (PTC) current conversion that is used for described benchmark core circuit is generated is a positive temperature coefficient (PTC) voltage, and negative temperature coefficient voltage and described positive temperature coefficient (PTC) voltage that this reference voltage output circuit is generated superpose, obtain the single order reference voltage, the non-linear positive temperature coefficient (PTC) current conversion that described high-order tc compensation circuit is generated is non-linear positive temperature coefficient (PTC) voltage, and the described non-linear positive temperature coefficient (PTC) voltage that will change and described single order reference voltage superpose, and obtains voltage-reference.

2. voltage reference source circuit according to claim 1 is characterized in that, described benchmark core circuit utilizes the base-emitter voltage difference of 2 triodes, generates described positive temperature coefficient (PTC) electric current.

3. voltage reference source circuit according to claim 2 is characterized in that, described benchmark core circuit is made of 2 triode Q1, Q2,1,2 NMOS pipes of 1 resistance R MN3, MN4,4 PMOS pipe MP4, MP5, MP6, MP7; Wherein, Q1 is 1 with the ratio of the area of the emitter junction of Q2: N, and 2 NMOS pipes constitute current-mirror structure, and 4 PMOS pipes constitute cascade Cascode current mirror;

Wherein, MP4 and MP6 source electrode all are connected to supply voltage, the drain electrode of MP4 is connected to the source electrode of MP5, the drain electrode of MP6 is connected to the source electrode of MP7, the drain electrode of MP5 is connected to the drain electrode of MN3, the drain electrode of MP7 is connected to the drain electrode of MN4, the grid of MN3 and MN4 links to each other, the source electrode of MN3 links to each other with the emitter of Q1, the grid of MN4 links to each other with drain electrode, and source electrode links to each other with the end of R1, and other one of this R1 is connected to the emitter of Q2, the base stage of Q1 links to each other with collector and is connected to circuit potential minimum GND, and the base stage of Q2 links to each other with collector and is connected to circuit potential minimum GND.

4. voltage reference source circuit according to claim 3 is characterized in that described voltage reference source circuit also comprises the feedback bias loop, is used to described benchmark core circuit that bias voltage and electric current are provided;

Described feedback bias loop is made of 2 triode Q4, Q5,2 NMOS pipe MN1 and MN2,3 PMOS pipe MP1, MP2, MP3, described feedback bias loop and described benchmark core circuit formation feedback control loop;

Wherein, the base stage of Q4 links to each other with collector and is connected to circuit potential minimum GND, the base stage of Q5 links to each other with collector and is connected to circuit potential minimum GND, the grid of MN1 is connected to the grid of described MN4, the source electrode of MN1 links to each other with the emitter of Q5, the drain electrode of MN1 is connected to grid and the drain electrode of MP1, the grid of MN2 links to each other with the drain electrode of described MN3, the source electrode of MN2 links to each other with the Q4 emitter, the drain electrode of MN2 links to each other with the drain terminal of MP3, the grid of MP1 links to each other with drain electrode, and the grid of MP1 is connected to the grid of described MP5 and described MP7, and the source electrode of MP1 links to each other with supply voltage, the MP2 drain and gate links to each other with drain electrode with the source electrode of MP3 respectively, and the grid of MP2 is connected to the grid of described MP4 and described MP6, and the source electrode of MP2 is connected to supply voltage, and the grid of MP3 links to each other with the grid of MP1.

5. voltage reference source circuit according to claim 4 is characterized in that described reference voltage output circuit is utilized the base-emitter of 1 triode, generates described negative temperature coefficient voltage.

6. voltage reference source circuit according to claim 5 is characterized in that, described reference voltage output circuit is made of 1 triode Q3,2,2 PMOS pipes of 1 resistance R MP8, MP9;

Wherein, triode is used to generate described negative temperature coefficient voltage for diode B-C knot short circuit is the diode connected mode; 2 PMOS pipe constitutes the Cascode current mirrors, is used for positive temperature coefficient (PTC) current delivery that described benchmark core circuit the is generated resistance to described reference voltage output circuit;

Wherein, the grid of MP8 links to each other with the grid of described MP2, the source electrode of MP8 links to each other with supply voltage, the drain electrode of MP8 links to each other with the source electrode of MP9, the grid of MP9 links to each other with the grid of described MP1, the drain electrode of M P9 links to each other with the end of R2, and the other end of R2 links to each other with the emitter of Q3, and the base stage of Q3 is connected with collector and is connected to circuit potential minimum GND.

7. voltage reference source circuit according to claim 6 is characterized in that, described high-order tc compensation circuit utilizes 1 PMOS pipe to generate described non-linear positive temperature coefficient (PTC) electric current.

8. voltage reference source circuit according to claim 7, it is characterized in that described high-order tc compensation circuit is by 1 PMOS pipe MPC, 1 NMOS pipe MN6 and have the temperature characterisitic of positive temperature coefficient (PTC) or the current branch of zero-temperature coefficient characteristic constitutes;

Wherein, the grid of MN6 links to each other with drain electrode, and the source electrode of MN6 is connected to circuit potential minimum GND, current branch is injected among the MN6 with the diode connected mode, the source electrode of MPC is connected to the drain electrode of MN6, and the grid of MPC links to each other with the emitter of described Q3, and the drain electrode of MPC is connected to the drain electrode of described MP9.

9. voltage reference source circuit according to claim 8 is characterized in that, the positive temperature coefficient (PTC) electric current in the described current branch generates by 2 PMOS pipe MP10 and MP11;

Wherein, MP10 is connected in the cascode mode with MP11, with the positive temperature coefficient (PTC) current mirror that generates in the described benchmark core circuit to described current branch.

10. according to each described voltage reference source circuit in the claim 1 to 9, it is characterized in that described voltage reference source circuit also comprises start-up circuit, be used to start described benchmark core circuit.

11. a voltage-reference generation method is characterized in that, comprises following steps:

Generate positive temperature coefficient (PTC) electric current and negative temperature coefficient voltage;

With the positive temperature coefficient (PTC) current conversion that generates is positive temperature coefficient (PTC) voltage, and the negative temperature coefficient voltage of described generation and the positive temperature coefficient (PTC) voltage after the described conversion are superposeed, and obtains the single order reference voltage;

Generate that size of current varies with temperature and the non-linear positive temperature coefficient (PTC) electric current that changes;

With the non-linear positive temperature coefficient (PTC) current conversion that generates is non-linear positive temperature coefficient (PTC) voltage, and the described non-linear positive temperature coefficient (PTC) voltage that will change and described single order reference voltage superpose, and obtains voltage-reference.

12. voltage-reference generation method according to claim 11 is characterized in that, in the step of described generation positive temperature coefficient (PTC) electric current, comprises following substep:

Utilize the base-emitter voltage difference of 2 triodes, generate described positive temperature coefficient (PTC) electric current.

13. voltage-reference generation method according to claim 11 is characterized in that, in the step of described generation negative temperature coefficient voltage, comprises following substep:

Utilize the base-emitter of 1 triode, generate described negative temperature coefficient voltage.

14. voltage-reference generation method according to claim 11 is characterized in that, varies with temperature in described generation size of current and in the step of the non-linear positive temperature coefficient (PTC) electric current that changes, comprises following substep:

Utilize 1 PMOS pipe to generate described non-linear positive temperature coefficient (PTC) electric current.

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