CN116301179B - Low temperature coefficient reference current source circuit - Google Patents
Low temperature coefficient reference current source circuit Download PDFInfo
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- CN116301179B CN116301179B CN202310289069.XA CN202310289069A CN116301179B CN 116301179 B CN116301179 B CN 116301179B CN 202310289069 A CN202310289069 A CN 202310289069A CN 116301179 B CN116301179 B CN 116301179B
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
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- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention provides a low temperature coefficient reference current source circuit, which comprises: a start-up circuit; the PTAT current generation circuit is electrically connected with the starting circuit and is used for generating positive temperature coefficient current according to the voltage difference between the base electrodes and the emitter electrodes of the PNPs of the two triodes; the CTAT current generation circuit is electrically connected with the starting circuit generation circuit and is used for generating negative temperature coefficient current according to the voltage difference between the base electrode and the emitter electrode of the triode NPN acting on the other resistor; and the current summing circuit is electrically connected with the PTAT current generation circuit and the CTAT current generation circuit and is used for generating a reference current with a low temperature coefficient according to the current with a positive temperature coefficient, the current with a negative temperature coefficient and the MOS tube sub-threshold leakage current. The invention utilizes the triode to generate different temperature coefficient currents, ensures the advantages of the reference current source with low temperature coefficient, and simultaneously improves the stability of the circuit under different processes to generate the reference current with low temperature coefficient.
Description
Technical Field
The invention relates to the technical field of analog circuits in integrated circuits, in particular to a reference current source circuit with a low temperature coefficient.
Background
Reference current sources have found wide application in analog and mixed signal integrated circuits. It provides a high precision, high stability reference current for a/D converters, sensor interfaces and many other signal processing systems. The key principle of the reference current source circuit is to provide an output from a weighted sum of two voltages or currents, one with a positive temperature coefficient Proportional To Absolute Temperature (PTAT) and the other with a negative temperature coefficient, commonly referred to as Complementary To Absolute Temperature (CTAT). By properly adjusting the weights, the derivative of the output with respect to temperature can be forced to disappear at the inflection point Temperature (TINF), suppressing the variation of the reference voltage due to the temperature variation to some extent.
The reference source circuit is one of the most important basic modules in the integrated circuit; it can not only provide static working points for each module of the chip, but also provide reference voltage and reference current in various digital-analog systems. The reference current source with high precision has very important influence on the performance of the chip, and one of the most important factors influencing the precision of the reference current source is temperature. The conventional temperature ranges from-20 ℃ to 100 ℃, but with the increase of the power consumption of the device and the change of the ambient temperature, in fact, the temperature ranges from-40 ℃ to 125 ℃ from the practical working environment.
The traditional reference current source only utilizes the negative temperature characteristic of PN junction voltage V BE to act on a resistor to generate current with negative temperature characteristic, and the positive temperature coefficient of the voltage difference DeltaV BE of two PN junctions under different current densities acts on the resistor to generate current with positive temperature characteristic to compensate each other, so that the output current has lower temperature coefficient, the change of the reference current source caused by temperature change is restrained to a certain extent, but only a first-order reference current source can be generated in the mode, therefore, in the actual working environment, the reference current source in the prior art can not enable the reference current to be effectively compensated with high-order temperature, and the requirement of a high-precision analog circuit and a digital-analog hybrid circuit on the reference current can not be met.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the reference current source circuit with the low temperature coefficient solves the problem that the reference current source requirements of a high-precision analog circuit and a digital-analog hybrid circuit are difficult to meet in the prior art.
The invention solves the problems by adopting the following technical scheme: a low temperature coefficient reference current source circuit comprising:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
The PTAT current generation circuit is electrically connected with the starting circuit and is used for generating a positive temperature coefficient current I PTAT according to the voltage difference between the base electrodes and the emitter electrodes of the PNPs of the two P-type triodes;
The CTAT current generation circuit is electrically connected with the starting circuit generation circuit and is used for generating a negative temperature coefficient current I CTAT according to the voltage difference between the base electrode and the emitter electrode of an N-type triode NPN acting on the other resistor;
And the current summing circuit is electrically connected with the PTAT current generation circuit and the CTAT current generation circuit and is used for generating a reference current I VREF with a low temperature coefficient according to superposition of a current I PTAT with a positive temperature coefficient, a current I CTAT with a negative temperature coefficient and a MOS tube sub-threshold leakage current I LEAK.
Compared with the prior art, the invention has the advantages that: the triode is utilized to generate currents with different temperature coefficients, the stability of the circuit under different processes is greatly improved while the advantages of the reference current source with the low temperature coefficient are ensured, and the reference current with the low temperature coefficient is generated.
Preferably, the starting circuit includes: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37; the source electrode of the M30 is electrically connected with the power supply end VDD, the grid electrode of the M30 is electrically connected with the bias voltage end A, and the drain electrode of the M30 is electrically connected with the drain electrode of the M36, the grid electrode of the M36 and the grid electrode of the M37; the source electrode of the M31 is electrically connected with the power supply end VDD, the drain electrode of the M31 is electrically connected with the source electrode of the M32, the drain electrode of the M32 is electrically connected with the source electrode of the M33, and the drain electrode of the M33 is electrically connected with the source electrode of the M34 and the bias voltage C end; the drain electrode of the M34 is electrically connected with the drain electrode of the M37 and the grid electrode of the M35, the drain electrode of the M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit; the gate of M31, the gate of M32, the gate of M33, the gate of M34, the source of M35, the source of M36 and the source of M37 are all grounded.
The technical scheme has the technical effects that: the start-up circuit provides a start-up signal to the PTAT current generation circuit and the CTAT current generation circuit.
Preferably, the PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3; the source electrode of the M6, the source electrode of the M7 and the source electrode of the M10 are electrically connected with a power supply end VDD; the source electrode of the M8 is electrically connected with the drain electrode of the M6, the grid electrode of the M8 is electrically connected with the grid electrode of the M9, the grid electrode of the M11, the drain electrode of the M12, the other end of the resistor R2 and the bias voltage B end, and the drain electrode of the M8 is electrically connected with the drain electrode of the M13, the grid electrode of the M13 and the grid electrode of the M14; the source electrode of the M9 is electrically connected with the drain electrode of the M7, the source electrode of the M11 is electrically connected with the drain electrode of the M10, and the grid electrode of the M6 is electrically connected with the grid electrode of the M7, the grid electrode of the M10, the drain electrode of the M9, one end of the resistor R2 and the bias voltage A end; the grid electrode of the M12 is electrically connected with the bias voltage C end, and the source electrode of the M12 is connected with the drain electrode of the M14; the source electrode of the M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of the M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3; the base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded; the drain electrode of the M11 is electrically connected with the grid electrode of the M15, the drain electrode of the M15 and the grid electrode of the M16, and the source electrode of the M15 is electrically connected with the grid electrode of the M17, the drain electrode of the M17 and the grid electrode of the M18; the source electrode of the M18 is grounded to the source electrode of the M17, and the drain electrode of the M18 is electrically connected with the source electrode of the M16; the drain electrode of the M16 is electrically connected with the output end D and serves as an output end of the PTAT current generation circuit.
The technical scheme has the technical effects that: the positive temperature coefficient current I PTAT is generated by applying the voltage difference Δv BE between the base and emitter of the two P-type transistors PNP to the resistor R3 through the first-order reference current.
Preferably, the CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4; the source electrode of the M19, the source electrode of the M21, the source electrode of the M23 and the source electrode of the M25 are electrically connected with a power supply end VDD, the grid electrode of the M19 is electrically connected with an end A of bias voltage, and the drain electrode of the M19 is electrically connected with the source electrode of the M20; the grid electrode of the M20 is electrically connected with the end B of the bias voltage, and the drain electrode of the M20 is electrically connected with the grid electrode of the M27 and the collector electrode of the triode NPN 1; the grid electrode of the M21 is electrically connected with the drain electrode of the M21, the grid electrode of the M23, the grid electrode of the M25 and the source electrode of the M22; the grid electrode of the M22 is electrically connected with the drain electrode of the M22, the grid electrode of the M24, the grid electrode of the M26 and the drain electrode of the M27; the source electrode of the M24 is electrically connected with the drain electrode of the M23, and the drain electrode of the M24 is electrically connected with the base electrode of the triode NPN1 and one end of the resistor R4; the source electrode of the M26 is electrically connected with the drain electrode of the M25, and the drain electrode of the M26 is electrically connected with the drain electrode of the M28, the grid electrode of the M28 and the grid electrode of the M29; the source electrode of the M27 and the source electrode of the M28 are respectively grounded, the source electrode of the M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1; the drain electrode of the M29 is electrically connected with the output end E and serves as an output end of the CTAT current generation circuit.
The technical scheme has the technical effects that: the negative temperature coefficient current I CTAT is generated by the base and emitter voltage differences V BE of an N-type triode NPN acting on resistor R4.
Preferably, the current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1; the source electrode of the M1 and the source electrode of the M2 are electrically connected with a power supply end VDD; the source electrode of the M3 is electrically connected with the drain electrode of the M1, and the drain electrode of the M3 is electrically connected with the grid electrode of the M1, the grid electrode of the M2 and one end of the resistor R1; the source electrode of the M4 is electrically connected with the drain electrode of the M2, the grid electrode of the M4 is electrically connected with the grid electrode of the M3, the other end of the resistor R1, the drain electrode of the M5, the output end D and the output end E, and the drain electrode of the M4 is electrically connected with the output end Vref; the source electrode of the M5 and the grid electrode of the M5 are grounded.
The technical scheme has the technical effects that: the positive temperature coefficient current I PTAT generated by the PTAT current generation circuit and the negative temperature coefficient current I CTAT generated by the CTAT current generation circuit are weighted to obtain a first-order reference current, and the second-order reference current is introduced into the CTAT current generation circuit to be compensated by utilizing the positive temperature coefficient current I PTAT, so that a reference current source with high-order temperature compensation is obtained.
Preferably, all MOS tubes in the PTAT current generation circuit work in a saturation region,
The base and emitter voltage difference of triode PNP2 is
Generating a current with positive temperature coefficient across resistor R3
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1.
Preferably, all MOS tubes in the CTAT current generation circuit work in a saturation region,
Collector current of triode NPN1
Wherein, beta is the amplification factor of the triode NPN1, I B is the base current of the triode NPN1, and V BE is the voltage difference between the base and the emitter of the triode NPN 1;
the grid voltage of the M27 is V g＝VDD-r0IC;
Wherein V DD is the power supply terminal voltage, and r 0 is the equivalent impedance of M19 and M20;
The drain of the M27 generates drain current
Wherein u is electron mobility, C ox is unit area gate oxide capacitance, W is channel width of the MOS transistor, L is channel length of the MOS transistor, V gs is voltage difference between the M27 gate and the source, V gs＝Vg,VTH is threshold voltage of the MOS, and I D is copied in proportion through a current mirror to obtain negative temperature coefficient current I CTAT generated by the CTAT current generation circuit.
Preferably, the M5 is operated in a cut-off region, the M1, M2, M3 and M4 are all operated in a saturation region, and leakage current generated by the M5 drain electrode
Wherein η is a subthreshold oscillation coefficient; the output terminal Vref obtains a reference current I VREF＝IPTAT+ICTAT+ILEAK with a low temperature coefficient.
Drawings
FIG. 1 is a circuit diagram of a low temperature coefficient reference current source circuit according to the present invention;
FIG. 2 is a circuit diagram of a start-up circuit in a low temperature coefficient reference current source circuit according to the present invention;
FIG. 3 is a circuit diagram of a PTAT current generation circuit in a low temperature coefficient reference current source circuit according to the present invention;
FIG. 4 is a circuit diagram of a CTAT current generation circuit in a low temperature coefficient reference current source circuit according to the present invention;
Fig. 5 is a circuit diagram of a current summing circuit in a low temperature coefficient reference current source circuit according to the present invention.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
As shown in fig. 1 to 5, the present embodiment relates to a low temperature coefficient reference current source circuit including:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
the PTAT current generation circuit is electrically connected with the starting circuit and is used for generating a positive temperature coefficient current I PTAT according to the voltage difference between the base electrodes and the emitter electrodes of the PNPs of the two P-type triodes;
The CTAT current generation circuit is electrically connected with the starting circuit generation circuit and is used for generating a negative temperature coefficient current I CTAT according to the voltage difference between the base electrode and the emitter electrode of the NPN of one N-type triode acting on the other resistor;
The current summing circuit is electrically connected with the PTAT current generation circuit and the CTAT current generation circuit and is used for generating a reference current I VREF with a low temperature coefficient according to superposition of a current I PTAT with a positive temperature coefficient, a current I CTAT with a negative temperature coefficient and a MOS tube sub-threshold leakage current I LEAK.
The triode is utilized to generate currents with different temperature coefficients, the stability of the circuit under different processes is greatly improved while the advantages of the reference current source with the low temperature coefficient are ensured, and the reference current with the low temperature coefficient is generated.
Referring to fig. 2, in this embodiment, a start-up circuit is used to ensure that the reference current source starts up normally and provides a dc bias. The power supply end VDD of the CTAT current generation circuit is electrically connected with the power supply end VDD of the current summation circuit; the bias voltage end A provides direct current bias for the PTAT current generation circuit, the CTAT current generation circuit and the current summation circuit; the bias voltage end B provides direct current bias for the PTAT current generation circuit, the CTAT current generation circuit and the current summation circuit; the bias voltage C end of the power supply circuit provides direct current bias for the PTAT current generation circuit; the common ground of which is grounded.
The specific circuit of the starting circuit comprises: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37;
The source electrode of M30 is electrically connected with the power supply end VDD, the grid electrode of M30 is electrically connected with the bias voltage end A, and the drain electrode of M30 is electrically connected with the drain electrode of M36, the grid electrode of M36 and the grid electrode of M37;
The source electrode of M31 is electrically connected with the power supply end VDD, the drain electrode of M31 is electrically connected with the source electrode of M32, the drain electrode of M32 is electrically connected with the source electrode of M33, and the drain electrode of M33 is electrically connected with the source electrode of M34 and the bias voltage C end;
the drain electrode of M34 is electrically connected with the drain electrode of M37 and the grid electrode of M35, the drain electrode of M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit;
the gate of M31, the gate of M32, the gate of M33, the gate of M34, the source of M35, the source of M36 and the source of M37 are all grounded.
Starting circuit theory of operation: when the power supply end VDD starts to be electrified, the PMOS tubes M31-M35 are sequentially conducted. The output end of the starting circuit outputs a low level by the bias voltage B end, the bias voltage C end outputs a high level, and the two output levels enable the PTAT current generating circuit to deviate from a zero working point, so that the starting function of the starting circuit is finished, but the starting circuit is closed by itself to avoid the influence of the operation of the starting circuit on a subsequent circuit.
Referring to fig. 3, the PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3;
the source electrode of M6, the source electrode of M7 and the source electrode of M10 are electrically connected with a power supply end VDD;
The source electrode of M8 is electrically connected with the drain electrode of M6, the grid electrode of M8 is electrically connected with the grid electrode of M9, the grid electrode of M11, the drain electrode of M12, the other end of the resistor R2 and the end of the bias voltage B, and the drain electrode of M8 is electrically connected with the drain electrode of M13, the grid electrode of M13 and the grid electrode of M14;
the source electrode of M9 is electrically connected with the drain electrode of M7, the source electrode of M11 is electrically connected with the drain electrode of M10, the grid electrode of M6 is electrically connected with the grid electrode of M7, the grid electrode of M10, the drain electrode of M9, one end of a resistor R2 and the end of bias voltage A;
The grid electrode of M12 is electrically connected with the bias voltage C end, and the source electrode of M12 is connected with the drain electrode of M14;
The source electrode of M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3;
The base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded;
The drain electrode of M11 is electrically connected with the grid electrode of M15, the drain electrode of M15 and the grid electrode of M16, and the source electrode of M15 is electrically connected with the grid electrode of M17, the drain electrode of M17 and the grid electrode of M18;
the source electrode of M18 is grounded to the source electrode of M17, and the drain electrode of M18 is electrically connected to the source electrode of M16;
the drain of M16 is electrically connected to output D as the output of the PTAT current generation circuit.
Wherein, all MOS tubes in the PTAT current generation circuit work in a saturation region,
The base and emitter voltage difference of triode PNP2 is
Generating a current with positive temperature coefficient across resistor R3
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1. The voltage Δv BE has a positive temperature characteristic and the current I PTAT has a positive temperature characteristic.
PTAT current generation circuit theory of operation: when the PTAT current generating circuit is started, the bias voltage end A of the circuit outputs a low-level signal D to the starting circuit, at the moment, the grid electrode of the PMOS tube M30 is low level, the source electrode of the PMOS tube M30 is high level, and the PMOS tube M30 is conducted. The gate of the NMOS transistor M36 is high, the source is low, and the NMOS transistor M36 is turned on. The gate of the NMOS tube M37 is high, the source is low, and M37 is conductive. The grid electrode of the NMOS tube M35 is at a low level, the source electrode of the NMOS tube M35 is at a low level, and the NMOS tube M35 is cut off. The bias voltage B end of the output end of the starting circuit is in a high resistance state, and the self-closing function of the starting circuit is finished, so that the influence on the subsequent circuits is avoided. The voltage difference between the base electrode and the emitter electrode of the PNP of the two P-type triodes acts on a resistor to generate a positive temperature coefficient current I PTAT.
Referring to fig. 4, the CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4;
The source electrode of M19, the source electrode of M21, the source electrode of M23 and the source electrode of M25 are all electrically connected with a power supply end VDD, the grid electrode of M19 is electrically connected with an end A of bias voltage, and the drain electrode of M19 is electrically connected with the source electrode of M20;
the grid electrode of M20 is electrically connected with the end B of the bias voltage, and the drain electrode of M20 is electrically connected with the grid electrode of M27 and the collector electrode of triode NPN 1;
the grid electrode of M21 is electrically connected with the drain electrode of M21, the grid electrode of M23, the grid electrode of M25 and the source electrode of M22;
the grid electrode of M22 is electrically connected with the drain electrode of M22, the grid electrode of M24, the grid electrode of M26 and the drain electrode of M27;
The source electrode of M24 is electrically connected with the drain electrode of M23, and the drain electrode of M24 is electrically connected with the base electrode of triode NPN1 and one end of resistor R4;
the source electrode of M26 is electrically connected with the drain electrode of M25, and the drain electrode of M26 is electrically connected with the drain electrode of M28, the grid electrode of M28 and the grid electrode of M29;
the source electrode of M27 and the source electrode of M28 are respectively grounded, the source electrode of M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1;
The drain of M29 is electrically connected to output E as the output of the CTAT current generation circuit.
Wherein, all MOS tubes in the CTAT current generation circuit work in a saturation region,
Collector current of triode NPN1
Wherein, beta is the amplification factor of the triode NPN1, I B is the base current of the triode NPN1, and V BE is the voltage difference between the base and the emitter of the triode NPN 1;
The gate voltage of M27 is V g＝VDD-r0IC,
Wherein V DD is the power supply terminal voltage, and r 0 is the equivalent impedance of M19 and M20;
Drain generation of drain current for M27
Wherein u is electron mobility, C ox is a unit area gate oxide capacitance, W is a channel width of the MOS transistor M27, L is a channel length of the MOS transistor M27, V gs is a voltage difference between a gate and a source of the M27, V gs＝Vg,VTH is a threshold voltage of the MOS transistor M27, and I D is copied in proportion by a current mirror to obtain a current I CTAT with a negative temperature coefficient generated by the CTAT current generating circuit, in this embodiment, I CTAT＝ID.Vgs has a negative temperature characteristic, and I D has a negative temperature characteristic.
Referring to fig. 5, the current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1;
The source electrode of M1 and the source electrode of M2 are electrically connected with a power supply end VDD;
The source electrode of M3 is electrically connected with the drain electrode of M1, and the drain electrode of M3 is electrically connected with the grid electrode of M1, the grid electrode of M2 and one end of a resistor R1;
The source electrode of M4 is electrically connected with the drain electrode of M2, the grid electrode of M4 is electrically connected with the grid electrode of M3, the other end of the resistor R1, the drain electrode of M5, the output end D and the output end E, and the drain electrode of M4 is electrically connected with the output end Vref;
The source electrode of M5 and the grid electrode of M5 are grounded.
Wherein M5 works in a cut-off region, M1, M2, M3 and M4 all work in a saturation region,
M5 generating drain current
Wherein u is electron mobility, C ox is gate oxide capacitance of unit area, W is channel width of MOS tube, L is channel length of MOS tube, eta is sub-threshold swing coefficient, k is Peltzmann constant, T is absolute temperature, q is electron charge, V TH is threshold voltage of MOS tube M5, and output end Vref obtains reference current I VREF＝IPTAT+ICTAT+ILEAK with low temperature coefficient.
The beneficial effects of the invention are as follows: the first-order reference current of the invention utilizes the voltage difference DeltaV BE of the base electrode and the emitter electrode of the PNP of the two P-type triodes to act on a resistor R3 to generate a current I PTAT with positive temperature coefficient, the voltage difference V BE of the base electrode and the emitter electrode of the NPN of the one N-type triode acts on a resistor R4 to generate a current I CTAT with negative temperature coefficient, and the two are weighted to obtain the first-order reference current.
While the foregoing description illustrates and describes the preferred embodiments of the present invention, it is to be understood that the invention is not limited to the forms disclosed herein, but is not to be construed as limited to other embodiments, and is capable of use in various other combinations, modifications and environments and is capable of changes or modifications within the spirit of the invention described herein, either as a result of the foregoing teachings or as a result of the knowledge or skill of the relevant art. And that modifications and variations which do not depart from the spirit and scope of the invention are intended to be within the scope of the appended claims.
Although the present disclosure is described above, the scope of protection of the present disclosure is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the disclosure, and these changes and modifications will fall within the scope of the invention.
Claims (4)
1. A low temperature coefficient reference current source circuit, characterized by: comprising the following steps:
the starting circuit is used for ensuring that the reference current source is started normally and providing direct current bias;
The PTAT current generation circuit is electrically connected with the starting circuit and is used for generating a positive temperature coefficient current I PTAT according to the voltage difference between the base electrodes and the emitter electrodes of the PNPs of the two P-type triodes;
The CTAT current generation circuit is electrically connected with the starting circuit generation circuit and is used for generating a negative temperature coefficient current I CTAT according to the voltage difference between the base electrode and the emitter electrode of an N-type triode NPN acting on the other resistor;
The current summing circuit is electrically connected with the PTAT current generation circuit and the CTAT current generation circuit and is used for generating a reference current I VREF with a low temperature coefficient according to superposition of a current I PTAT with a positive temperature coefficient, a current I CTAT with a negative temperature coefficient and a MOS tube sub-threshold leakage current I LEAK;
the start-up circuit includes: PMOS tubes M30, M31, M32, M33, M34, NMOS tubes M35, M36, M37;
The source electrode of the M30 is electrically connected with the power supply end VDD, the grid electrode of the M30 is electrically connected with the bias voltage end A, and the drain electrode of the M30 is electrically connected with the drain electrode of the M36, the grid electrode of the M36 and the grid electrode of the M37;
The source electrode of the M31 is electrically connected with the power supply end VDD, the drain electrode of the M31 is electrically connected with the source electrode of the M32, the drain electrode of the M32 is electrically connected with the source electrode of the M33, and the drain electrode of the M33 is electrically connected with the source electrode of the M34 and the bias voltage C end;
The drain electrode of the M34 is electrically connected with the drain electrode of the M37 and the grid electrode of the M35, the drain electrode of the M35 is electrically connected with the bias voltage end B, and the bias voltage end B and the bias voltage end C are used as output ends of the starting circuit;
The grid electrode of the M31, the grid electrode of the M32, the grid electrode of the M33, the grid electrode of the M34, the source electrode of the M35, the source electrode of the M36 and the source electrode of the M37 are grounded;
The PTAT current generation circuit includes: PMOS transistors M6, M7, M8, M9, M10 and M11, NMOS transistors M12, M13, M14, M15, M16, M17 and M18, P-type triode PNP1, P-type triode PNP2, resistors R2 and R3;
the source electrode of the M6, the source electrode of the M7 and the source electrode of the M10 are electrically connected with a power supply end VDD;
The source electrode of the M8 is electrically connected with the drain electrode of the M6, the grid electrode of the M8 is electrically connected with the grid electrode of the M9, the grid electrode of the M11, the drain electrode of the M12, the other end of the resistor R2 and the bias voltage B end, and the drain electrode of the M8 is electrically connected with the drain electrode of the M13, the grid electrode of the M13 and the grid electrode of the M14;
The source electrode of the M9 is electrically connected with the drain electrode of the M7, the source electrode of the M11 is electrically connected with the drain electrode of the M10, and the grid electrode of the M6 is electrically connected with the grid electrode of the M7, the grid electrode of the M10, the drain electrode of the M9, one end of the resistor R2 and the bias voltage A end;
the grid electrode of the M12 is electrically connected with the bias voltage C end, and the source electrode of the M12 is connected with the drain electrode of the M14;
the source electrode of the M13 is electrically connected with the emitter electrode of the triode PNP1, and the source electrode of the M14 is electrically connected with the emitter electrode of the triode PNP2 through a resistor R3;
The base electrode of the triode PNP1, the base electrode of the triode PNP2, the collector electrode of the triode PNP1 and the collector electrode of the triode PNP2 are grounded;
The drain electrode of the M11 is electrically connected with the grid electrode of the M15, the drain electrode of the M15 and the grid electrode of the M16, and the source electrode of the M15 is electrically connected with the grid electrode of the M17, the drain electrode of the M17 and the grid electrode of the M18;
The source electrode of the M18 is grounded to the source electrode of the M17, and the drain electrode of the M18 is electrically connected with the source electrode of the M16;
the drain electrode of the M16 is electrically connected with the output end D and used as the output end of the PTAT current generation circuit;
The CTAT current generation circuit includes: PMOS tubes M19, M20, M21, M22, M23, M24, M25 and M26, NMOS tubes M27, M28 and M29, N-type triode NPN1 and a resistor R4;
the source electrode of the M19, the source electrode of the M21, the source electrode of the M23 and the source electrode of the M25 are electrically connected with a power supply end VDD, the grid electrode of the M19 is electrically connected with an end A of bias voltage, and the drain electrode of the M19 is electrically connected with the source electrode of the M20;
the grid electrode of the M20 is electrically connected with the end B of the bias voltage, and the drain electrode of the M20 is electrically connected with the grid electrode of the M27 and the collector electrode of the triode NPN 1;
The grid electrode of the M21 is electrically connected with the drain electrode of the M21, the grid electrode of the M23, the grid electrode of the M25 and the source electrode of the M22;
The grid electrode of the M22 is electrically connected with the drain electrode of the M22, the grid electrode of the M24, the grid electrode of the M26 and the drain electrode of the M27;
The source electrode of the M24 is electrically connected with the drain electrode of the M23, and the drain electrode of the M24 is electrically connected with the base electrode of the triode NPN1 and one end of the resistor R4;
the source electrode of the M26 is electrically connected with the drain electrode of the M25, and the drain electrode of the M26 is electrically connected with the drain electrode of the M28, the grid electrode of the M28 and the grid electrode of the M29;
The source electrode of the M27 and the source electrode of the M28 are respectively grounded, the source electrode of the M29, the other end of the resistor R4 and the emitter electrode of the triode NPN 1;
the drain electrode of the M29 is electrically connected with the output end E and used as the output end of the CTAT current generation circuit;
The current summing circuit includes: PMOS tubes M1, M2, M3 and M4, NMOS tube M5 and resistor R1;
The source electrode of the M1 and the source electrode of the M2 are electrically connected with a power supply end VDD;
the source electrode of the M3 is electrically connected with the drain electrode of the M1, and the drain electrode of the M3 is electrically connected with the grid electrode of the M1, the grid electrode of the M2 and one end of the resistor R1;
The source electrode of the M4 is electrically connected with the drain electrode of the M2, the grid electrode of the M4 is electrically connected with the grid electrode of the M3, the other end of the resistor R1, the drain electrode of the M5, the output end D and the output end E, and the drain electrode of the M4 is electrically connected with the output end Vref;
The source electrode of the M5 and the grid electrode of the M5 are grounded.
2. A low temperature coefficient reference current source circuit according to claim 1, wherein: all MOS tubes in the PTAT current generation circuit work in a saturation region,
The base and emitter voltage difference of triode PNP2 is
Generating a current with positive temperature coefficient across resistor R3
Where k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and N is the emitter area ratio of triode PNP2 to triode PNP 1.
3. A low temperature coefficient reference current source circuit according to claim 2, wherein: all MOS tubes in the CTAT current generation circuit work in a saturation region,
Collector current of triode NPN1
Wherein, beta is the amplification factor of the triode NPN1, I B is the base current of the triode NPN1, and V BE is the voltage difference between the base and the emitter of the triode NPN 1;
the grid voltage of the M27 is V g＝VDD-r0IC;
Wherein V DD is the power supply terminal voltage, and r 0 is the equivalent impedance of M19 and M20;
The drain of the M27 generates drain current
Wherein u is electron mobility, C ox is unit area gate oxide capacitance, W is channel width of the MOS transistor, L is channel length of the MOS transistor, V gs is voltage difference between the M27 gate and the source, V gs＝Vg,VTH is threshold voltage of the MOS, and I D is copied in proportion through a current mirror to obtain negative temperature coefficient current I CTAT generated by the CTAT current generation circuit.
4. A low temperature coefficient reference current source circuit according to claim 3, wherein: the M5 works in a cut-off region, the M1, M2, M3 and M4 all work in a saturation region, and leakage current generated by the M5 drain electrode
Wherein η is a subthreshold oscillation coefficient; the output terminal Vref obtains a reference current I VREF＝IPTAT+ICTAT+ILEAK with a low temperature coefficient.
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