CN108594924A - A kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work - Google Patents
A kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work Download PDFInfo
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
Abstract
Band-gap reference voltage circuit the present invention relates to a kind of work of super low-power consumption whole CMOS subthreshold includes start-up circuit, sub-threshold current generation circuit, partial pressure CTAT circuits, cascade PTAT circuit and PTAT voltage adjustment pipe.Start-up circuit makes the integrated circuit of the present invention break away from zero, work in normal operating point, sub-threshold current generation circuit is for generating metal-oxide-semiconductor subthreshold current, so that the integrated circuit of the present invention works in subthreshold state, CTAT circuits are divided for reducing circuit negative temperature coefficient, cascade PTAT circuit for generating PTAT voltage, due to PTAT voltage can multistage subsection adjustment, PTAT voltage adjustment pipe 5 is used to adjust the electric current cascaded in PTAT circuit 4.By whole CMOS subthreshold job design, overall work electric current is greatly reduced, final output voltage can be less than 1V, and can accurately adjust the temperature coefficient of output voltage so that output voltage has higher temperature accuracy.
Description
Technical field
The present invention relates to a kind of band-gap reference source circuit, especially a kind of band gap base of super low-power consumption whole CMOS subthreshold work
Quasi- potential circuit can be widely applied to the low power consumption high-precision IC chip under the conditions of deep submicron process.
Background technology
Voltage reference is an important class of integrated circuit, can also be used as a module in integrated circuit.To electricity
The basic demand of pressure benchmark is output voltage with factors such as integrated circuit fabrication process, temperature, supply voltage and driving loads
The amplitude for changing and changing is as small as possible.
CMOS technology since quiescent dissipation is small, can large-scale integrated be already known to integrated circuit prevailing technology.Common
CMOS technology in, used component type is more, and issuable deviation is bigger in production process.To avoid technique
Fluctuate the influence to chip performance.Traditional bandgap reference circuit is to obtain preferable temperature coefficient, include necessarily metal-oxide-semiconductor, resistance,
A variety of devices such as triode.The design is designed using whole CMOS, can utmostly avoid the deviation that technological fluctuation is brought.
In recent years, with the technological progress of integrated circuit fabrication process, chip feature sizes constantly reduce, core voltage
Also constantly decline.The internal power source voltage of usual 0.18 μm of technique is 1.8V, and the internal power source voltage of 45nm techniques is only
1.1V.The needs that traditional bandgap benchmark is weighted due to Positive and Negative Coefficient Temperature, output voltage can only be fixed as 1.2V or so, otherwise
Its temperature coefficient will be excessively poor.And the 1.2V output voltages of traditional bandgap benchmark are already higher than the 1.1V supply voltages of 45nm techniques
, can not be designed at all using traditional bandgap under 45nm process conditions.
With scientific and technological progress, shares the mobile devices such as bicycle, smart mobile phone, motion bracelet and wearable device is more and more
Be dissolved into people life in, these equipment usually all have the power consumption of chip very high requirement, thus how to reduce core
Piece power consumption becomes more and more important.The band-gap reference overall work electric current of the design is 8nA, can be good at being suitable for mobile set
The low-power consumption application fields such as standby and wearable device.
Invention content
The technical problem to be solved by the present invention is to through the invention whole CMOS subthreshold work band-gap reference voltage circuit,
Reduce output reference voltage, the present invention realizes the output reference voltage less than 1V, disclosure satisfy that deep submicron process product
It needs.Temperature coefficient is a basic parameter of band-gap reference, and the present invention takes into account while meeting reduction output reference voltage
Chip temperature coefficient realizes smaller output voltage temperature drift.
A kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work, including the production of start-up circuit, sub-threshold current
Raw circuit, partial pressure CTAT circuits, cascade PTAT circuit and PTAT voltage adjustment pipe；The output end of start-up circuit connects sub-threshold current
The input terminal of generation circuit, the output end of sub-threshold current generation circuit be separately connected partial pressure CTAT circuits, cascade PTAT circuit and
The input terminal that PTAT voltage adjusts pipe provides sub-threshold current, divides the input terminal of the output end and cascade PTAT circuit of CTAT circuits
The output end of connection, PTAT voltage adjustment pipe is connect with cascade PTAT circuit, cascades PTAT circuit output reference voltage.
Start-up circuit includes p-type metal-oxide-semiconductor PM0, p-type metal-oxide-semiconductor PM1 and N-type metal-oxide-semiconductor NM0, the source electrode of transistor PM0 and PM1
It is connected with power vd DE, the drain electrode of transistor PM0 is connected and is connect with the grid of NMO, grid, the NM0 of PM0 with the grid of PM1
Source electrode and NM0 grounded drain, the drain electrode of transistor PM1 is the output end of start-up circuit.Start-up circuit can make the present invention
Circuit break away from zero, work in normal operating point.
Sub-threshold current generation circuit includes p-type metal-oxide-semiconductor PM2, PM3 and PM4, further includes N-type metal-oxide-semiconductor NM1 and NM2, PM3 and
The grid of PM4 is connected and is connected with the drain electrode of PM4, constitutes current mirror, PM2 grid leak short circuits, NM2 grid leak short circuits, the drain electrode of NM1
Be connected with the drain electrode of PM4, the source electrode of NM1 is connected with the drain electrode of NM2, the grid of NM1 be connected with the drain electrode of PM3 and with the leakage of PM2
Extremely it is connected, the drain electrode of PM2 and the output end that the grid of PM4 is sub-threshold current generation circuit.Sub-threshold current generation circuit is mainly used
In generation metal-oxide-semiconductor subthreshold current, and sub-threshold current is output to subsequent conditioning circuit by way of current mirror so that entire circuit
Subthreshold state is worked in, to achieve the purpose that reduce integrated circuit power consumption.
Partial pressure CTAT circuits include drain electrode and the NM3 of p-type metal-oxide-semiconductor PM5, N-type metal-oxide-semiconductor NM3 and N-type metal-oxide-semiconductor NM4, PM5
Drain electrode is connected, and NM3 is concatenated with NM4, NM4 grid leak short circuits, NM4 source electrodes ground connection, and PM5 and the PM4 in sub-threshold current generation circuit are total
Grid, the NM3 and NM1 in sub-threshold current generation circuit are total to grid, and the drain electrode of NM4 is to divide the output end of CTAT circuits.Divide CTAT
Circuit is mainly used for reducing circuit negative temperature coefficient so that output voltage can be less than 1V, while the partial circuit can also subtract
Higher order term in small negative temperature coefficient, so as to improve the temperature coefficient of output reference.
It is that level Four cascades PTAT circuit, including p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9 to cascade PTAT circuit, further includes N-type
Metal-oxide-semiconductor NM5, NM6, NM7, NM8, NM9, NM10, NM11 and NM12, p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9 are total to grid, NM5 with
NM7 is concatenated and grid, the drain electrode of NM5 grid leak short circuits, NM5 are connect with the drain electrode of PM6 altogether, and NM7 is concatenated with NM8 and total grid, NM7 grid leaks
The drain electrode of short circuit, NM7 is connect with the drain electrode of PM7, and NM9 is concatenated with NM10 and total grid, NM9 grid leak short circuits, the drain electrode of NM9 and PM8
Drain electrode connection, NM11 concatenates with NM12 and is total to grid, and the drain electrode of NM11 grid leak short circuits, NM11 is connect with the drain electrode of PM9.Cascade
PTAT circuit is for generating PTAT voltage, since PTAT voltage can multistage subsection adjustment so that accurate adjustment high-order temperature coefficient
It is referred to as possible, the temperature coefficient of output reference voltage can be reduced.If only with two level for positive temperature coefficient regulation not
It is enough, higher temperature precision cannot be reached, with the increase of series, then designer more can accurately adjust positive temperature to more cascade numbers
Spend coefficient.But as the increase chip power-consumption of series also rises therewith, it is unfavorable for reducing chip power-consumption.If in addition increasing series mistake
It is more, when output voltage reaches 0 temperature coefficient, it is possible to output voltage can be made to need to cannot achieve more than supply voltage.
Therefore the factor of trade off temperature coefficient, power consumption, 4 grades of cascades are taken here.
PTAT voltage adjustment pipe is p-type metal-oxide-semiconductor PM10, and the PM9 in PM10 and 4 grade of cascade PTAT circuit is total to grid, PM10's
It drains and is connected with the output end of 4 grades of cascade PTAT circuits.PTAT voltage adjustment pipe cascades electric current in PTAT circuit for adjusting, with
Achieve the purpose that adjust PTAT circuit positive temperature coefficient.
Advantageous effect：
1) by whole CMOS subthreshold job design, it is greatly reduced overall work electric current, chip total working electricity when normal work
Only 8nA is flowed, power consumption is extremely low.
2) by being depressured CTAT circuits, negative temperature coefficient voltage is reduced.And then reduce positive temperature corresponding with negative temperature coefficient
Spend coefficient voltages so that final output voltage can be less than 1V, overcome the drawbacks of traditional bandgap can only export 1.2V voltages.Make
The IC manufacturing of deep submicron process can be suitable for by obtaining the design.
3) output voltage can accurately be adjusted by total grid series connection PTAT circuit structure and voltage-reg-ulator tube collaborative work
Temperature coefficient so that output voltage has higher temperature accuracy.
4) whole CMOS design and the triode design of traditional bandgap are different, and positive and negative temperature coefficient derives from metal-oxide-semiconductor, makes
Fewer with part category, fabrication error is smaller.
Description of the drawings
Fig. 1 is structure of the invention block diagram；
Fig. 2 is band-gap reference voltage circuit figure proposed by the present invention；
Fig. 3 is the temperature characteristics figure of Fig. 2 band-gap reference voltage circuit output voltages；
Fig. 4 is the snapshots in time of Fig. 2 band-gap reference voltage circuits output voltage and output current；
Fig. 5 is Fig. 2 band-gap reference voltage circuits output voltage with mains voltage variations figure.
Specific implementation mode
The present invention is described in detail with reference to the accompanying drawings and detailed description.
As shown in Figure 1, a kind of band-gap reference voltage circuit packet of super low-power consumption whole CMOS subthreshold work proposed by the present invention
Include start-up circuit 1, sub-threshold current generation circuit 2, partial pressure CTAT (Complementary Proportional To Absolute
Temperature) circuit 3, cascade PTAT (Proportional To Absolute Temperature) circuits 4 and PTAT electricity
Pressure adjustment pipe 5.
The input terminal of the output end connection sub-threshold current generation circuit 2 of start-up circuit 1, sub-threshold current generation circuit 2 it is defeated
Input terminal, the input terminal for cascading PTAT circuit 4 and the PTAT voltage that outlet is separately connected partial pressure CTAT circuits 3 adjust the defeated of pipe 5
Enter end, the negative temperature coefficient voltage for 3 output of positive temperature coefficient voltage and partial pressure CTAT circuits that cascade PTAT circuit 4 exports passes through
The reference voltage V ref of zero-temperature coefficient is exported after weighting in output end.
Start-up circuit 1 makes the integrated circuit of the present invention break away from zero operating point, works in normal operating point, start-up circuit 1
Subsequent sub-threshold current generation circuit 2 is directly acted on, sub-threshold current generation circuit 2 is used to generate metal-oxide-semiconductor subthreshold current, and
Sub-threshold current is output to subsequent conditioning circuit by way of current mirror so that integrated circuit of the invention works in subthreshold shape
State, to achieve the purpose that reduce integrated circuit power consumption.CTAT circuits 3 are divided for reducing circuit negative temperature coefficient so that defeated
1V can be less than by going out voltage, while divide CTAT circuits 3 also and can reduce the higher order term in negative temperature coefficient, so as to improve output
The temperature coefficient of benchmark.PTAT circuit 4 is cascaded mainly for generation of PTAT voltage, due to PTAT voltage can multistage subsection adjustment,
Accurately to adjust high-order temperature coefficient, the temperature coefficient of output reference voltage can be reduced.PTAT voltage adjusts
Pipe 5 is used to adjust the electric current in cascade PTAT circuit 4, to achieve the purpose that adjust PTAT circuit positive temperature coefficient.Cascade PTAT
The positive temperature coefficient voltage that circuit 4 exports and the negative temperature coefficient voltage of partial pressure CTAT circuit outputs eventually pass through after weighting defeated
Outlet exports the reference voltage of zero-temperature coefficient.
As shown in Fig. 2, Fig. 2 is band-gap reference voltage circuit figure proposed by the present invention, start-up circuit 1 includes p-type metal-oxide-semiconductor
PM0, p-type metal-oxide-semiconductor PM1 and N-type metal-oxide-semiconductor NM0, transistor PM0 are connected with the source electrode of PM1 with power vd DE, the leakage of transistor PM0
Pole is connected with the grid of PM1 and is connect with the grid of NMO, the grounded drain VNDE of the grid of PM0, the source electrode of NM0 and NM0, brilliant
The drain electrode of body pipe PM1 is the output end of start-up circuit 1.
Since band-gap reference operating point may be zero, when operating point is that zero works, band-gap reference will be unable to normally
Output reference voltage.Start-up circuit 1 is devised to avoid zero from working, in the present invention so that integrated circuit breaks away from zero operating point,
The start-up circuit 1 directly acts on subsequent sub-threshold current generation circuit 2, it is ensured that 2 non-zero points of sub-threshold current generation circuit
Work, generates sub-threshold current always.Once circuit enters normal working point, start-up circuit will be stopped, not to main body circuit
It has an impact.
The source-drain electrode of NM0 in Fig. 2 in start-up circuit 1 connects altogether is equivalent to mos capacitance, PM1 grid voltages when circuit powers on
It is connected for 0V, PM1 and is powered on to subsequent sub-threshold current generation circuit 2, so that subsequent conditioning circuit breaks away from zero work.Work as circuit
When normal work, NM0 grid voltages are supply voltage, and PM1 cut-offs, start-up circuit does not work, to not interfere with subsequent conditioning circuit
Normal work.
In Fig. 2 sub-threshold current generation circuit 2 include p-type metal-oxide-semiconductor PM2, PM3 and PM4, further include N-type metal-oxide-semiconductor NM1 and
NM2.The grid of PM3 and PM4 is connected and is connected with the drain electrode of PM4, constitutes current mirror, PM2 grid leak short circuits are typical two pole
Pipe connection, the triode for substituting common base stage and collector short circuit in the present invention use, NM2 grid leak short circuits, the drain electrode of NM1 with
The drain electrode of PM4 is connected, and the source electrode of NM1 is connected with the drain electrode of NM2, the grid of NM1 be connected with the drain electrode of PM3 and with the drain electrode of PM2
It is connected, the drain electrode of PM2 and the output end that the grid of PM4 is sub-threshold current generation circuit 2, the drain voltage of PM2 is Vbe。
Gate source voltage V when transistor PM2 conductingsGSPM2About 0.6V or so.NM1 connects with NM2 and parameter is identical, stream
Electric current through NM1 and NM2 is equal, i.e. ISNM1=IDNM2.Since the two N-type metal-oxide-semiconductor electric currents are equal and parameter is identical, NM1 and
NM2 gate source voltages are equal, and may each be about 0.3V, and in 0.18 micron process of CSMC companies, the threshold voltage of N-type MOS is about
0.45V, to which NM1 and NM2 gate source voltages are less than threshold voltage, NM1 and NM2 are operated in subthreshold region, generate subthreshold work
Make electric current.Two p-type metal-oxide-semiconductors of PM3, PM4 constitute current mirroring circuit, and the current feedback for flowing through NM1, NM2 returns PM2 so that flows through
The electric current of PM2 is also sub-threshold current.
Partial pressure CTAT circuits 3 in Fig. 2 include p-type metal-oxide-semiconductor PM5, N-type metal-oxide-semiconductor NM3 and N-type metal-oxide-semiconductor NM4.The leakage of PM5
Pole is connected with the drain electrode of NM3, and NM3 is concatenated with NM4, NM4 grid leak short circuits, NM4 source electrodes ground connection, PM5 and sub-threshold current generation circuit 2
In PM4 be total to grid, the NM3 and NM1 in sub-threshold current generation circuit 2 be total to grid, and the drain electrode of NM4 is the output of partial pressure CTAT circuits 3
End, output voltage are denoted as VCTAT.NM3 and NM4 two is the completely the same N-type metal-oxide-semiconductor of parameter size, and NM1 drain electrodes can directly connect
Power supply connects current source.
NM3 grids access VbeNegative temperature coefficient voltage.Because no matter metal-oxide-semiconductor is in saturation work or subthreshold working condition
When, conducting electric current is and VDSIt is unrelated, and only with VGSIt is related, as long as therefore ensureing that two metal-oxide-semiconductors NM3 and NM4 work in same shape
State is saturated work or subthreshold work, at this time VCTATEnd output voltage will be input VbeHalf, in output end VCTATTemperature
Degree coefficient also halves therewith.
Cascade PTAT circuit 4 in Fig. 2 is that level Four cascades PTAT circuit, including p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9,
Further include N-type metal-oxide-semiconductor NM5, NM6, NM7, NM8, NM9, NM10, NM11 and NM12, p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9 are total
Grid, NM5 are concatenated with NM7 and are total to grid, and the drain electrode of NM5 grid leak short circuits, NM5 is connect with the drain electrode of PM6, and NM7 is concatenated and is total to NM8
The drain electrode of grid, NM7 grid leak short circuits, NM7 is connect with the drain electrode of PM7, and NM9 is concatenated with NM10 and total grid, NM9 grid leak short circuits, NM9's
Drain electrode is connect with the drain electrode of PM8, and NM11 is concatenated with NM12 and grid, NM11 grid leak short circuits, the drain electrode of NM11 connect with the drain electrode of PM9 altogether
It connects.
In the case where no subsequent PTAT voltage adjustment pipe 5 accesses, the electric current for flowing through NM11 and NM12 is identical, and electric current
All it is the exponential function of grid voltage, and is directly related with temperature, then has：
VDSNM12=VGSNM12-VGSNM11=η VTln (S11/S12)
Wherein S11 is the breadth length ratio of NM11 raceway grooves, and S12 is the breadth length ratio of NM12 raceway grooves, as a result, NM11 and NM12 composition one
Group PTAT voltage circuit, i.e. first group of PTAT voltage circuit.
NM9 and NM10 connection structures are identical as NM11 and NM12 connection structures, and NM9 and NM10 form second group of PTAT voltage
Circuit, but its PTAT voltage temperature coefficient and first group of PTAT voltage circuit are slightly different.If as NM9 with NM10 sizes,
Then IDNM9=IDNM11=ID, IDNM10=2ID, wherein ID indicate NM9 be operated in the leakage current that metal-oxide-semiconductor NM9 is flowed through in subthreshold region.
Then have at this time：VDSNM10=VGSNM10-VGSNM9=η VTln (IDNM10/IDNM9)
If NM9, NM10, NM11 and NM12 device parameters are all identical, when no PTAT voltage adjustment pipe 5 accesses, according to
Metal-oxide-semiconductor subthreshold operation principle then has：
VDSNM 10+VDSNM 12=η VT(ln 2)
Wherein, η is the subthreshold slope factor, VTFor thermal voltage.
Similarly when no PTAT voltage adjustment pipe 5 accesses, level Four cascades in PTAT circuit：
VDSNM 6+VDSNM 8+VDSNM 10+VDSNM 12=η VT(ln 2+ln 3+ln4)
Level Four, which cascades PTAT circuit, has positive temperature coefficient.
As shown in Fig. 2, increasing PTAT voltage in circuit adjusts pipe 5, it is p-type metal-oxide-semiconductor that the PTAT voltage, which adjusts pipe 5,
PM9 in PM10, PM10 and 4 grades of cascade PTAT circuits is total to grid, the output end phase of the drain electrode of PM10 and 4 grades of cascade PTAT circuits 4
Even.
PTAT voltage adjusts pipe 5 and increases then above formula positive temperature coefficient increase, and PM10 and PM9 are total to grid, and adjustment 5 electric current of pipe is also
ID。
If NM9, NM10, NM11 and NM12 device parameters are all identical, because adjustment tube current is also IDWith NM9 drain currents
It is identical, so,
VDSNM12=VGSNM12-VGSNM11=η VTln (2)
Similarly NM9 drain currents are ID, then flow into IDNM10=3ID,
VDSNM10=VGSNM10-VGSNM9=η VTln (3)
So：
VDSNM 10+VDSNM 12=η VT((ln2)+(ln3))
Similarly：
VDSNM 6+VDSNM8+VDSNM 10+VDSNM 12=η VT((ln2)+(ln3)+(ln4)+(ln5))
Obviously after PM10 being added, cascade 5 positive temperature coefficient of PTAT circuit rises.Therefore the present invention can be by adjusting total grid
Tandem tube number, the electric current for flowing through total grid tandem tube or device parameters can relatively accurately adjust positive temperature coefficient, to obtain
Low Drift Temperature output reference voltage.
Divide 3 output voltage V of CTAT circuitsCTAT：
V in above formulaBG(Tr) it is reference temperature TrUnder band gap voltage；ξ is constant temperature independent but related with technique；
VT=KT/q is thermal voltage.Usual estimated temperature rises 1 DEG C, VbeDecline 2~2.5mV.
Final output voltage VrefExpression formula is:
Fig. 3 is the temperature characteristics figure of Fig. 2 band-gap reference voltage circuit output voltages, and abscissa is temperature, unit
℃；Ordinate is voltage, unit V.It can be seen from the figure that the band-gap reference voltage circuit of the present invention can be at -50 DEG C to 150 DEG C
Temperature range in work, as variation of ambient temperature output voltage also fluctuates, highest is defeated in the temperature range
It is 495.9mV, minimum output voltage 494.9mV to go out voltage, and the temperature coefficient within the scope of relevant temperature is 4.86 × 10-6。
Fig. 4 is the snapshots in time of Fig. 2 band-gap reference voltage circuits output voltage and output current.Abscissa is time, unit
us.Ordinate is respectively voltage and current, and unit is respectively V and nA.As can be seen from the figure the circuit final output voltage is steady
It is scheduled on 495.799mV, overall work electric current is 8.07nA when work.
Fig. 5 is Fig. 2 band-gap reference voltage circuits output voltage with mains voltage variations figure, and abscissa is supply voltage, single
Position V.Ordinate is output voltage, unit V.It can be seen from the figure that the circuit can start just when supply voltage is 0.83V
Often work can stablize output about 0.5V output reference voltages as supply voltage rises.
Claims (6)
1. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work, which is characterized in that including start-up circuit
(1), the sub-threshold current generation circuit (2) for generating sub-threshold current, the partial pressure CTAT electricity for exporting negative temperature coefficient voltage
Road (3), the cascade PTAT circuit (4) for exporting positive temperature coefficient voltage and PTAT voltage adjustment pipe (5)；
The input terminal of the output end connection sub-threshold current generation circuit (2) of start-up circuit (1), sub-threshold current generation circuit (2)
Output end is separately connected the input terminal of partial pressure CTAT circuits (3), the input terminal of cascade PTAT circuit (4) and PTAT voltage adjustment pipe
(5) input terminal provides sub-threshold current, and the output end of partial pressure CTAT circuits (3) is connect with the input terminal of cascade PTAT circuit (4),
The output end of PTAT voltage adjustment pipe (5) is connect with cascade PTAT circuit (4), cascades PTAT circuit (4) output reference voltage.
2. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work according to claim 1, feature
It is：The start-up circuit includes the source electrode point of p-type metal-oxide-semiconductor PM0, p-type metal-oxide-semiconductor PM1 and N-type metal-oxide-semiconductor NM0, PM0 and PM1
It is not connected with power vd DE, the drain electrode of transistor PM0 is connected with the grid of PM1, and is connect with the grid of NM0, the grid of PM0,
The source electrode of NM0 and the grounded drain of NM0, the drain electrode of transistor PM1 are the output ends of start-up circuit (1).
3. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work according to claim 1, feature
It is：Sub-threshold current generation circuit (2) includes p-type metal-oxide-semiconductor PM2, PM3 and PM4, further includes N-type metal-oxide-semiconductor NM1 and NM2, PM3 and
The grid of PM4 is connected and is connected with the drain electrode of PM4, constitutes current mirror, PM2 grid leak short circuits, NM2 grid leak short circuits, the drain electrode of NM1
Be connected with the drain electrode of PM4, the source electrode of NM1 is connected with the drain electrode of NM2, the grid of NM1 be connected with the drain electrode of PM3 and with the leakage of PM2
Extremely it is connected, the drain electrode of PM2 and the output end that the grid of PM4 is sub-threshold current generation circuit (2).
4. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work according to claim 1, feature
It is：Partial pressure CTAT circuits (3) include drain electrode and the NM3 of p-type metal-oxide-semiconductor PM5, N-type metal-oxide-semiconductor NM3 and N-type metal-oxide-semiconductor NM4, PM5
Drain electrode is connected, and NM3 is concatenated with NM4, NM4 grid leak short circuits, NM4 source electrodes ground connection, the PM5 and PM4 in sub-threshold current generation circuit (2)
Grid altogether, the NM3 and NM1 in sub-threshold current generation circuit (2) are total to grid, and the drain electrode of NM4 is to divide the output end of CTAT circuits (3).
5. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work according to claim 1, feature
It is：The cascade PTAT circuit (4) is that level Four cascades PTAT circuit, including p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9, also
Including N-type metal-oxide-semiconductor NM5, NM6, NM7, NM8, NM9, NM10, NM11 and NM12, p-type metal-oxide-semiconductor PM6, PM7, PM8 and PM9 are total to grid,
NM5 is concatenated with NM7 and grid, the drain electrode of NM5 grid leak short circuits, NM5 are connect with the drain electrode of PM6 altogether, and NM7 is concatenated with NM8 and total grid,
The drain electrode of NM7 grid leak short circuits, NM7 is connect with the drain electrode of PM7, and NM9 is concatenated with NM10 and total grid, NM9 grid leak short circuits, the leakage of NM9
The drain electrode of pole and PM8 connect, and NM11 is concatenated with NM12 and grid, NM11 grid leak short circuits, the drain electrode of NM11 connect with the drain electrode of PM9 altogether
It connects.
6. a kind of band-gap reference voltage circuit of super low-power consumption whole CMOS subthreshold work according to claim 5, feature
It is：The PTAT voltage adjustment pipe (5) is that p-type metal-oxide-semiconductor PM10, PM10 are total to grid with the PM9 in cascade PTAT circuit (4),
The drain electrode of PM10 is connected with the output end of cascade PTAT circuit (4).
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110377095A (en) * | 2019-07-22 | 2019-10-25 | 天津理工大学 | A kind of subthreshold value reference voltage generating circuit of super low-power consumption low-voltage Low Drift Temperature |
| CN111158418A (en) * | 2020-01-09 | 2020-05-15 | 电子科技大学 | Full MOSFET sub-threshold band-gap reference voltage source |
| CN111796625A (en) * | 2020-07-27 | 2020-10-20 | 东南大学 | Ultra-low power consumption CMOS voltage reference circuit |
| CN113031688A (en) * | 2021-03-02 | 2021-06-25 | 江苏润石科技有限公司 | Low-power-consumption voltage source with high-performance band-gap reference |
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