CN115769351A - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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CN115769351A
CN115769351A CN202180047781.8A CN202180047781A CN115769351A CN 115769351 A CN115769351 A CN 115769351A CN 202180047781 A CN202180047781 A CN 202180047781A CN 115769351 A CN115769351 A CN 115769351A
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bonding
electrode
semiconductor device
bonding layer
conductive member
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CN202180047781.8A
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齐藤光俊
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Rohm Co Ltd
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Rohm Co Ltd
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Abstract

半导体装置具备芯片焊盘、半导体元件、第一接合层、第一导电部件以及第二接合层。上述芯片焊盘具有朝向厚度方向的主面。上述半导体元件具有与上述主面对置地设置的第一电极和在上述厚度方向上设于与上述第一电极相反的一侧的第二电极。上述第一电极与上述主面电接合。上述第一接合层将上述第一电极与上述主面电接合。上述第一导电部件与上述第二电极电接合。上述第二接合层将上述第一导电部件与上述第二电极电接合。上述第一接合层的熔点比上述第二接合层的熔点高。

Description

半导体装置以及半导体装置的制造方法
技术领域
本公开涉及具备MOSFET等半导体元件的半导体装置和该半导体装置的制造方法。
背景技术
现今，众所周知一种具备MOSFET等半导体元件的半导体装置。这样的半导体装置在具备电力转换电路(例如DC-DC转换器)的电子设备等中使用。专利文献1中公开了具备MOSFET的半导体装置的一例。该半导体装置具有：漏极端子，其施加有电源电压；栅极端子，其用于向MOSFET输入电信号；以及源极端子，其在基于该电信号将与电源电压对应的电流转换后，供转换后的电流流动。MOSFET具有与漏极端子导通的漏极电极和与源极端子导通的源极电极。漏极电极通过第一导电性接合材料(焊料)而与同漏极端子相连的芯片焊盘(die pad)电接合。源极电极通过第二导电性接合材料(焊料)而与导电部件(在专利文献1中为金属夹)接合。另外，导电部件也与源极端子接合。通过这样的结构，能够向该半导体装置流动大电流。
近年来，普及了具备具有化合物半导体基板的MOSFET的半导体装置。这样的化合物半导体基板例如将碳化硅作为材料来形成。该MOSFET与现有的MOSFET相比，能够使元件的大小更小，并且能够更加提高电流的转换效率。在专利文献1所公开的半导体装置中，在采用这样的小型的MOSFET的情况下，若在同一工序中进行通过第一导电性接合材料使漏极电极与芯片焊盘电接合的动作和通过第二导电性接合材料使导电部件与源极电极电接合的动作，则有时MOSFET的位置相对于芯片焊盘偏移。这是由通过回流使第一导电性接合材料以及第二导电性接合材料同时熔融而引起的。在该情况下，即使MOSFET相对于芯片焊盘的位置偏移量微小，由于MOSFET的尺寸较小等，所以有时导电部件相对于源极电极的接合面积缩小，也有阻碍电流流向源极端子的担忧。
现有技术文献
专利文献
专利文献1：日本特开2016-192450号公报
发明内容
发明所要解决的课题
鉴于上述情况，本公开的一个课题在于提供能够与大电流对应且能够抑制导电部件相对于半导体元件的电极的接合面积的缩小的半导体装置。并且，本公开的另一课题在于提供这样的半导体装置的制造方法。
用于解决课题的方案
由本公开的第一方案提供的半导体装置具备：芯片焊盘，其具有朝向厚度方向的主面；半导体元件，其具有与上述主面对置地设置的第一电极和在上述厚度方向上设于与上述第一电极相反的一侧的第二电极，并且上述第一电极与上述主面电接合；第一接合层，其将上述第一电极与上述主面电接合；第一导电部件，其与上述第二电极电接合；以及第二接合层，其将上述第一导电部件与上述第二电极电接合。构成为上述第一接合层的熔点比上述第二接合层的熔点高。
由本公开的第二方案提供的半导体装置的制造方法具备以下各工序：在芯片焊盘的主面之上配置具有导电性的第一接合材料的工序；将具有相互位于相反侧的第一电极以及第二电极的半导体元件以上述第一电极与上述第一接合材料对置的方式配置于上述第一接合材料之上的工序；通过使上述第一接合材料熔融以及硬化来使上述第一电极与上述主面电接合的工序；将具有导电性的第二接合材料配置于上述第二电极之上的工序；以及将导电部件配置于上述第二接合材料之上，而且通过使上述第二接合材料熔融以及硬化来使上述导电部件与上述第二电极电接合的工序。上述第一接合材料的熔点比上述第二接合材料的熔点高。
发明的效果如下。
根据上述的半导体装置以及制造方法，能够与更大电流对应，而且能够抑制导电部件相对于半导体元件的电极的接合面积的缩小。
本公开的其它特征以及优点通过基于附图在下文中进行的详细的说明将会变得更加明确。
附图说明
图1是本公开的第一实施方式的半导体装置的立体图。
图2是图1所示的半导体装置的俯视图。
图3是与图2对应的俯视图，透过封固树脂示出。
图4是图1所示的半导体装置的仰视图。
图5是图1所示的半导体装置的主视图。
图6是图1所示的半导体装置的右视图。
图7是沿着图3的VII-VII线的剖视图。
图8是沿着图3的VIII-VIII线的剖视图。
图9是沿着图3的IX-IX线的剖视图。
图10是图3的局部放大图。
图11是图7的局部放大图。
图12是图7的另一局部放大图。
图13是第一实施方式的变形例的半导体装置的局部放大剖视图。
图14是说明图1所示的半导体装置的制造工序的俯视图。
图15是说明图1所示的半导体装置的制造工序的俯视图。
图16是说明图1所示的半导体装置的制造工序的俯视图。
图17是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图18是说明图1所示的半导体装置的制造工序的俯视图。
图19是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图20是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图21是说明图1所示的半导体装置的制造工序的俯视图。
图22是本公开的第二实施方式的半导体装置的俯视图，透过封固树脂示出。
图23是沿着图22的XXIII-XXIII线的剖视图。
图24是图23的局部放大图。
图25是图23的另一局部放大图。
具体实施方式
基于附图，在下文中对本公开的实施方式进行说明。
基于图1～图13对本公开的第一实施方式的半导体装置A10进行说明。半导体装置A10在具备电力转换电路(例如DC-DC转换器)的电子设备等中使用。半导体装置A10具备芯片焊盘10、第一引线11、第二引线12、第三引线13、半导体元件20、第一接合层21、第二接合层22、第三接合层23、第一导电部件31、金属丝33以及封固树脂40。图3中，为便于理解，透过封固树脂40并由假想线(双点划线)示出。
为便于说明，将芯片焊盘10的厚度方向称作“厚度方向z”。将与厚度方向z正交的方向称作“第一方向x”。将与厚度方向z及第一方向x双方正交的方向称作“第二方向y”。在图示例子中，半导体装置A10呈沿第一方向x较长的形状，但本公开并不限定于此。
如图3、图7以及图8所示，芯片焊盘10是搭载半导体元件20的导电部件。芯片焊盘10与第一引线11、第二引线12以及第三引线13一起由同一引线框架构成。该引线框架为铜(Cu)或铜合金。因此，芯片焊盘10、第一引线11、第二引线12以及第三引线13各自的组成包含铜(即，各部件含有铜)。如图8所示，芯片焊盘10具有主面101、背面102以及贯通孔103。主面101朝向厚度方向z。在主面101之上搭载半导体元件20。背面102在厚度方向z上朝向与主面101相反的一侧。例如对背面102实施了镀锡(Sn)。贯通孔103在厚度方向z上从主面101起贯通芯片焊盘10直到背面102。贯通孔103在沿厚度方向z观察时呈圆形。如图7所示，芯片焊盘10的厚度T比第一引线11的最大厚度tmax大。
如图3、图7以及图8所示，半导体元件20搭载在芯片焊盘10的主面101之上。半导体元件20例如是MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor：金属-氧化物半导体场效应晶体管)。在半导体装置A10的说明中，半导体元件20将n沟道型且纵式构造的MOSFET作为对象。半导体元件20包含化合物半导体基板。该化合物半导体基板的主材料为碳化硅(SiC)。除此之外，作为该化合物半导体基板的主材料，也可以使用氮化镓(GaN)。在半导体装置A10中，在沿厚度方向z观察时，半导体元件20的面积为芯片焊盘10的主面101的面积的40％以下。在沿厚度方向z观察时，半导体元件20的面积也可以为主面101的面积的20％以下，还可以为10％以下。该比率能够通过适当地改变半导体元件20的该面积和主面101的该面积而变化。如图10及图11所示，半导体元件20具有第一电极201、第二电极202以及第三电极203。
如图11所示，第一电极201与芯片焊盘10的主面101对置地设置。对第一电极201施加成为电力转换对象的直流的电源电压。第一电极201相当于漏极电极。
如图10及图11所示，第二电极202在厚度方向z上设于与第一电极201相反的一侧。向第二电极202流动由半导体元件20转换后的电流。第二电极202相当于源极电极。
如图10及图11所示，第三电极203在厚度方向z上设于与第一电极201相反的一侧，而且位于与第二电极202分离的位置。对第三电极203施加用于使半导体元件20驱动的栅极电压。即，第三电极203相当于栅极电极。基于该栅极电压，半导体元件20对与施加于第一电极201的电源电压对应的电流进行转换。在沿厚度方向z观察时，第三电极203的面积比第二电极202的面积小。
如图11所示，第一接合层21包含介于芯片焊盘10的主面101与半导体元件20的第一电极201之间的部分。第一接合层21具有导电性。第一接合层21将第一电极201与主面101电接合。由此，在半导体装置A10中，构成为第一电极201与主面101电接合，而且第一电极201与芯片焊盘10导通。第一接合层21含有锡。第一接合层21例如是无铅焊料。第一接合层21的熔点设为290℃以上且300℃以下。第一接合层21也可以是含铅焊料。
如图3及图7所示，第一引线11位于与芯片焊盘10分离的位置。第一引线11沿第一方向x延伸。第一引线11与半导体元件20的第二电极202导通。因此，第一引线11相当于半导体装置A10的源极端子。第一引线11具有包覆部111、露出部112以及第一接合面113。包覆部111被封固树脂40覆盖。露出部112与包覆部111相连且从封固树脂40露出。露出部112在第一方向x上向远离芯片焊盘10的一侧延伸。例如对露出部112的表面实施了镀锡。第一接合面113在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。第一接合面113包含在包覆部111的一部分中。在厚度方向z上，第一接合面113相对于主面101位于靠近半导体元件20的位置。
如图3所示，第二引线12位于与芯片焊盘10及第一引线11双方分离的位置。第二引线12沿第一方向x延伸。在半导体装置A10中，第二引线12在第二方向y上相对于第三引线13位于与第一引线11相反的一侧。第二引线12与半导体元件20的第三电极203导通。因此，第二引线12相当于半导体装置A10的栅极端子。第二引线12具有包覆部121、露出部122以及第二接合面123。包覆部121被封固树脂40覆盖。露出部122与包覆部121相连且从封固树脂40露出。露出部122在第一方向x上向远离芯片焊盘10的一侧延伸。例如对露出部122的表面实施了镀锡。第二接合面123在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。第二接合面123包含在包覆部121的一部分中。在厚度方向z上，第二接合面123相对于主面101位于靠近半导体元件20的位置。如图9所示，在厚度方向z上，第二接合面123的位置与第一引线11的第一接合面113的位置相同。
如图3及图8所示，第三引线13包含沿第一方向x延伸的部分，并且与芯片焊盘10相连。第三引线13的材料与芯片焊盘10的材料相同。第三引线13具有包覆部131以及露出部132。包覆部131与芯片焊盘10相连且被封固树脂40覆盖。在沿第二方向y观察时，包覆部131弯折。露出部132与包覆部131相连且从封固树脂40露出。露出部132在第一方向x上向远离芯片焊盘10的一侧延伸。例如对露出部132的表面实施了镀锡。
如图5所示，在半导体装置A10中，第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132各自的高度h均相同。因此，在沿第二方向y观察时，第三引线13的至少一部分(露出部132)与第一引线11以及第二引线12分别重叠(参照图6)。
如图3及图7所示，第一导电部件31与半导体元件20的第二电极202以及第一引线11的第一接合面113电接合。由此，第一引线11与第二电极202导通。第一导电部件31含有铜。在半导体装置A10中，第一导电部件31是金属夹。如图11及图12所示，第一导电部件31具有第一接合部311以及第二接合部312。第一接合部311是位于第一导电部件31的一端且使第一导电部件31与第二电极202电接合的部分。第二接合部312是位于第一导电部件31的另一端且使第一导电部件31与第一接合面113电接合的部分。
如图11所示，第二接合层22包含介于半导体元件20的第二电极202与第一导电部件31的第一接合部311之间的部分。第二接合层22具有导电性。第二接合层22将第一接合部311与第二电极202电接合。由此，在半导体装置A10中，构成为第一导电部件31与第二电极202电接合，而且第一导电部件31与第二电极202导通。第二接合层22含有锡。第二接合层22例如是无铅焊料。第二接合层22的熔点设为260℃以上且270℃以下。因此，第一接合层21的熔点比第二接合层22的熔点高。另外，第一接合层21的厚度t1比第二接合层22的厚度t2大。第二接合层22也可以是含铅焊料。
如图12所示，第三接合层23包含介于第一引线11的第一接合面113与第一导电部件31的第二接合部312之间的部分。第三接合层23具有导电性。第三接合层23将第二接合部312与第一接合面113电接合。由此，在半导体装置A10中，构成为第一导电部件31与第一接合面113电接合，而且第一导电部件31与第一引线11导通。第三接合层23由与第二接合层22相同的材料构成。
如图3及图10所示，金属丝33与半导体元件20的第三电极203以及第二引线12的第二接合面123电接合。由此，第二引线12与第三电极203导通。金属丝33含有金(Au)。除此之外，金属丝33也可以是含有铜的结构、含有铝(Al)的结构。
如图3以及图7～图9所示，封固树脂40覆盖半导体元件20、第一导电部件31以及金属丝33。并且，封固树脂40覆盖芯片焊盘10、第一引线11、第二引线12以及第三引线13各自的一部分。封固树脂40具有电绝缘性。封固树脂40例如由包含黑色的环氧树脂的材料构成。封固树脂40具有顶面41、底面42、一对第一侧面43、一对第二侧面44、一对开口45、以及安装孔46。
如图7～图9所示，顶面41在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。如图7～图9所示，底面42在厚度方向z上朝向与顶面41相反的一侧。如图4所示，芯片焊盘10的背面102从底面42露出。
如图2、图4以及图6所示，一对第一侧面43在第一方向x上相互分离地配置。一对第一侧面43分别与顶面41以及底面42相连。如图5所示，第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132从一对第一侧面43中的一方的第一侧面43露出。
如图2、图4以及图5所示，一对第二侧面44在第二方向y上相互分离地配置。一对第二侧面44分别与顶面41以及底面42相连。如图2及图6所示，一对开口45在第二方向y上相互分离地配置。一对开口45分别从顶面41和一对第二侧面44的任一方或双方朝向封固树脂40的内方凹下。芯片焊盘10的主面101的一部分从一对开口45分别露出。如图2、图4以及图8所示，安装孔46在厚度方向z上从顶面41起贯通封固树脂40直到底面42。在沿厚度方向z观察时，安装孔46被包在芯片焊盘10的贯通孔103内。规定贯通孔103的芯片焊盘10的周面被封固树脂40覆盖。由此，在沿厚度方向z观察时，安装孔46的最大尺寸比贯通孔103的尺寸小。
图13示出作为半导体装置A10的变形例的半导体装置A11。半导体装置A11的第一接合层21的结构与半导体装置A10不同。另外，半导体装置A11具备镀层19。
在半导体装置A11中，第一接合层21由包含烧结金属颗粒的材料构成。该烧结金属颗粒含有银(Ag)。因此，在半导体装置A11中，第一接合层21的熔点也比第二接合层22的熔点高。
如图19所示，镀层19覆盖芯片焊盘10的主面101。镀层19含有银。第一接合层21包含介于镀层19与半导体元件20的第一电极201之间的部分。
接下来，基于图14～图21对半导体装置A10的制造方法的一例进行说明。图17及图19的截面位置与图11的截面位置相同。图20的截面位置与图12的截面位置相同。
首先，如图14所示，在芯片焊盘10的主面101之上配置第一接合材料81。第一引线11、第二引线12以及第三引线13通过构成引线框架的系杆80而相互连结。系杆80沿第二方向y延伸。第一接合材料81具有导电性。第一接合材料81是丝状焊料。第一接合材料81的熔点为290℃以上且300℃以下。第一接合材料81临时附着于主面101。
接着，如图15所示，在第一接合材料81之上配置半导体元件20。此时，半导体元件20的第一电极201与第一接合材料81对置。第一电极201临时附着于第一接合材料81。
接着，如图16及图17所示，在通过回流使第一接合材料81熔融之后，通过冷却使之硬化，由此使半导体元件20的第一电极201与芯片焊盘10的主面101电接合。在本工序中，通过冷却而硬化了的第一接合材料81成为第一接合层21。
接着，如图19及图20所示，在半导体元件20的第二电极202之上配置第二接合材料82，并在第一引线11的第一接合面113之上配置第三接合材料83。第二接合材料82以及第三接合材料83分别具有导电性。第二接合材料82以及第三接合材料83分别是膏状焊料。在第二接合材料82以及第三接合材料83各自的配置中使用分配器等。第二接合材料82的熔点为260℃以上且270℃以下。因此，第一接合材料81的熔点比第二接合材料82的熔点高。第三接合材料83由与第二接合材料82相同的材料构成。之后，将第一导电部件31的第一接合部311配置于第二接合材料82之上。并且，将第一导电部件31的第二接合部312配置于第三接合材料83之上。然后，在通过回流使第二接合材料82以及第三接合材料83熔融之后，通过冷却使它们硬化，由此使第一接合部311与第二电极202电接合。并且，使第二接合部312与第一接合面113电接合。此时，回流的温度设定为比第一接合材料81的熔点低。在本工序中，通过冷却而硬化了的第二接合材料82成为第二接合层22。另外，通过冷却而硬化了的第三接合材料83成为第三接合层23。如图18所示，通过引线接合使金属丝33与半导体元件20的第三电极203以及第二引线12的第二接合面123电接合。
接着，如图21所示，形成覆盖半导体元件20、第一导电部件31以及金属丝33而且覆盖芯片焊盘10、第一引线11、第二引线12以及第三引线13各自的一部分的封固树脂84。封固树脂84通过传递模塑来形成。伴随封固树脂84的形成而形成树脂飞边841。树脂飞边841由第一引线11的露出部112、第二引线12的露出部122、第三引线13的露出部132、以及系杆80截止。之后，通过高压水等将树脂飞边841除去。然后，通过使系杆80成为导电路径的电镀，来实施对第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132各自的表面和芯片焊盘10的背面102进行覆盖的镀锡。最后，通过切断系杆80而得到半导体装置A10。
接下来，对半导体装置A10的作用效果进行说明。
半导体装置A10具备第一接合层21以及第二接合层22。第一接合层21具有导电性，并且将半导体元件20的第一电极201与芯片焊盘10的主面101电接合。第二接合层22具有导电性，并且将第一导电部件31与半导体元件20的第二电极202电接合。第一接合层21的熔点比第二接合层22的熔点高。因此，在图19所示的半导体装置A10的制造工序中，在使成为第二接合层22的第二接合材料82熔融时，第一接合层21不熔融。由此，防止半导体元件20相对于芯片焊盘10的位置偏移，因此当在图19所示的制造工序中通过第二接合层22使第一导电部件31与第二电极202电接合时，能够确保第一导电部件31相对于第二电极202的接合面积更大。因此，根据半导体装置A10，能够与更大电流对应，而且能够抑制导电部件(第一导电部件31)相对于半导体元件20的电极(第二电极202)的接合面积的缩小。
半导体装置A10还具备第三接合层23。第三接合层23具有导电性，并且将第一导电部件31与第一引线11的第一接合面113电接合。第三接合层23由与第二接合层22相同的材料构成。由此，在图19及图20所示的半导体装置A10的制造工序中，在使成为第二接合层22的第二接合材料82熔融时，成为第三接合层23的第三接合材料83同时熔融。因此，在半导体装置A10的制造中，在使第一导电部件31与半导体元件20的第二电极202电接合时，能够同时使第一导电部件31与第一接合面113电接合，从而实现半导体装置A10的制造效率的提高。
第一导电部件31含有铜。由此，与含有铝的金属丝相比，能够降低第一导电部件31的电阻。这适于向半导体元件20流动更大电流。
第一接合层21的厚度t1比第二接合层22的厚度t2大。由此，在半导体装置A10的使用时，能够使从半导体元件20发出的热更迅速地向芯片焊盘10传导。在半导体装置A10的制造工序中，将第一接合材料81设为丝状焊料，由此能够形成确保厚度均匀的第一接合层21。
在厚度方向z上，第一引线11的第一接合面113相对于芯片焊盘10的主面101位于靠近半导体元件20的位置。由此，缩短第一导电部件31的长度，从而能够实现第一导电部件31的电感的降低。
芯片焊盘10含有铜。另外，芯片焊盘10的厚度T比第一引线11的最大厚度tmax大。由此，能够实现芯片焊盘10的导热率的提高，而且能够提高与厚度方向z正交的方向上的导热的效率。这有助于芯片焊盘10的散热性的提高。
基于图22～图25对本公开的第二实施方式的半导体装置A20进行说明。在上述附图中，对与上述的半导体装置A10相同或类似的要素标注同一符号，并省略重复的说明。图22中，为便于理解，透过封固树脂40并由假想线示出。
在半导体装置A20中，具备第二导电部件32、第四接合层24以及第五接合层25来代替金属丝33，这与半导体装置A10不同。
如图22及图23所示，第二导电部件32与半导体元件20的第三电极203以及第二引线12的第二接合面123电接合。由此，第二引线12与第三电极203导通。第二导电部件32含有铜。在半导体装置A20中，第二导电部件32是金属夹。如图24及图25所示，第二导电部件32具有第三接合部321以及第四接合部322。第三接合部321是位于第二导电部件32的一端而且使第二导电部件32与第三电极203电接合的部分。第四接合部322是位于第二导电部件32的另一端而且使第二导电部件32与第二接合面123电接合的部分。
如图24所示，第四接合层24包含介于半导体元件20的第三电极203与第二导电部件32的第三接合部321之间的部分。第四接合层24具有导电性。第四接合层24将第三接合部321与第三电极203电接合。由此，在半导体装置A20中，构成为第二导电部件32与第三电极203电接合，而且第二导电部件32与第三电极203导通。第四接合层24由与第二接合层22相同的材料构成。
如图25所示，第五接合层25包含介于第二引线12的第二接合面123与第二导电部件32的第四接合部322之间的部分。第五接合层25具有导电性。第五接合层25将第四接合部322与第二接合面123电接合。由此，在半导体装置A20中，构成为第二导电部件32与第二接合面123电接合，而且第二导电部件32与第二引线12导通。第五接合层25由与第二接合层22相同的材料构成。
接下来，对半导体装置A20的作用效果进行说明。
半导体装置A20具备第一接合层21以及第二接合层22。第一接合层21具有导电性，并且将半导体元件20的第一电极201与芯片焊盘10的主面101电接合。第二接合层22具有导电性，并且将第一导电部件31与半导体元件20的第二电极202电接合。第一接合层21的熔点比第二接合层22的熔点高。因此，根据半导体装置A20，也能够与更大电流对应，而且能够抑制导电部件相对于半导体元件20的电极的接合面积的缩小。
半导体装置A20具备与半导体元件20的第三电极203以及第二引线12的第二接合面123接合的第二导电部件32。另外，半导体装置A20具备第四接合层24以及第五接合层25。第四接合层24具有导电性，并且将第二导电部件32与第三电极203电接合。第五接合层25具有导电性，并且将第二导电部件32与第二接合面123电接合。第四接合层24以及第五接合层25分别由与第二接合层22相同的材料构成。由此，在半导体装置A20的制造中，能够与第一导电部件31的接合同时进行第二导电部件32的接合。另外，在第二导电部件32的接合时，防止半导体元件20相对于芯片焊盘10的位置偏移，从而确保了第二导电部件32相对于第三电极203的接合面积。
第二导电部件32含有铜。另外，在厚度方向z上，第二引线12的第二接合面123相对于芯片焊盘10的主面101位于靠近半导体元件20的位置。由此，第二导电部件32的电阻比较低，而且缩短第二导电部件32的长度，从而能够实现半导体元件20的第三电极203的接通电阻的降低。
本公开不限定于上述的实施方式、变形例。本公开的各部分的具体结构能够自如地进行各种设计变更。
本公开的半导体装置以及制造方法包含在以下的附记中记载的结构。
附记1.
一种半导体装置，具备：
芯片焊盘，其具有朝向厚度方向的主面；
半导体元件，其具有与上述主面对置地设置的第一电极和在上述厚度方向上设于与上述第一电极相反的一侧的第二电极，并且上述第一电极与上述主面电接合；
第一接合层，其将上述第一电极与上述主面电接合；
第一导电部件，其与上述第二电极电接合；以及
第二接合层，其将上述第一导电部件与上述第二电极电接合，
上述第一接合层的熔点比上述第二接合层的熔点高。
附记2.
根据附记1所述的半导体装置，
上述芯片焊盘以及上述第一导电部件分别含有铜。
附记3.
根据附记2所述的半导体装置，
上述第二接合层含有锡。
附记4.
根据附记3所述的半导体装置，
上述第一接合层含有锡。
附记5.
根据附记3或4所述的半导体装置，
上述第一接合层的厚度比上述第二接合层的厚度大。
附记6.
根据附记3所述的半导体装置，
上述第一接合层由包含烧结金属颗粒的材料构成。
附记7.
根据附记6所述的半导体装置，
上述烧结金属颗粒含有银。
附记8.
根据附记7所述的半导体装置，
还具备覆盖上述主面的镀层，
上述镀层含有银，
上述第一接合层介于上述镀层与上述第一电极之间。
附记9.
根据附记2至8中任一项所述的半导体装置，
在沿上述厚度方向观察时，上述半导体元件的面积为上述主面的面积的40％以下。
附记10.
根据附记9所述的半导体装置，
上述半导体元件包含化合物半导体基板。
附记11.
根据附记2至10中任一项所述的半导体装置，还具备：
第一引线，其具有在上述厚度方向上朝向与上述主面相同的一侧的第一接合面，并且位于与上述芯片焊盘分离的位置；以及
第三接合层，其将上述第一导电部件与上述第一接合面电接合，
上述第一引线含有铜，
上述第三接合层由与上述第二接合层相同的材料构成。
附记12.
根据附记11所述的半导体装置，
在上述厚度方向上，上述第一接合面相对于上述主面位于靠近上述半导体元件的位置。
附记13.
根据附记11或12所述的半导体装置，
上述芯片焊盘的厚度比上述第一引线的最大厚度大。
附记14.
根据附记11至13中任一项所述的半导体装置，
还具备第二引线、第二导电部件、第四接合层以及第五接合层，
上述半导体元件具有第三电极，该第三电极在上述厚度方向上设于与上述第一电极相反的一侧，而且位于与上述第二电极分离的位置，
上述第二引线具有在上述厚度方向上朝向与上述主面相同的一侧的第二接合面，并且位于与上述芯片焊盘以及上述第一引线双方分离的位置，
上述第二导电部件与上述第三电极以及上述第二接合面电接合，
上述第四接合层将上述第二导电部件与上述第三电极电接合，
上述第五接合层将上述第二导电部件与上述第二接合面电接合，
上述第二导电部件以及上述第二引线含有铜，
上述第四接合层以及上述第五接合层分别由与上述第二接合层相同的材料构成。
附记15.
根据附记14所述的半导体装置，
在上述厚度方向上，上述第二接合面相对于上述主面位于靠近上述半导体元件的位置。
附记16.
根据附记14或15所述的半导体装置，
还具备第三引线，该第三引线包含沿与上述厚度方向正交的第一方向延伸的部分，并且与上述芯片焊盘相连，
上述第一引线以及上述第二引线分别沿上述第一方向延伸，
上述第三引线的材料与上述芯片焊盘的材料相同，
在沿与上述厚度方向以及上述第一方向正交的第二方向观察时，上述第三引线的至少一部分与上述第一引线以及上述第二引线分别重叠。
附记17.
根据附记1至16中任一项所述的半导体装置，
还具备封固树脂，该封固树脂覆盖上述芯片焊盘的一部分、上述半导体元件以及上述第一导电部件。
附记18.
根据附记17所述的半导体装置，
上述芯片焊盘具有在上述厚度方向上朝向与上述主面相反的一侧的背面，
上述背面从上述封固树脂露出。
附记19.
一种半导体装置的制造方法，具备以下各工序：
在芯片焊盘的主面之上配置具有导电性的第一接合材料的工序；
将具有相互位于相反侧的第一电极以及第二电极的半导体元件以上述第一电极与上述第一接合材料对置的方式配置于上述第一接合材料之上的工序；
通过使上述第一接合材料熔融以及硬化来使上述第一电极与上述主面电接合的工序；
将具有导电性的第二接合材料配置于上述第二电极之上的工序；以及
将导电部件配置于上述第二接合材料之上，而且通过使上述第二接合材料熔融以及硬化来使上述导电部件与上述第二电极电接的工序，
构成为上述第一接合材料的熔点比上述第二接合材料的熔点高。
附记20.
根据附记19所述的半导体装置的制造方法，
上述第一接合材料是丝状焊料。
符号的说明
A10、A11、A20—半导体装置，10—芯片焊盘，101—主面，102—背面，103—贯通孔，11—第一引线，111—包覆部，112—露出部，113—第一接合面，12—第二引线，121—包覆部，122—露出部，123—第二接合面，13—第三引线，131—包覆部，132—露出部，19—镀层，20—半导体元件，201—第一电极，202—第二电极，203—第三电极，21—第一接合层，22—第二接合层，23—第三接合层，24—第四接合层，25—第五接合层，31—第一导电部件，311—第一接合部，312—第二接合部，32—第二导电部件，321—第三接合部，322—第四接合部，33—金属丝，40—封固树脂，41—顶面，42—底面，43—第一侧面，44—第二侧面，45—开口，46—安装孔，80—系杆，81—第一接合材料，82—第二接合材料，83—第三接合材料，z—厚度方向，x—第一方向，y—第二方向。

Claims (15)

1.一种半导体装置，其特征在于，具备：
芯片焊盘，其具有朝向厚度方向的主面；
半导体元件，其具有与上述主面对置地设置的第一电极和在上述厚度方向上设于与上述第一电极相反的一侧的第二电极，并且上述第一电极与上述主面电接合；
第一接合层，其将上述第一电极与上述主面电接合；
第一导电部件，其与上述第二电极电接合；以及
第二接合层，其将上述第一导电部件与上述第二电极电接合，
上述第一接合层的熔点比上述第二接合层的熔点高。
2.根据权利要求1所述的半导体装置，其特征在于，
上述芯片焊盘以及上述第一导电部件分别含有铜。
3.根据权利要求2所述的半导体装置，其特征在于，
上述第二接合层含有锡。
4.根据权利要求3所述的半导体装置，其特征在于，
上述第一接合层含有锡。
5.根据权利要求3或4所述的半导体装置，其特征在于，
上述第一接合层的厚度比上述第二接合层的厚度大。
6.根据权利要求2至5中任一项所述的半导体装置，其特征在于，
在沿上述厚度方向观察时，上述半导体元件的面积为上述主面的面积的40％以下。
7.根据权利要求2至6中任一项所述的半导体装置，其特征在于，还具备：
第一引线，其具有在上述厚度方向上朝向与上述主面相同的一侧的第一接合面，并且位于与上述芯片焊盘分离的位置；以及
第三接合层，其将上述第一导电部件与上述第一接合面电接合，
上述第一引线含有铜，
上述第三接合层由与上述第二接合层相同的材料构成。
8.根据权利要求7所述的半导体装置，其特征在于，
在上述厚度方向上，上述第一接合面相对于上述主面位于靠近上述半导体元件的位置。
9.根据权利要求7或8所述的半导体装置，其特征在于，
上述芯片焊盘的厚度比上述第一引线的最大厚度大。
10.根据权利要求7至9中任一项所述的半导体装置，其特征在于，
还具备第二引线、第二导电部件、第四接合层以及第五接合层，
上述半导体元件具有第三电极，该第三电极在上述厚度方向上设于与上述第一电极相反的一侧，而且位于与上述第二电极分离的位置，
上述第二引线具有在上述厚度方向上朝向与上述主面相同的一侧的第二接合面，并且位于与上述芯片焊盘以及上述第一引线分离的位置，
上述第二导电部件与上述第三电极以及上述第二接合面电接合，
上述第四接合层将上述第二导电部件与上述第三电极电接合，
上述第五接合层将上述第二导电部件与上述第二接合面电接合，
上述第二导电部件以及上述第二引线含有铜，
上述第四接合层以及上述第五接合层分别由与上述第二接合层相同的材料构成。
11.根据权利要求10所述的半导体装置，其特征在于，
在上述厚度方向上，上述第二接合面相对于上述主面位于靠近上述半导体元件的位置。
12.根据权利要求1至11中任一项所述的半导体装置，其特征在于，
还具备封固树脂，该封固树脂覆盖上述芯片焊盘的一部分、上述半导体元件以及上述第一导电部件。
13.根据权利要求12所述的半导体装置，其特征在于，
上述芯片焊盘具有在上述厚度方向上朝向与上述主面相反的一侧的背面，
上述背面从上述封固树脂露出。
14.一种半导体装置的制造方法，其特征在于，具备以下各工序：
在芯片焊盘的主面之上配置具有导电性的第一接合材料的工序；
将具有相互位于相反侧的第一电极以及第二电极的半导体元件以上述第一电极与上述第一接合材料对置的方式配置于上述第一接合材料之上的工序；
通过使上述第一接合材料熔融以及硬化来使上述第一电极与上述主面电接合的工序；
将具有导电性的第二接合材料配置于上述第二电极之上的工序；以及
将导电部件配置于上述第二接合材料之上，而且通过使上述第二接合材料熔融以及硬化来使上述导电部件与上述第二电极电接的工序，
构成为上述第一接合材料的熔点比上述第二接合材料的熔点高。
15.根据权利要求14所述的半导体装置的制造方法，其特征在于，
上述第一接合材料是丝状焊料。
CN202180047781.8A 2020-07-13 2021-06-25 半导体装置以及半导体装置的制造方法 Pending CN115769351A (zh)

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