CN114783873B - 具有两层外延的碳化硅凹槽mos栅控晶闸管的制造方法 - Google Patents

具有两层外延的碳化硅凹槽mos栅控晶闸管的制造方法 Download PDF

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CN114783873B
CN114783873B CN202210710837.XA CN202210710837A CN114783873B CN 114783873 B CN114783873 B CN 114783873B CN 202210710837 A CN202210710837 A CN 202210710837A CN 114783873 B CN114783873 B CN 114783873B
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李昀佶
杨光锐
周海
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Abstract

本发明提供了一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,包括在碳化硅两层外延晶圆正面淀积形成掩膜,使用相应光刻版对掩膜进行刻蚀开孔;通过掩膜阻挡对N‑型基区进行凹槽刻蚀,刻穿N‑型基区露出P‑型漂移区,去除掩膜层;通过重新淀积掩膜,使用相应光刻版对掩膜进行刻蚀开孔,形成P+发射区、N+区、栅氧化层以及多晶硅栅电极;在晶圆表面生长金属电极,使用相应光刻版对金属电极进行刻蚀开孔,保留P+发射区以及两个N+区上方金属电极作为器件的阳极金属电极;在晶圆背面生长金属电极作为器件的阴极金属电极;用外延层刻蚀形成器件结构来替代扩散MCT中的掺杂结构,便于制造。

Description

具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法
技术领域
本发明涉及一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法。
背景技术
MOS栅控晶闸管(MCT)作为复合化及功率集成方向的电力电子器件近年来受到大量的关注。它结构上结合了四层PNPN晶闸管和能够控制器件开通与关断的MOSFET。将MOSFET的高输入阻抗、低驱动功率及快速开关过程与晶闸管的大电流、高耐压及低的导通压降等诸多优点相结合。MCT导通即进入擎住状态,电导调制效应明显,在高压应用中能够有效的降低通态电阻,从而降低通态压降、可以快速的开通关断伴随低的开关损耗且驱动电路简单。
4H SIC作为宽禁带半导体具有高临界击穿电场,高饱和漂移速度及高热导率等优点,能够采用比硅器件更薄的漂移区来承受高压,同时可以通过适当调整漂移区浓度来进一步降低通态压降。适合工作在高压高频及高温的环境下,应用于高压集成功率领域中,碳化硅MCT应运而生。
按制备工艺来讲,常见的MCT器件主要分为两大类,一类是扩散杂质MCT,另一类是外延MCT。对于碳化硅材料,扩散掺杂需要极高的温度,所以碳化硅器件掺杂一般采用高温离子注入方式,而高温离子注入会破坏材料原本的晶格结构,需要1600℃以上的退火温度来修复激活,而且使注入结深达到2um及以上需要很高的注入能量,这对于设备与工艺是一个巨大的挑战。
发明内容
本发明要解决的技术问题,在于提供一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,用外延层刻蚀形成器件结构来替代扩散MCT中的掺杂结构。
本发明是这样实现的:一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,包括如下步骤:
步骤1、采用碳化硅两层外延晶圆,所述碳化硅两层外延晶圆为从下至上以此层叠的设置的N+型衬底、P型缓冲区、P-型漂移区以及N-型基区,在晶圆正面淀积形成掩膜,使用相应光刻版对掩膜进行刻蚀开孔;通过掩膜阻挡对N-型基区进行凹槽刻蚀,刻穿N-型基区露出P-型漂移区,去除掩膜层;
步骤2、重新淀积掩膜,使用相应光刻版对掩膜进行刻蚀开孔,通过掩膜阻挡在N-型基区进行P阱注入,形成P+发射区,去除掩膜;
步骤3、重新淀积掩膜,使用相应光刻版进行刻蚀开孔,通过掩膜阻挡在P+发射区中进行N阱注入,形成N+区,去除掩膜;
步骤4、在晶圆表面生长栅氧,使用相应光刻版对栅氧进行刻蚀开孔,保留凹槽外侧栅氧及P-型漂移区、N-型基区、P+发射区以及N+区上的栅氧,形成栅氧化层;
步骤5、在晶圆表面生长多晶硅,使用相应光刻版对多晶硅进行刻蚀开孔,保留栅氧上方多晶硅,形成多晶硅栅电极;
步骤6、在晶圆表面生长金属电极,使用相应光刻版对金属电极进行刻蚀开孔,保留P+发射区以及两个N+区上方金属电极作为器件的阳极金属电极;
步骤7、在晶圆背面生长金属电极作为器件的阴极金属电极。
进一步地,所述N-型基区厚度为2-5微米。
进一步地,所述 P-漂移区的厚度为50-100微米。
本发明的优点在于:通过使用两层外延生长的晶圆刻蚀形成凹槽结构来代替高能离子注入形成MCT阱结构,避免了多次离子注入的复杂工艺及对离子注入机的本身的高性能要求,同时避免了高能离子注入造成的晶格损伤,提高了MOS的沟道迁移率。
附图说明
下面参照附图结合实施例对本发明作进一步的说明。
图1是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的流程图。
图2是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图一。
图3是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图二。
图4是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图三。
图5是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图四。
图6是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图五。
图7是本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法的示意图六。
图8是本发明一制造方法得到的晶闸管示意图。
具体实施方式
本发明所要解决的是,针对传统掺杂形成的MCT结构对设备及工艺上带来的苛刻要求,通过使用SIC多层外延作为晶圆材料,经过干法刻蚀凹槽实现SIC MCT结构;
如图1至8所示,本发明一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,包括如下步骤:
步骤1、采用碳化硅两层外延晶圆,所述碳化硅两层外延晶圆为从下至上以此层叠的设置的N+型衬底2、P型缓冲区3、P-型漂移区4以及N-型基区5,碳化硅两层外延为P-型漂移区4以及N-型基区5;在碳化硅两层外延晶圆正面淀积形成掩膜,使用相应光刻版对掩膜进行刻蚀开孔;通过掩膜阻挡对N-型基区5进行凹槽刻蚀,刻穿N-型基区5露出P-型漂移区4,去除掩膜层;
步骤2、重新淀积掩膜,使用相应光刻版对掩膜进行刻蚀开孔,通过掩膜阻挡在N-型基区5进行P阱注入,形成P+发射区6,去除掩膜;
步骤3、重新淀积掩膜,使用相应光刻版进行刻蚀开孔,通过掩膜阻挡在P+发射区6中进行N阱注入,形成N+区7,去除掩膜;
步骤4、在晶圆表面生长栅氧,使用相应光刻版对栅氧进行刻蚀开孔,保留凹槽外侧栅氧及P-型漂移区4、N-型基区5、P+发射区6以及N+区7上的栅氧,形成栅氧化层8;
步骤5、在晶圆表面生长多晶硅,使用相应光刻版对多晶硅进行刻蚀开孔,保留栅氧上方多晶硅,形成多晶硅栅电极9;
步骤6、在晶圆表面生长金属电极,使用相应光刻版对金属电极进行刻蚀开孔,保留P+发射区6以及两个N+区7上方金属电极作为器件的阳极金属电极10;
步骤7、在晶圆背面生长金属电极作为器件的阴极金属电极1。
如图8所示,本发明制造方法得到的MOS栅控晶闸管,其元胞结构包括阴极金属电极1,设置在阴极金属电极1上的N+型衬底2,设置在N+衬底2上的P型缓冲区3,设置在P型缓冲区3上的P-型漂移区4,与SI器件相比,SIC器件可以使用很薄的漂移区来实现很高的耐压,同时可以适当的增加漂移区浓度来进一步减小正向压降,设置在P-型漂移区4上的N-型基区5,设置在N-型基区5上的P+发射区6,设置在P+发射区6上的N+区7,覆盖P-型漂移区4、N-型基区5、P+发射区6、N+区7的栅氧化层8,设置在栅氧化层8外侧的多晶硅栅电极9,设置在P+发射区6、两个N+区7上侧的阳极金属电极10;SIC器件N-型基区5为外延生长形成,通过干法刻蚀形成沟槽结构,便于连接电极,再通过离子注入形成P+发射区6、N+区7,器件两侧多晶硅栅电极9与栅氧化层8、P发射极6、N-型基区5与P-漂移区4构成了导通MOSFET,通过在多晶硅栅电极9施加负压在N-型基区5侧向表面形成P型沟道,当阳极金属电极10施加正压时,P+区6的空穴通过P型沟道注入到P-漂移区4(NPN的基区)中形成正反馈使器件开启;通过在多晶硅栅电极9施加正压,使N-型基区5与P+发射区6短路破坏擎住效应使器件关断。
所述N-型基区5厚度为2-5微米,所P-漂移区4厚度为50-100微米。
虽然以上描述了本发明的具体实施方式,但是熟悉本技术领域的技术人员应当理解,我们所描述的具体的实施例只是说明性的,而不是用于对本发明的范围的限定,熟悉本领域的技术人员在依照本发明的精神所作的等效的修饰以及变化,都应当涵盖在本发明的权利要求所保护的范围内。

Claims (3)

1.一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,其特征在于,包括如下步骤:
步骤1、采用碳化硅两层外延晶圆,所述碳化硅两层外延晶圆为从下至上以此层叠的设置的N+型衬底、P型缓冲区、P-型漂移区以及N-型基区,在晶圆正面淀积形成掩膜,使用相应光刻版对掩膜进行刻蚀开孔;通过掩膜阻挡对N-型基区进行凹槽刻蚀,刻穿N-型基区露出P-型漂移区,去除掩膜层;
步骤2、重新淀积掩膜,使用相应光刻版对掩膜进行刻蚀开孔,通过掩膜阻挡在N-型基区进行P阱注入,形成P+发射区,去除掩膜;
步骤3、重新淀积掩膜,使用相应光刻版进行刻蚀开孔,通过掩膜阻挡在P+发射区中进行N阱注入,形成N+区,去除掩膜;
步骤4、在晶圆表面生长栅氧,使用相应光刻版对栅氧进行刻蚀开孔,保留凹槽外侧栅氧及P-型漂移区、N-型基区、P+发射区以及N+区上的栅氧,形成栅氧化层;
步骤5、在晶圆表面生长多晶硅,使用相应光刻版对多晶硅进行刻蚀开孔,保留栅氧上方多晶硅,形成多晶硅栅电极;
步骤6、在晶圆表面生长金属电极,使用相应光刻版对金属电极进行刻蚀开孔,保留P+发射区以及两个N+区上方金属电极作为器件的阳极金属电极;
步骤7、在晶圆背面生长金属电极作为器件的阴极金属电极;
上述制造方法得到的MOS栅控晶闸管的元胞结构包括:
阴极金属电极,
N+型衬底,所述N+型衬底设于所述阴极金属电极上;
P型缓冲区,所述P型缓冲区设于所述N+型 衬底上;
P-型漂移区,所述P-型漂移区设于所述P型缓冲区上;
N-型基区,所述N-型基区 设于所述P-型漂移区上,所述N-型基区上设有两个P+发射区;每个P+发射区上设有两个N+区;
栅氧化层,所述栅氧化层覆盖设定位置的P-型漂移区、N-型基区、P+发射区以及N+区;
多晶硅栅电极,所述多晶硅栅电极设于所述栅氧化层外侧;
以及,阳极金属电极,所述阳极金属电极设于所述P+发射区以及两个N+区上侧。
2.根据权利要求1所述的一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,其特征在于,所述N-型基区厚度为2-5微米。
3.根据权利要求1所述的一种具有两层外延的碳化硅凹槽MOS栅控晶闸管的制造方法,其特征在于,所述P-型 漂移区的厚度为50-100微米。
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JPH1027899A (ja) * 1996-07-11 1998-01-27 Fuji Electric Co Ltd 電圧駆動型炭化ケイ素サイリスタ
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CN110783400A (zh) * 2019-11-04 2020-02-11 西安电子科技大学 一种基于双mos栅控的p型碳化硅晶闸管及其制备方法
CN113892189A (zh) * 2019-07-11 2022-01-04 富士电机株式会社 碳化硅半导体装置及碳化硅半导体装置的制造方法

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US6002143A (en) * 1995-02-08 1999-12-14 Ngk Insulators, Ltd. Hybrid vertical type power semiconductor device
JPH1027899A (ja) * 1996-07-11 1998-01-27 Fuji Electric Co Ltd 電圧駆動型炭化ケイ素サイリスタ
CN107430993A (zh) * 2015-10-30 2017-12-01 富士电机株式会社 外延晶片的制造方法、外延晶片、半导体装置的制造方法以及半导体装置
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