CN114402424B - 配置装置及配置方法 - Google Patents

配置装置及配置方法

Info

Publication number
CN114402424B
CN114402424B CN202080015443.1A CN202080015443A CN114402424B CN 114402424 B CN114402424 B CN 114402424B CN 202080015443 A CN202080015443 A CN 202080015443A CN 114402424 B CN114402424 B CN 114402424B
Authority
CN
China
Prior art keywords
dies
substrate
map data
wafer
exposure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202080015443.1A
Other languages
English (en)
Chinese (zh)
Other versions
CN114402424A (zh
Inventor
瀬山耕平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinkawa Ltd
Original Assignee
Shinkawa Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Ltd filed Critical Shinkawa Ltd
Publication of CN114402424A publication Critical patent/CN114402424A/zh
Application granted granted Critical
Publication of CN114402424B publication Critical patent/CN114402424B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0606Position monitoring, e.g. misposition detection or presence detection
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Supplying Of Containers To The Packaging Station (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Die Bonding (AREA)
  • Forklifts And Lifting Vehicles (AREA)
  • Auxiliary Devices For And Details Of Packaging Control (AREA)
CN202080015443.1A 2020-08-20 2020-08-20 配置装置及配置方法 Active CN114402424B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/031466 WO2022038745A1 (ja) 2020-08-20 2020-08-20 配置装置及び配置方法

Publications (2)

Publication Number Publication Date
CN114402424A CN114402424A (zh) 2022-04-26
CN114402424B true CN114402424B (zh) 2025-09-12

Family

ID=80323567

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080015443.1A Active CN114402424B (zh) 2020-08-20 2020-08-20 配置装置及配置方法

Country Status (6)

Country Link
US (1) US12112962B2 (https=)
JP (1) JP7133254B2 (https=)
KR (1) KR102442373B1 (https=)
CN (1) CN114402424B (https=)
TW (1) TWI782664B (https=)
WO (1) WO2022038745A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN120972470B (zh) * 2025-10-22 2026-01-30 北京中科彼岸集成电路科技有限公司 多芯片高密度连接的光刻技术实现方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102263039A (zh) * 2010-05-24 2011-11-30 日月光半导体制造股份有限公司 晶粒总成的制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060019468A1 (en) 2004-07-21 2006-01-26 Beatty John J Method of manufacturing a plurality of electronic assemblies
JP4720469B2 (ja) 2005-12-08 2011-07-13 株式会社ニコン 貼り合わせ半導体装置製造用の露光方法
US7808613B2 (en) * 2006-08-03 2010-10-05 Asml Netherlands B.V. Individual wafer history storage for overlay corrections
KR100793271B1 (ko) * 2006-12-22 2008-01-10 세크론 주식회사 프로빙 검사장치용 맵 데이터 작성 방법, 및 이를 이용한반도체 칩 검사 방법
EP2539773B1 (en) * 2010-02-26 2014-04-16 Micronic Mydata AB Method and apparatus for performing pattern alignment
JP6149277B2 (ja) 2011-03-30 2017-06-21 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
JP2014060249A (ja) * 2012-09-18 2014-04-03 Hitachi High-Tech Instruments Co Ltd ダイボンダ、および、ダイの位置認識方法
KR101681437B1 (ko) * 2012-09-23 2016-11-30 도호쿠 다이가쿠 칩 지지 기판, 칩 지지 방법, 3차원 집적 회로, 어셈블리 장치 및 3차원 집적 회로의 제조 방법
TWI567859B (zh) * 2014-02-10 2017-01-21 新川股份有限公司 安裝裝置及其偏移量修正方法
JP6329665B2 (ja) * 2017-04-03 2018-05-23 ファスフォードテクノロジ株式会社 ダイボンダ及びボンディング方法
TWI744849B (zh) * 2019-04-15 2021-11-01 日商新川股份有限公司 接合裝置以及接合頭的移動量補正方法
JP7575937B2 (ja) * 2020-12-21 2024-10-30 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102263039A (zh) * 2010-05-24 2011-11-30 日月光半导体制造股份有限公司 晶粒总成的制造方法

Also Published As

Publication number Publication date
CN114402424A (zh) 2022-04-26
WO2022038745A1 (ja) 2022-02-24
US12112962B2 (en) 2024-10-08
KR20220023747A (ko) 2022-03-02
TW202209541A (zh) 2022-03-01
JP7133254B2 (ja) 2022-09-08
KR102442373B1 (ko) 2022-09-14
TWI782664B (zh) 2022-11-01
JPWO2022038745A1 (https=) 2022-02-24
US20220319885A1 (en) 2022-10-06

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