CN113892184B - 半导体装置和半导体装置的制造方法 - Google Patents

半导体装置和半导体装置的制造方法 Download PDF

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CN113892184B
CN113892184B CN202080038918.9A CN202080038918A CN113892184B CN 113892184 B CN113892184 B CN 113892184B CN 202080038918 A CN202080038918 A CN 202080038918A CN 113892184 B CN113892184 B CN 113892184B
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hydrogen
semiconductor substrate
oxygen
semiconductor device
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CN113892184A (zh
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吉田浩介
吉村尚
泷下博
内田美佐稀
根本道生
菅沼奈央
洼内源宜
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Fuji Electric Co Ltd
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    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
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    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
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    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
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    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
CN202080038918.9A 2019-12-18 2020-12-10 半导体装置和半导体装置的制造方法 Active CN113892184B (zh)

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JP2019228409 2019-12-18
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JP2020087349 2020-05-19
JP2020-087349 2020-05-19
JP2020-189026 2020-11-12
JP2020189026 2020-11-12
PCT/JP2020/046167 WO2021125064A1 (ja) 2019-12-18 2020-12-10 半導体装置および半導体装置の製造方法

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JP7361634B2 (ja) * 2020-03-02 2023-10-16 三菱電機株式会社 半導体装置及び半導体装置の製造方法
JP7848459B2 (ja) 2021-10-15 2026-04-21 富士電機株式会社 解析方法、プログラムおよび半導体装置の製造方法
JP7652341B2 (ja) * 2022-05-30 2025-03-27 富士電機株式会社 半導体装置の製造方法
JP7672366B2 (ja) * 2022-06-27 2025-05-07 三菱電機株式会社 半導体装置
JP2024014333A (ja) * 2022-07-22 2024-02-01 富士電機株式会社 半導体装置および半導体装置の製造方法
JP7831641B2 (ja) * 2022-12-13 2026-03-17 富士電機株式会社 半導体装置および半導体装置の製造方法
JP2024107868A (ja) * 2023-01-30 2024-08-09 株式会社デンソー 半導体装置
JPWO2025028573A1 (https=) * 2023-08-01 2025-02-06
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