CN113394309A - Solar cell and preparation method thereof - Google Patents

Solar cell and preparation method thereof Download PDF

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CN113394309A
CN113394309A CN202110131532.9A CN202110131532A CN113394309A CN 113394309 A CN113394309 A CN 113394309A CN 202110131532 A CN202110131532 A CN 202110131532A CN 113394309 A CN113394309 A CN 113394309A
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silicon
silicon layer
amorphous silicon
wafer substrate
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不公告发明人
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Xuancheng Ruihui Xuansheng Enterprise Management Center Partnership LP
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Xuancheng Ruihui Xuansheng Enterprise Management Center Partnership LP
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1224—The active layers comprising only Group IV materials comprising microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

本发明公开了一种太阳能电池及其制备方法，所述太阳能电池包括N型硅片基底；第一本征非晶硅层，所述第一本征非晶硅层设置于所述N型硅片基底的至少一侧；微晶硅层，所述微晶硅层设置于所述第一本征非晶硅层远离所述N型硅片基底的一侧；氮化硅层，所述氮化硅层设置于所述微晶硅层远离所述N型硅片基底的一侧；以及第一电极层，所述第一电极层设置于所述微晶硅层的外表面，并且所述第一电极层穿过所述氮化硅层与所述微晶硅层电接触。本发明采用微晶硅层代替原有的非晶硅层和透明导电层，并在微晶硅层上设置氮化硅层，既保证了表面透光性，减少了光的反射，又保证了表面的导电性，还能够降低寄生吸收，提高了太阳能电池的发电效率。

Figure 202110131532

The invention discloses a solar cell and a preparation method thereof. The solar cell comprises an N-type silicon wafer substrate; a first intrinsic amorphous silicon layer, and the first intrinsic amorphous silicon layer is disposed on the N-type silicon at least one side of a wafer substrate; a microcrystalline silicon layer, the microcrystalline silicon layer is disposed on the side of the first intrinsic amorphous silicon layer away from the N-type silicon wafer substrate; a silicon nitride layer, the nitrogen a silicon carbide layer is disposed on the side of the microcrystalline silicon layer away from the N-type silicon wafer substrate; and a first electrode layer, the first electrode layer is disposed on the outer surface of the microcrystalline silicon layer, and the A first electrode layer is in electrical contact with the microcrystalline silicon layer through the silicon nitride layer. The invention adopts the microcrystalline silicon layer to replace the original amorphous silicon layer and the transparent conductive layer, and sets the silicon nitride layer on the microcrystalline silicon layer, which not only ensures the light transmittance of the surface, reduces the reflection of light, but also ensures the The conductivity of the surface can also reduce parasitic absorption and improve the power generation efficiency of the solar cell.

Figure 202110131532

Description

Solar cell and preparation method thereof
Technical Field
The invention belongs to the technical field of new energy, particularly relates to the technical field of high-efficiency silicon heterojunction cells, and particularly relates to a solar cell and a preparation method thereof.
Background
The standard high-efficiency silicon heterojunction cell is manufactured by providing an N-type silicon wafer → forming an intrinsic amorphous silicon layer and an amorphous silicon N layer by PEVCD (Plasma Enhanced Chemical Vapor Deposition), forming an intrinsic amorphous silicon layer and an amorphous silicon P layer by PEVCD → forming an N-side transparent conductive layer (TCO) → forming a P-side transparent conductive layer (TCO) → screen printing silver paste electrode.
In the traditional high-efficiency silicon heterojunction cell, a parasitic absorption layer (parasitic absorption layer) is always a fatal damage of the heterojunction cell, and in the heterojunction cell, the parasitic absorption layer is usually a transparent conductive layer, an intrinsic amorphous silicon layer and an amorphous silicon N layer on the front surface, and the influence on the current in the heterojunction solar cell is up to 3-4mA/cm2The current density of the silicon heterojunction cell is 38mA/cm2In other words, if the current influence of the parasitic absorption layer can be reduced to 1-2mA/cm2The conversion efficiency of the heterojunction cell can reach 24-25%, and the heterojunction cell is very competitive, so that how to reduce the parasitic absorption can be a clear direction.
In the silicon heterojunction cell, Indium Tin Oxide (ITO) is used as a commonly used transparent conductive layer, and the current density influenced by the Indium Tin oxide is about 1mA/cm2In addition, the cost of the battery accounts for 5 percent of the whole battery, and the battery is a good direction for simultaneously reducing the cost and improving the efficiency of the battery.
Disclosure of Invention
In view of this, embodiments of the present invention provide a solar cell and a method for manufacturing the same, in which a microcrystalline silicon layer is used to replace an original amorphous silicon layer and a transparent conductive layer, and a silicon nitride layer is disposed on the microcrystalline silicon layer, so as to ensure surface light transmittance, reduce light reflection, ensure surface conductivity, reduce parasitic absorption, and improve power generation efficiency of the solar cell.
In a first aspect, an embodiment of the present invention provides a solar cell, including an N-type silicon wafer substrate, further including:
the first intrinsic amorphous silicon layer is arranged on at least one side of the N-type silicon wafer substrate;
the microcrystalline silicon layer is arranged on one side, away from the N-type silicon wafer substrate, of the first intrinsic amorphous silicon layer;
the silicon nitride layer is arranged on one side, away from the N-type silicon wafer substrate, of the microcrystalline silicon layer; and
a first electrode layer disposed on an outer surface of the microcrystalline silicon layer and in electrical contact with the microcrystalline silicon layer through the silicon nitride layer.
According to a specific implementation manner of the embodiment of the invention, the first electrode layer is ring-shaped, and the first electrode layer is embedded in the silicon nitride layer.
According to a specific implementation manner of the embodiment of the invention, the thickness of the silicon nitride layer is smaller than that of the first electrode layer.
According to a specific implementation manner of the embodiment of the present invention, when the first intrinsic amorphous silicon layer is disposed on one side of the N-type silicon wafer substrate, the solar cell further includes:
the second intrinsic amorphous silicon layer is arranged on one side of the N-type silicon wafer substrate, which is opposite to the first intrinsic amorphous silicon layer;
the amorphous silicon layer is arranged on one side, away from the N-type silicon wafer substrate, of the second intrinsic amorphous silicon layer;
the transparent conducting layer is arranged on one side, away from the N-type silicon wafer substrate, of the amorphous silicon layer; and
and the second electrode layer is arranged on the outer surface of the transparent conducting layer.
According to a specific implementation manner of the embodiment of the invention, the first electrode layer and the second electrode layer are both silver electrode rings.
In a second aspect, an embodiment of the present invention provides a method for manufacturing a solar cell, where the method includes:
providing an N-type silicon wafer substrate;
forming a first intrinsic amorphous silicon layer on at least one side of the N-type silicon wafer substrate;
forming a microcrystalline silicon layer on one side of the first intrinsic amorphous silicon layer, which is far away from the N-type silicon wafer substrate;
forming a silicon nitride layer on one side of the microcrystalline silicon layer far away from the N-type silicon wafer substrate; and
a first electrode layer is formed on an outer surface of the microcrystalline silicon layer, and the first electrode layer is in electrical contact with the microcrystalline silicon layer through the silicon nitride layer.
According to a specific implementation manner of the embodiment of the invention, the step of forming the microcrystalline silicon layer is as follows: the microcrystalline silicon layer is formed by a plasma chemical vapor deposition method, wherein the process gas comprises H2, SiH4 and PH3, and the deposition temperature is 150-500 ℃.
According to a specific implementation manner of the embodiment of the present invention, the method further includes: the microcrystalline silicon layer is doped with phosphorus at a doping concentration in a range from 1 x 1018cm-3 to 1 x 1025 cm-3.
According to a specific implementation manner of the embodiment of the invention, after the step of forming the microcrystalline silicon layer, the method further includes: and performing heat treatment on the component obtained after the microcrystalline silicon layer is formed, wherein the heat treatment temperature is 100-300 ℃ and the time is 20-180 s.
According to a specific implementation manner of the embodiment of the invention, when the first intrinsic amorphous silicon layer is formed on one side of the N-type silicon wafer substrate, the method further comprises: and sequentially forming a second intrinsic amorphous silicon layer, an amorphous silicon layer, a transparent conducting layer and a second electrode layer on the other side of the N-type silicon wafer substrate, wherein:
forming the first intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer, the amorphous silicon layer by plasma chemical vapor deposition; and the number of the first and second groups,
the first electrode layer and the second electrode layer are formed by screen printing.
By adopting the technical scheme, the amorphous silicon provided by the invention can bring the following beneficial effects:
the microcrystalline silicon layer is a good doping layer, doping atoms (such as phosphorus atoms (P)) can be effectively protected in the microcrystalline silicon layer, the doping atoms can be effectively prevented from overflowing due to high-temperature tempering, a protection effect is formed, the doping components of the microcrystalline silicon layer can be kept after annealing, and the conductivity is improved; meanwhile, the microcrystalline silicon layer can be used as a buffer layer material, the problems that the amorphous silicon layer is excessively transformed in phase change during annealing, hydrogen ions are easily scattered and overflowed, and the defect states are increased are solved, the microcrystalline silicon layer is transformed in the crystal phase state for one time, and the influence on the defect states is small when the amorphous silicon layer is annealed and transformed again.
In addition, through depositing the silicon nitride layer, the defects on the surface of the microcrystalline silicon layer can be passivated, the recombination of current carriers can be reduced, the reflection of light can be reduced, and the utilization rate of photons can be improved, so that the electrical performance and the optical performance of the solar cell can be improved, and the cell efficiency can be improved.
Therefore, the solar cell of the invention adopts the microcrystalline silicon layer to replace the original amorphous silicon layer and the transparent conducting layer, the silicon nitride layer is arranged on the microcrystalline silicon layer, the microcrystalline silicon layer is used as a buffer layer material, the influence on the defect state of the microcrystalline silicon layer is small when annealing is carried out for phase transition again, and the stability of the microcrystalline silicon layer on doping atoms is good, so that the material is subjected to subsequent annealing to form a good conducting layer, thereby ensuring the surface light transmission, ensuring the surface conductivity, reducing the parasitic absorption and improving the power generation efficiency of the solar cell.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1(a) is a diagram of a layered structure of a solar cell according to an embodiment of the present invention;
FIG. 1(b) is a top view of a solar cell in accordance with an embodiment of the present invention;
FIG. 2 is a flow chart illustrating a process for fabricating a solar cell according to an embodiment of the present invention; and is
FIG. 3 is a flow chart of a solar cell fabrication process according to an embodiment of the present invention;
the attached drawings are as follows:
1-N type silicon chip substrate; 2-a first intrinsic amorphous silicon layer; a 3-microcrystalline silicon N layer; a 4-silicon nitride layer; 5-a first electrode layer; 6-a second intrinsic amorphous silicon layer; 7-an amorphous silicon layer; 8-a transparent conductive layer; 9-second electrode layer.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the disclosure, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. Additionally, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than the number, shape and size of the components in practical implementation, and the type, quantity and proportion of the components in practical implementation can be changed freely, and the layout of the components can be more complicated.
In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.
It should be noted that in the embodiments of the present invention, the microcrystalline silicon layer may be a microcrystalline silicon N layer or a microcrystalline silicon P layer, and a method of manufacturing the same is described in the following embodiments. Further, the amorphous silicon layer may be an amorphous silicon N layer obtained by doping P (phosphorus) or N (nitrogen) in amorphous silicon or an amorphous silicon P layer obtained by doping B (boron) or Al (aluminum) in amorphous silicon.
Example 1
The technical idea of embodiment 1 of the present invention is as follows: in the prior art, because the amorphous silicon N layer is a relatively non-conductive material, the resistivity of the amorphous silicon N layer is 100 times that of ITO, ITO is required to be used to collect carriers, if the ITO layer is not used, the amorphous silicon N layer is required to be used as a carrier moving layer, but the conductivity of the amorphous silicon N layer is insufficient. The microcrystalline silicon N layer is directly adopted to replace the original front amorphous silicon N layer and the transparent conducting layer, and the microcrystalline silicon N layer is subjected to crystal phase state conversion once, so that the conductivity can be ensured.
First, referring to fig. 1(a), a solar cell of embodiment 1 of the present invention is described, which includes a silicon nitride layer 4, a microcrystalline silicon N layer 3, a first intrinsic amorphous silicon layer 2, an N-type silicon wafer substrate 1, a second intrinsic amorphous silicon layer 6, an amorphous silicon layer 7, and a transparent conductive layer 8, which are sequentially stacked, as shown.
In addition, the outer surface of the microcrystalline silicon N layer 3 is provided with a first electrode layer 5, the first electrode layer 5 is electrically contacted with the microcrystalline silicon N layer 3 through the silicon nitride layer 4, and the outer surface of the transparent conductive layer 8 is provided with a second electrode layer 9.
More specifically, referring to fig. 1(a), the solar cell in the embodiment of the present invention includes an N-type silicon wafer substrate 1, a first intrinsic amorphous silicon layer 2, the first intrinsic amorphous silicon layer 2 being disposed on one side of the N-type silicon wafer substrate; the microcrystalline silicon N layer 3 is arranged on one side, away from the N-type silicon wafer substrate 1, of the first intrinsic amorphous silicon layer 2; and the silicon nitride layer 4 is arranged on one side of the microcrystalline silicon N layer 3, which is far away from the N-type silicon wafer substrate 1.
In the embodiment of the invention, the microcrystalline silicon N layer is adopted to replace the original front N layer and the transparent conducting layer, the microcrystalline silicon N layer is used as a buffer layer material, and the silicon nitride layer is arranged on the microcrystalline silicon N layer, so that the defects on the surface of the microcrystalline silicon can be passivated, the recombination of current carriers can be reduced, the reflection of light can be reduced, the utilization rate of photons can be improved, the electrical performance and the optical performance of the cell can be improved, and the efficiency of the cell can be improved.
In addition, the solar cell of the embodiment of the invention further comprises a second intrinsic amorphous silicon layer 6, wherein the second intrinsic amorphous silicon layer 6 is arranged on one side of the N-type silicon wafer substrate 1 opposite to the first intrinsic amorphous silicon layer 2; the amorphous silicon layer 7 is arranged on one side, away from the N-type silicon wafer substrate 1, of the second intrinsic amorphous silicon layer 6; and the transparent conducting layer 8 is arranged on one side of the amorphous silicon layer 7, which is far away from the N-type silicon wafer substrate 1.
In the embodiment of the present invention, the outer surface of the microcrystalline silicon N layer 3 is provided with a first electrode layer 5, the first electrode layer 5 is in electrical contact with the microcrystalline silicon N layer 3 through the silicon nitride layer 4, and the outer surface of the transparent conductive layer 8 is provided with a second electrode layer 9.
It should be understood that the solar cell according to the embodiment of the present invention may not include all of the above layers, but may include only the first intrinsic amorphous silicon layer 2, the microcrystalline silicon N layer 3, the silicon nitride layer 4, and the first electrode layer 5 on one side of the N-type silicon wafer substrate 1.
In the embodiment of the present invention, the N-type silicon wafer substrate 1 may be obtained by doping single-crystal silicon with phosphorus, the first intrinsic amorphous silicon layer 2 and the second intrinsic amorphous silicon layer 6 may be a hydrogen-rich intrinsic amorphous silicon thin film and an intrinsic amorphous silicon thin film, respectively, for example, and the microcrystalline silicon N layer 3 may be vacuum-coated by PECVD process including H process gas2、SiH4And pH3The deposition temperature is 150-500 ℃, the amorphous silicon layer 7 can be a P-type amorphous silicon film, for example, and the transparent conductive layer 8 can be an ITO film, for example.
In the embodiment of the present invention, the first electrode layer 5 and the second electrode layer 9 may be provided in a ring shape, and the first electrode layer 5 is embedded in the silicon nitride layer 4. It should be understood that the first electrode layer 5 and the second electrode layer 9 may also be disposed in other shapes such as dots, rectangles, fences, etc., and are not limited herein.
Specifically, as shown in fig. 1(b), which shows a view of the solar cell viewed from the side of the first electrode layer 5, the first electrode layer 5 on the upper surface of the solar cell may be two or more parallel straight electrode lines, and is connected by the electrode lines perpendicular thereto, so as to form an annular electrode ring. That is, the electrodes on the first electrode layer 5 are electrically conducted to each other. Similarly, the second electrode layer 9 may be similarly provided.
In the embodiment of the present invention, the thickness of the silicon nitride layer 4 is set to be smaller than the thickness of the first electrode layer 5, so that the first electrode layer 5 is easy to leak from the silicon nitride layer 4, so that the subsequent welding process is easy. Further, as for the material of the first electrode layer 5 and the second electrode layer 9, they are both made of silver Ag, but it is to be understood that it may be made of other metals such as platinum, gold, and the like.
In the embodiment of the invention, the thickness range of the N-type silicon wafer substrate 1 is 100-170 μm, the thickness range of the first intrinsic amorphous silicon layer 2 is 1-20nm, the thickness range of the microcrystalline silicon N layer 3 is 4-100nm, the thickness range of the silicon nitride layer 4 is 50-150nm, the thickness range of the second intrinsic amorphous silicon layer 6 is 1-20nm, the thickness range of the amorphous silicon layer 7 is 1-20nm, and the thickness range of the transparent conducting layer 8 is 50-150 nm.
Preferably, the thickness of the N-type silicon wafer substrate 1 is 135 μm, the thickness of the first intrinsic amorphous silicon layer 2 is 10nm, the thickness of the microcrystalline silicon N layer 3 is 52nm, the thickness of the silicon nitride layer 4 is 100nm, the thickness of the second intrinsic amorphous silicon layer 6 is 10nm, the thickness of the amorphous silicon layer 7 is 10nm, and the thickness of the transparent conductive layer 8 is 100 nm.
That is, the solar cell in the embodiment of the present invention includes an N-type silicon wafer substrate 1, which further includes:
a first intrinsic amorphous silicon layer 2, wherein the first intrinsic amorphous silicon layer 2 is arranged on one side of the N-type silicon wafer substrate 1;
the microcrystalline silicon N layer 3 is arranged on one side, away from the N-type silicon wafer substrate 1, of the first intrinsic amorphous silicon layer 2;
the silicon nitride layer 4 is arranged on one side, away from the N-type silicon wafer substrate 1, of the microcrystalline silicon N layer 3; and
a first electrode layer 5, wherein the first electrode layer 5 is disposed on an outer surface of the microcrystalline silicon N layer 3, and the first electrode layer 5 is electrically contacted with the microcrystalline silicon N layer 3 through the silicon nitride layer 4.
The microcrystalline silicon N layer is adopted to replace the original front N layer and the transparent conducting layer, the microcrystalline silicon N layer is used as a buffer layer material, and the silicon nitride layer is arranged on the microcrystalline silicon N layer, so that the defects on the surface of the microcrystalline silicon can be passivated, the compounding of current carriers can be reduced, the reflection of light can be reduced, the utilization rate of photons can be improved, the electrical performance and the optical performance of the cell can be improved, and the cell efficiency can be improved.
According to a specific implementation manner of the embodiment of the present invention, the solar cell further includes:
a second intrinsic amorphous silicon layer 6, wherein the second intrinsic amorphous silicon layer 6 is arranged on one side of the N-type silicon wafer substrate 1 opposite to the first intrinsic amorphous silicon layer 2;
the amorphous silicon layer 7 is arranged on one side, away from the N-type silicon wafer substrate 1, of the second intrinsic amorphous silicon layer 6;
the transparent conducting layer 8 is arranged on one side, away from the N-type silicon wafer substrate 1, of the amorphous silicon layer 7; and
and the second electrode layer 9, wherein the second electrode layer 9 is arranged on the outer surface of the transparent conducting layer 8.
According to a specific implementation manner of the embodiment of the present invention, the first electrode layer 5 is ring-shaped, and the first electrode layer 5 is embedded in the silicon nitride layer 4.
According to a specific implementation manner of the embodiment of the present invention, the thickness of the silicon nitride layer 4 is smaller than that of the first electrode layer 5.
According to a specific implementation manner of the embodiment of the present invention, the first electrode layer 5 and the second electrode layer 9 are both silver Ag electrode rings.
According to the solar cell provided by the embodiment of the invention, the microcrystalline silicon N layer is adopted to replace the original front N layer and the transparent conducting layer, and the microcrystalline silicon N layer is used as a buffer layer material, so that the surface light transmission and the surface conductivity of the solar cell are ensured, the parasitic absorption can be reduced, and the power generation efficiency of the solar cell is improved.
In addition, the silicon nitride layer is arranged on the microcrystalline silicon N layer, so that the defects on the surface of the microcrystalline silicon can be passivated, the recombination of current carriers can be reduced, the reflection of light can be reduced, the utilization rate of photons can be improved, the electrical performance and the optical performance of the cell can be improved, and the cell efficiency can be improved.
In addition, referring to fig. 2, an embodiment of the present invention further provides a method for manufacturing a solar cell, in which a front light incident surface of the solar cell is provided with an intrinsic amorphous silicon layer 2, a microcrystalline silicon N layer 3, and a silicon nitride layer 4, which are sequentially stacked, and another surface of the solar cell is provided with an intrinsic amorphous silicon layer 6, an amorphous silicon layer 7, and a transparent conductive layer 8, which are sequentially stacked.
Specifically, the method for manufacturing a solar cell according to the embodiment of the present invention includes:
s201: providing an N-type silicon wafer substrate 1;
s202: forming a first intrinsic amorphous silicon layer 2, wherein the first intrinsic amorphous silicon layer 2 is arranged on one side of the N-type silicon wafer substrate 1;
s203: forming a microcrystalline silicon N layer 3, wherein the microcrystalline silicon N layer 3 is arranged on one side, away from the N-type silicon wafer substrate 1, of the first intrinsic amorphous silicon layer 2;
s204: forming a second intrinsic amorphous silicon layer 6, wherein the second intrinsic amorphous silicon layer 6 is arranged on one side of the N-type silicon wafer substrate 1 opposite to the first intrinsic amorphous silicon layer 2;
s205: forming an amorphous silicon layer 7, wherein the amorphous silicon layer 7 is arranged on one side of the second intrinsic amorphous silicon layer 6 far away from the N-type silicon wafer substrate 1;
s206: forming a transparent conducting layer 8, wherein the transparent conducting layer 8 is arranged on one side of the amorphous silicon layer 7 far away from the N-type silicon wafer substrate 1;
s207: forming a first electrode layer 5 and a second electrode layer 9, wherein the first electrode layer 5 is arranged on the outer surface of the microcrystalline silicon N layer 3, and the second electrode layer 9 is arranged on the outer surface of the transparent conducting layer; and
s208: and forming a silicon nitride layer 4, wherein the silicon nitride layer 4 is arranged on one side of the microcrystalline silicon N layer 3 far away from the N-type silicon wafer substrate 1, and the first electrode layer 5 penetrates through the silicon nitride layer 4 and is electrically contacted with the microcrystalline silicon N layer 3.
The material, thickness and other parameters of the above layers may be similar to those described above with reference to fig. 1, and are not described herein again.
In addition, the method of manufacturing a solar cell according to an embodiment of the present invention may include only S201 to S203 in the above steps, and form the silicon nitride layer 4 and the first electrode layer 5 on the formed microcrystalline silicon N layer 3.
In the embodiment of the present invention, the doping concentration of the microcrystalline silicon N layer 3 is in the range of 1 × 1018cm-3To 1X 1025cm-3The microcrystalline silicon N layer 3 is vacuum-coated by PECVD process, and the process gas comprises H2、SiH4And pH3The deposition temperature is 150-500 ℃.
In addition, when an N-side of the solar cell is prepared, PECVD vacuum plating may be performed on one side of the N-type silicon wafer substrate 1 to form the first intrinsic amorphous silicon layer 2, and PECVD vacuum plating may be performed on an outer surface of the first intrinsic amorphous silicon layer 2 to form the microcrystalline silicon N-layer 3.
For the first electrode layer 5, electrode screen printing can be performed on the outer surface of the microcrystalline silicon N layer 3 to form the first electrode layer, then a silicon nitride layer is deposited through processes such as PVCD (polyvinyl dichloride), and the silicon nitride layer can passivate defects on the surface of the microcrystalline silicon, reduce the recombination of current carriers, reduce the reflection of light, and improve the utilization rate of photons, so that the electrical performance and the optical performance of the battery are improved, and the efficiency of the battery is improved. .
When the other side of the solar cell is prepared, one side of the N-type silicon wafer substrate 1 may be subjected to PECVD vacuum plating to form the second intrinsic amorphous silicon layer 6, and the outer surface of the second intrinsic amorphous silicon layer 6 may be subjected to PECVD vacuum plating to form the amorphous silicon layer 7.
The second electrode layer 9 may be formed by screen printing an electrode on the outer surface of the transparent conductive layer 8.
In the embodiment of the invention, after the microcrystalline silicon N layer 3 is arranged, the method further comprises the step of carrying out heat treatment on the semi-finished product obtained after the microcrystalline silicon N layer 3 is arranged, wherein the temperature range of the heat treatment is 100-300 ℃, and the time is 20-180 s.
Preferably, the temperature of the heat treatment is about 200 ℃ and the time is about 100 s.
In addition, before the second intrinsic amorphous silicon layer 6 is formed, one side of the N-type silicon wafer substrate 1 on which the second intrinsic amorphous silicon layer 6 is to be formed needs to be cleaned. The cleaning may be, for example, a HF cleaning using hydrogen fluoride, and after cleaning one side of the N-type silicon wafer substrate 1, it is necessary to turn over the semifinished product obtained after the cleaning in order to facilitate the formation of the second intrinsic amorphous silicon layer 6.
That is, the method of manufacturing a solar cell according to an embodiment of the present invention includes:
providing an N-type silicon wafer substrate 1;
forming a first intrinsic amorphous silicon layer 2 on one side of the N-type silicon wafer substrate 1;
forming a microcrystalline silicon N layer 3 on one side of the first intrinsic amorphous silicon layer 2 far away from the N-type silicon wafer substrate 1;
forming a silicon nitride layer 4 on one side of the microcrystalline silicon N layer 3 far away from the N-type silicon wafer substrate 1; and
a first electrode layer 5 is formed on the outer surface of the microcrystalline silicon N layer 3, and the first electrode layer 5 is in electrical contact with the microcrystalline silicon N layer 3 through the silicon nitride layer 4.
According to a specific implementation manner of the embodiment of the present invention, the step of forming the microcrystalline silicon N layer 3 is: forming the microcrystalline silicon N-layer 3 by plasma chemical vapor deposition, wherein the process gas comprises H2、SiH4And pH3The deposition temperature is 150-500 ℃.
According to a specific implementation manner of the embodiment of the present invention, the method further includes: doping the microcrystalline silicon N layer 3 with phosphorus in a concentration range of 1 × 1018cm-3To 1X 1025cm-3。
According to a specific implementation manner of the embodiment of the present invention, after the step of forming the microcrystalline silicon N layer 3, the method further includes: the member obtained after the formation of the microcrystalline silicon N layer 3 is subjected to heat treatment at a temperature of 100-300 ℃ for 20-180 s.
According to a specific implementation manner of the embodiment of the present invention, the method further includes: a second intrinsic amorphous silicon layer 6, an amorphous silicon layer 7, a transparent conductive layer 8 and a second electrode layer 9 are sequentially formed on the other side of the N-type silicon wafer substrate 1, wherein the first intrinsic amorphous silicon layer 2, the second intrinsic amorphous silicon layer 6 and the amorphous silicon layer 7 are formed by plasma chemical vapor deposition; and forming the first electrode layer 5 and the second electrode layer 9 by screen printing. In the preparation method of the solar cell of the embodiment of the invention, a manufacturing method of the solar cell for reducing parasitic absorption is used, the microcrystalline silicon N layer 3 is formed, the silicon nitride layer 4 is formed on the microcrystalline silicon N layer 3, the microcrystalline silicon N layer can be used as a buffer layer material, the microcrystalline silicon N layer is subjected to one-time crystalline phase transformation, when annealing is carried out again, the influence on the defect state of the microcrystalline silicon N layer is small, and the microcrystalline silicon has good stability for doping phosphorus atoms, so that a good conductive layer can be formed by carrying out subsequent annealing on the material, in addition, the silicon nitride layer can passivate the defects on the surface of the microcrystalline silicon, the recombination of carriers is reduced, the reflection of light can be reduced, the utilization rate of photons is improved, the electrical property and the optical property of the cell are improved, and the efficiency of the cell is improved.
Example 2
Next, a solar cell according to embodiment 2 of the present invention and a method for manufacturing the same are described, and in embodiment 2, only the points different from those in embodiment 1 are described, and the description of the same parts is omitted.
In example 1, the original amorphous silicon N layer and transparent conductive layer were replaced with a microcrystalline silicon N layer on the front side of the solar cell, while the back side of the solar cell was similar to the conventional cell structure.
In example 2, the original amorphous silicon P layer and transparent conductive layer were replaced with a microcrystalline silicon P layer on the back side of the solar cell, while the front side of the solar cell was similar to the conventional cell structure.
In this case, the microcrystalline silicon P layer may be obtained by vacuum deposition using, for example, a PECVD process, and may be doped with, for example, B (boron) or Al (aluminum) at a doping concentration in the range of 1 × 1018cm-3To 1X 1025cm-3The microcrystalline silicon P layer is vacuum-coated by PECVD process, and the process gas comprises H2、SiH4And pH3The deposition temperature is 150-500 ℃.
After depositing the microcrystalline silicon P layer on the back side of the solar cell, a silicon nitride layer and an electrode layer may also be deposited thereon.
The solar cell according to embodiment 2 of the present invention can obtain effects similar to those of the solar cell in embodiment 1.
Example 3
Next, a solar cell according to embodiment 3 of the present invention and a method for manufacturing the same are described, and in embodiment 3, only the points different from those in embodiment 1 and embodiment 2 are described, and the description of the same parts is omitted.
In example 1, the original amorphous silicon N layer and transparent conductive layer were replaced with a microcrystalline silicon N layer on the front side of the solar cell, while the back side of the solar cell was similar to the conventional cell structure.
In example 2, the original amorphous silicon P layer and transparent conductive layer were replaced with a microcrystalline silicon P layer on the back side of the solar cell, while the front side of the solar cell was similar to the conventional cell structure.
In example 3, the original amorphous silicon N layer and transparent conductive layer were replaced with a microcrystalline silicon N layer on the front side of the solar cell, and the original amorphous silicon P layer and transparent conductive layer were replaced with a microcrystalline silicon P layer on the back side of the solar cell.
In embodiment 3, the methods for preparing the microcrystalline silicon N layer and the microcrystalline silicon P layer may refer to the methods in embodiments 1 and 2, which are not described herein, and a silicon nitride layer may be deposited on the microcrystalline silicon N layer and the microcrystalline silicon P layer.
The solar cell according to embodiment 3 of the present invention can obtain effects similar to those of the solar cells in embodiment 1 and embodiment 2.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A solar cell comprises an N-type silicon wafer substrate, and is characterized by further comprising:
the first intrinsic amorphous silicon layer is arranged on at least one side of the N-type silicon wafer substrate;
the microcrystalline silicon layer is arranged on one side, away from the N-type silicon wafer substrate, of the first intrinsic amorphous silicon layer;
the silicon nitride layer is arranged on one side, away from the N-type silicon wafer substrate, of the microcrystalline silicon layer; and
a first electrode layer disposed on an outer surface of the microcrystalline silicon layer and in electrical contact with the microcrystalline silicon layer through the silicon nitride layer.
2. The solar cell of claim 1, wherein the first electrode layer is ring-shaped and is embedded in the silicon nitride layer.
3. The solar cell of any of claim 1, wherein the thickness of the silicon nitride layer is less than the thickness of the first electrode layer.
4. The solar cell according to any one of claims 1 to 3, wherein when the first intrinsic amorphous silicon layer is disposed on one side of the N-type silicon wafer substrate, the solar cell further comprises:
the second intrinsic amorphous silicon layer is arranged on one side of the N-type silicon wafer substrate, which is opposite to the first intrinsic amorphous silicon layer;
the amorphous silicon layer is arranged on one side, away from the N-type silicon wafer substrate, of the second intrinsic amorphous silicon layer;
the transparent conducting layer is arranged on one side, away from the N-type silicon wafer substrate, of the amorphous silicon layer; and
and the second electrode layer is arranged on the outer surface of the transparent conducting layer.
5. The solar cell of claim 4, wherein the first electrode layer and the second electrode layer are both silver electrode rings.
6. A method of fabricating a solar cell, the method comprising:
providing an N-type silicon wafer substrate;
forming a first intrinsic amorphous silicon layer on at least one side of the N-type silicon wafer substrate;
forming a microcrystalline silicon layer on one side of the first intrinsic amorphous silicon layer, which is far away from the N-type silicon wafer substrate;
forming a silicon nitride layer on one side of the microcrystalline silicon layer far away from the N-type silicon wafer substrate; and
a first electrode layer is formed on an outer surface of the microcrystalline silicon layer, and the first electrode layer is in electrical contact with the microcrystalline silicon layer through the silicon nitride layer.
7. The production method according to claim 6, wherein the step of forming the microcrystalline silicon layer is: forming the microcrystalline silicon layer by plasma chemical vapor deposition, wherein the process gas comprises H2、SiH4And pH3The deposition temperature is 150-500 ℃.
8. The method of manufacturing according to claim 6, further comprising: doping the microcrystalline silicon layer with phosphorus to a concentration in the range of 1 × 1018cm-3To 1X 1025cm-3。
9. The production method according to claim 6, further comprising, after the step of forming the microcrystalline silicon layer: and performing heat treatment on the component obtained after the microcrystalline silicon layer is formed, wherein the heat treatment temperature is 100-300 ℃ and the time is 20-180 s.
10. The production method according to any one of claims 6 to 9, wherein when forming the first intrinsic amorphous silicon layer on the side of the N-type silicon wafer substrate, the method further comprises: and sequentially forming a second intrinsic amorphous silicon layer, an amorphous silicon layer, a transparent conducting layer and a second electrode layer on the other side of the N-type silicon wafer substrate, wherein:
forming the first intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer, the amorphous silicon layer by plasma chemical vapor deposition; and the number of the first and second groups,
the first electrode layer and the second electrode layer are formed by screen printing.
CN202110131532.9A 2021-01-30 2021-01-30 Solar cell and preparation method thereof Pending CN113394309A (en)

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CN106531834A (en) * 2016-11-30 2017-03-22 华中科技大学 HIT solar cell and preparation method therefor
CN111640816A (en) * 2020-06-10 2020-09-08 成都晔凡科技有限公司 Heterojunction solar cell, laminated tile assembly and manufacturing method
CN112133763A (en) * 2019-06-24 2020-12-25 泰州隆基乐叶光伏科技有限公司 A p-type crystalline silicon solar cell and production method

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Publication number Priority date Publication date Assignee Title
CN203218277U (en) * 2012-11-19 2013-09-25 湖南师范大学 A kind of HIT solar cell
CN204558503U (en) * 2014-12-31 2015-08-12 泉州市博泰半导体科技有限公司 A kind of HIT solar cell with amorphous silicon/microcrystal silicon composite bed
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