CN218788382U - High-efficiency heterojunction solar cell - Google Patents
High-efficiency heterojunction solar cell Download PDFInfo
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- CN218788382U CN218788382U CN202223185812.7U CN202223185812U CN218788382U CN 218788382 U CN218788382 U CN 218788382U CN 202223185812 U CN202223185812 U CN 202223185812U CN 218788382 U CN218788382 U CN 218788382U
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- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims abstract description 112
- 239000004065 semiconductor Substances 0.000 claims abstract description 73
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 52
- 238000002161 passivation Methods 0.000 claims abstract description 40
- 239000000758 substrate Substances 0.000 claims abstract description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 29
- 150000001875 compounds Chemical class 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 64
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 46
- 229910000077 silane Inorganic materials 0.000 description 46
- 238000000151 deposition Methods 0.000 description 45
- 238000000034 method Methods 0.000 description 36
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 28
- 229910052710 silicon Inorganic materials 0.000 description 28
- 239000010703 silicon Substances 0.000 description 28
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 24
- 229910052739 hydrogen Inorganic materials 0.000 description 24
- 239000001257 hydrogen Substances 0.000 description 24
- 239000012495 reaction gas Substances 0.000 description 22
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 21
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 20
- 239000007789 gas Substances 0.000 description 20
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 19
- 239000005922 Phosphane Substances 0.000 description 15
- 229910000064 phosphane Inorganic materials 0.000 description 15
- 230000008021 deposition Effects 0.000 description 13
- 229910002092 carbon dioxide Inorganic materials 0.000 description 12
- 239000001569 carbon dioxide Substances 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 239000002131 composite material Substances 0.000 description 6
- 150000002431 hydrogen Chemical class 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- -1 diborane Chemical compound 0.000 description 3
- 238000001755 magnetron sputter deposition Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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Abstract
The utility model relates to a high-efficiency heterojunction solar cell, which comprises a semiconductor substrate, a first passivation layer arranged on a first main surface of the semiconductor substrate, and a first semiconductor film layer which is arranged on the first passivation layer and is provided with N-type doping or P-type doping; the first semiconductor film layer includes a first microcrystalline silicon stacked layer provided on the first passivation layer and a first amorphous silicon layer provided on the first microcrystalline silicon stacked layer and having the same conductive type doping as the first microcrystalline silicon stacked layer. An object of the utility model is to provide a high-efficient heterojunction solar cell, through adopting the influence that microcrystalline silicon stromatolite and compound N type semiconductor rete of amorphous silicon layer or/and P type semiconductor rete can promote battery short-circuit current, open circuit voltage and fill factor simultaneously, battery efficiency can obviously promote.
Description
Technical Field
The utility model relates to a high-efficient heterojunction solar cell.
Background
The heterojunction solar cell is simple in preparation process steps and low in process temperature, the product has the advantages of high power generation amount, high stability, no attenuation and low cost, the cost performance advantage of the heterojunction solar cell is shown along with continuous technical progress and policy promotion of the industry, and the heterojunction solar cell is likely to replace a crystalline silicon solar cell to become a next-generation mainstream photovoltaic cell.
The traditional heterojunction solar cell takes an N-type monocrystalline silicon wafer as a substrate, an intrinsic I-layer amorphous silicon passivates the surface of the crystalline silicon, a boron-doped P-type amorphous silicon film is taken as an emitting layer, and a phosphorus-doped N-type amorphous silicon film forms a back surface field; the method is used as a core process technology and is crucial to the efficiency of the heterojunction solar cell; compared with a doped amorphous silicon thin film, the doped microcrystalline silicon thin film has the advantages of higher doping efficiency, high conductivity, low light absorption and the like, and is hopeful to further improve the efficiency of a cell when applied to a heterojunction cell. However, the higher barrier height between the microcrystalline silicon layer and the TCO film lowers the open circuit voltage of the cell and also increases the series resistance of the cell, which may lead to a decrease in the conversion efficiency of the cell.
Disclosure of Invention
An object of the utility model is to provide a high-efficient heterojunction solar cell, through adopting the influence that the compound N type semiconductor rete of microcrystalline silicon stromatolite and amorphous silicon layer or/and P type semiconductor rete can promote battery short-circuit current, open circuit voltage and fill factor simultaneously, battery efficiency can obviously promote.
The purpose of the utility model is realized through the following technical scheme:
a high-efficiency heterojunction solar cell comprises a semiconductor substrate, a first passivation layer arranged on a first main surface of the semiconductor substrate, and a first semiconductor film layer which is arranged on the first passivation layer and has N-type doping or P-type doping; the first semiconductor film layer includes a first microcrystalline silicon stacked layer provided on the first passivation layer and a first amorphous silicon layer provided on the first microcrystalline silicon stacked layer and having the same conductivity type doping as the first microcrystalline silicon stacked layer.
Compare prior art, the utility model has the advantages of:
by designing the doped semiconductor film layer into a composite layer structure, on one hand, the microcrystalline silicon lamination is utilized to improve the optical band gap and the doping efficiency of the film, so that the cell obtains high short-circuit current and open-circuit voltage; on one hand, the thin doped amorphous silicon layer and the conductive film layer form good contact, so that the series resistance is reduced, the filling factor of the battery is improved, and the battery can obtain high conversion efficiency.
Drawings
Figure 1 is the utility model provides a structural schematic of an embodiment of high-efficient heterojunction solar cell.
Figure 2 is the utility model provides a structural schematic of an embodiment of high-efficient heterojunction solar cell.
Fig. 3 is a schematic structural diagram of an embodiment of the high-efficiency heterojunction solar cell provided by the present invention.
Fig. 4 is a flowchart of a manufacturing method of a high-efficiency heterojunction solar cell provided by the present invention.
Detailed Description
A high-efficiency heterojunction solar cell comprises a semiconductor substrate, a first passivation layer arranged on a first main surface of the semiconductor substrate, and a first semiconductor film layer which is arranged on the first passivation layer and has N-type doping or P-type doping; the first semiconductor film layer includes a first microcrystalline silicon stacked layer provided on the first passivation layer and a first amorphous silicon layer provided on the first microcrystalline silicon stacked layer and having the same conductive type doping as the first microcrystalline silicon stacked layer.
The first microcrystalline silicon laminated layer comprises a first microcrystalline silicon seed layer, a first microcrystalline silicon oxide layer with N-type doping or P-type doping and a first microcrystalline silicon layer with the same conductive type doping as the first microcrystalline silicon oxide layer, wherein the first microcrystalline silicon seed layer, the first microcrystalline silicon layer with N-type doping or P-type doping and the first microcrystalline silicon layer with the same conductive type doping as the first microcrystalline silicon oxide layer are sequentially arranged from bottom to top by taking a first passivation layer as a substrate.
When the first semiconductor film layer is doped in an N type, the thickness of the first microcrystalline silicon seed layer is 1-4nm, the thickness of the first microcrystalline silicon oxide layer is 4-8nm, the thickness of the first microcrystalline silicon layer is 1-4nm, and the thickness of the first amorphous silicon layer is 1-4nm;
when the first semiconductor film layer is doped in a P type mode, the thickness of the first microcrystalline silicon seed layer is 1-4nm, the thickness of the first microcrystalline silicon oxide layer is 2-6nm, the thickness of the first microcrystalline silicon layer is 8-20nm, and the thickness of the first amorphous silicon layer is 1-4nm.
In a specific embodiment, the high-efficiency heterojunction solar cell further comprises a second passivation layer arranged on the second main surface of the semiconductor substrate and a second semiconductor film layer which is arranged on the second passivation layer and has different conductivity type doping from the first semiconductor film layer; the second semiconductor film layer comprises a second microcrystalline silicon stacked layer arranged on the second passivation layer and a second amorphous silicon layer which is arranged on the second microcrystalline silicon stacked layer and has the same conduction type doping as the second microcrystalline silicon stacked layer.
In a specific scheme, the first passivation layer is only arranged on one part of the first main surface of the semiconductor substrate; a second passivation layer and a second semiconductor film layer which is arranged on the second passivation layer and has different conductive type doping with the first semiconductor film layer are arranged on the first main surface which is not covered by the first passivation layer; the second semiconductor film layer comprises a second microcrystalline silicon stacked layer arranged on the second passivation layer and a second amorphous silicon layer which is arranged on the second microcrystalline silicon stacked layer and has the same conduction type doping as the second microcrystalline silicon stacked layer.
A method for manufacturing a high-efficiency heterojunction solar cell comprises the following steps of forming a first semiconductor film layer with N-type doping or P-type doping on a first passivation layer of a passivated semiconductor substrate,
step A, forming a first microcrystalline silicon laminated layer on a first passivation layer of a semiconductor substrate subjected to passivation treatment;
and step B, forming a first amorphous silicon layer on the first microcrystalline silicon laminated layer.
The specific process of the step A comprises a1, depositing a first microcrystalline silicon seed layer on a first passivation layer of the semiconductor substrate subjected to passivation treatment; a2, depositing a first microcrystalline silicon oxide layer with N-type doping or P-type doping on the first microcrystalline silicon seed layer; a3, depositing a first microcrystalline silicon layer having the same conductive type doping as the first microcrystalline silicon oxide layer on the first microcrystalline silicon oxide layer.
The specific method of the working procedure a1 is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane and hydrogen is introduced, and the pressure of the reaction gas is 100-300Pa, so as to deposit the first microcrystalline silicon seed layer.
When preparing the N-type doped first semiconductor film layer, the specific method of the working procedure a2 is that the PECVD film forming temperature is preset to be 150-250 ℃, then mixed gas of silane, phosphane, hydrogen and carbon dioxide is introduced, the pressure of reaction gas is 150-500Pa, the proportion of phosphane to silane is 1% -10%, the proportion of carbon dioxide to silane is 50% -100%, so as to deposit an N-type first microcrystalline silicon oxide layer;
when the P-type doped first semiconductor film layer is prepared, the specific method of the working procedure a2 is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane, diborane, hydrogen and carbon dioxide is introduced, the pressure of the reaction gas is 150-500Pa, the proportion of diborane to silane is 0.5% -4%, and the proportion of carbon dioxide to silane is 50% -100%, so as to deposit the P-type first microcrystalline silicon oxide layer.
When preparing the N-type doped first semiconductor film layer, the specific method of the working procedure a3 is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane, phosphine and hydrogen is introduced, the pressure of the reaction gas is 150-500Pa, and the deposition power density is 0.08-0.3W/cm 2 The ratio of phosphane to silane is 1% -10% to deposit the first N-type microcrystalline siliconA layer;
when preparing the P-type doped first semiconductor film layer, the specific method of the working procedure a3 is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane, diborane and hydrogen is introduced, the pressure of the reaction gas is 150-500Pa, and the deposition power density is 0.1-0.5W/cm 2 The ratio of diborane to silane is 0.5% -4% to deposit a P-type first microcrystalline silicon layer.
When preparing the N-type doped first semiconductor film layer, the specific method of the step B is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane, phosphine and hydrogen is introduced, the pressure of the reaction gas is 30-150Pa, and the deposition power density is 0.01-0.02W/cm 2 The ratio of the phosphane to the silane is 1% -10% to deposit an N-type first amorphous silicon layer;
when preparing the P-type doped first semiconductor film layer, the specific method of the step B is that the PECVD film forming temperature is preset to be 150-250 ℃, then the mixed gas of silane, diborane and hydrogen is introduced, the pressure of the reaction gas is 30-150Pa, and the deposition power density is 0.01-0.02W/cm 2 The proportion of diborane to silane is 1% -10% for depositing a P-type first amorphous silicon layer.
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the following description is made in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
As shown in fig. 1, the present invention provides a high efficiency heterojunction solar cell, including: the N-type silicon wafer 10 includes a first intrinsic amorphous silicon layer 20 (i.e., a first passivation layer), an N-type semiconductor film layer 30 (i.e., a first semiconductor film layer), a front transparent conductive layer 60-1, and a front metal gate line 70-1 sequentially disposed on a front surface of the silicon wafer 10, and a second intrinsic amorphous silicon layer 40 (i.e., a second passivation layer), a P-type semiconductor film layer 50 (i.e., a second semiconductor film layer), a back transparent conductive layer 60-2, and a back metal gate line 70-2 sequentially disposed on a back surface of the silicon wafer 10. The N-type semiconductor film layer 30 or/and the P-type semiconductor film layer 50 is/are of a multi-layer composite structure, and the N-type semiconductor film layer 30 comprises an N-surface microcrystalline silicon seed layer 31, an N-type microcrystalline silicon oxide layer 32, an N-type microcrystalline silicon layer 33 and an N-type amorphous silicon layer 34; the P-type semiconductor film layer 50 includes a P-side microcrystalline silicon seed layer 51, a P-type microcrystalline silicon oxide layer 52, a P-type microcrystalline silicon layer 53, and a P-type amorphous silicon layer 54.
The N-type silicon wafer is a monocrystalline silicon wafer or a polycrystalline silicon wafer.
The thickness of the N-face microcrystalline silicon seed layer 31 is 1-4nm; the thickness of the N-type microcrystalline silicon oxide layer 32 is 4-8nm; the thickness 33 of the N-type microcrystalline silicon layer is 1-4nm; the thickness of the N-type amorphous silicon layer 34 is 1-4nm.
The thickness of the P-surface microcrystalline silicon seed layer 51 is 1-4nm; the thickness of the P-type microcrystalline silicon oxide layer 52 is 2-6nm; the thickness 53 of the P-type microcrystalline silicon layer is 8-20nm; the thickness of the P-type amorphous silicon layer 54 is 1-4nm.
In another embodiment, as shown in fig. 5, a back contact heterojunction solar cell (HBC) comprises an N-type single-crystal silicon wafer 80, a third intrinsic amorphous silicon layer 97 and an anti-reflection layer 98 sequentially stacked on the front surface of the silicon wafer 80, a P-region intrinsic amorphous silicon layer 81 (i.e. a first passivation layer), a P-region semiconductor film layer (i.e. a first semiconductor film layer including a P-region microcrystalline silicon seed layer 82, a P-type microcrystalline silicon oxide layer 83, a P-type microcrystalline silicon layer 84, and a P-type amorphous silicon layer 85), a P-region transparent conductive film layer 93, and a P-region metal gate line 94 sequentially stacked on the surface of a P-region on the back surface of the silicon wafer, and an N-region intrinsic amorphous silicon layer 87 (i.e. a second passivation layer), an N-region semiconductor film layer (i.e. a second semiconductor film layer including an N-region microcrystalline silicon seed layer 88, an N-type microcrystalline silicon oxide layer 89, an N-type microcrystalline silicon layer 90, an N-type amorphous silicon layer 91), an N-region transparent conductive layer 92, and an N-region metal gate line 95 sequentially stacked on the back surface of the silicon wafer. At the junction of the N region and the P region, the N region intrinsic amorphous silicon layer 87 (i.e., the second passivation layer) and the N region semiconductor film layer are stacked on the P region semiconductor film layer through the insulating film layer 86, and an insulating groove 96 is provided between the P region transparent conductive film layer 93 and the N region transparent conductive layer 92 for separation.
As shown in fig. 1 and 4, the method for manufacturing a high-efficiency heterojunction solar cell includes the following steps:
s01, providing an N-type silicon wafer which is subjected to texturing and cleaning;
s02, depositing a second intrinsic amorphous silicon layer on the back of the silicon wafer through PECVD;
s03, depositing a first intrinsic amorphous silicon layer on the front surface of the silicon wafer through PECVD;
s04, depositing an N-type semiconductor film layer on the first intrinsic amorphous silicon layer on the front surface of the silicon wafer through PECVD; depositing an N-type doped layer or sequentially depositing an N-surface seed layer, an N-type microcrystalline silicon oxide layer, an N-type microcrystalline silicon layer and an N-type amorphous silicon layer to form an N-type semiconductor film layer 30 with a multi-layer composite structure;
s05, depositing a P-type semiconductor film layer on the second intrinsic amorphous silicon layer on the back surface of the silicon wafer through PECVD; specifically, a P-type doping layer is deposited or a P-side microcrystalline silicon seed layer, a P-type microcrystalline silicon oxide layer, a P-type microcrystalline silicon layer and a P-type amorphous silicon layer are sequentially deposited to form a P-type semiconductor film layer 50 with a multi-layer composite structure;
s06, depositing a front transparent conductive layer 60-1 on the front surface of the silicon wafer and depositing a back transparent conductive layer 60-2 on the back surface of the silicon wafer through PVD magnetron sputtering;
s07, respectively manufacturing a front metal grid line 70-1 and a back metal grid line 70-2 on the front side and the back side of the silicon wafer;
the process of depositing the N-side microcrystalline silicon seed layer in the step S04 and the process of depositing the P-side microcrystalline silicon seed layer in the step S05 are carried out by introducing mixed gas of silane and hydrogen, and the pressure of reaction gas is 100-300Pa.
The process of depositing the N-type microcrystalline silicon oxide layer in the step S04 comprises the steps of introducing mixed gas of silane, phosphane, hydrogen and carbon dioxide, wherein the pressure of reaction gas is 150-500Pa, the proportion of the phosphane to the silane is 1% -10%, and the proportion of the carbon dioxide to the silane is 50% -100%.
The process of depositing the N-type microcrystalline silicon layer in the step S04 comprises introducing a mixed gas of silane, phosphane and hydrogen, wherein the pressure of the reaction gas is 150-500Pa, and the deposition power density is 0.08-0.3W/cm 2 The ratio of the phosphane to the silane is 1 to 10 percent;
the process of depositing the N-type amorphous silicon layer in the step S04 comprises introducing mixed gas of silane, phosphane and hydrogen, wherein the pressure of the reaction gas is 30-150Pa, and the deposition power density is 0.01-0.02W/cm 2 The ratio of the phosphane to the silane is 1 to 10 percent.
The film forming temperature preset by PECVD in the step S04 is 150-250 ℃.
The process for depositing the P-type microcrystalline silicon oxide layer in the step S05 comprises the steps of presetting a PECVD (plasma enhanced chemical vapor deposition) film forming temperature to be 150-250 ℃, and then introducing mixed gas of silane, diborane, hydrogen and carbon dioxide, wherein the pressure of reaction gas is 150-500Pa, the ratio of diborane to silane is 0.5-4%, and the ratio of carbon dioxide to silane is 50-100%.
The process of depositing the P-type microcrystalline silicon layer in the step S05 comprises the steps of presetting a PECVD film forming temperature to be 150-250 ℃, then introducing mixed gas of silane, diborane and hydrogen, wherein the pressure of reaction gas is 150-500Pa, and the deposition power density is 0.1-0.5W/cm 2 The proportion of diborane to silane is 0.5% -4%.
Introducing mixed gas of silane, diborane and hydrogen into the process of depositing the P-type amorphous silicon layer in the step S05, wherein the pressure of reaction gas is 30-150Pa, and the deposition power density is 0.01-0.02W/cm 2 The proportion of diborane to silane is 1-10%.
Example 1
A method for manufacturing a high-efficiency heterojunction solar cell (as shown in fig. 1), specifically includes the following steps:
s01, providing a clean N-type silicon wafer 10 for texturing; forming a pyramid suede on the surface of an N-type silicon wafer 10 in a suede cleaning mode, and keeping the surface clean; the N-type silicon wafer 10 is a monocrystalline silicon wafer.
S02, depositing a second intrinsic amorphous silicon layer 40 on the back surface of the silicon wafer 10 processed in the S01 through PECVD; the specific process is that silane and hydrogen are introduced into a reaction cavity; the preset film forming temperature is 150-250 ℃; the pressure of the reaction gas is 30-150Pa; the deposition thickness is 5-10nm.
S03, depositing a first intrinsic amorphous silicon layer 20 on the front surface of the silicon wafer 10 processed in the S02 through PECVD; the specific process is that silane and hydrogen are introduced into a reaction cavity; the preset film forming temperature is 150-250 ℃; the pressure of the reaction gas is 30-150Pa; the deposition thickness is 4-7nm.
S04, depositing an N-face microcrystalline silicon seed layer 31, an N-type microcrystalline silicon oxide layer 32, an N-type microcrystalline silicon layer 33 and an N-type amorphous silicon layer 34 on the first intrinsic amorphous silicon layer 20 on the front surface of the silicon wafer 10 processed in the S03 in sequence through PECVD to form a multi-layer composite structure N-type doped layer; the specific process is that the preset film forming temperature is 150-250 ℃; introducing mixed gas of silane and hydrogen into a reaction cavity at the pressure of 100-300Pa, and depositing a first layer as an N-face microcrystalline silicon seed layer 31 with the thickness of 1-4nm; then introducing mixed gas of silane, phosphane, hydrogen and carbon dioxide into the reaction cavity, wherein the ratio of phosphane to silane is 1-10%, the ratio of carbon dioxide to silane is 50-100%, the pressure of the reaction gas is 150-500Pa, and the deposited second layer is an N-type microcrystalline silicon oxide layer 32 with the thickness of 4-8nm; finally, introducing mixed gas of silane, phosphane and hydrogen into the reaction cavity, wherein the ratio of phosphane to silane is 1-10%, the pressure of the reaction gas is 150-500Pa, and a third layer is deposited to be an N-type microcrystalline silicon layer 33, and the thickness of the third layer is 1-4nm; depositing a fourth layer which is an N-type amorphous silicon layer 34 with the thickness of 1-4nm;
s05, depositing a P-side microcrystalline silicon seed layer 51, a P-type microcrystalline silicon oxide layer 52, a P-type microcrystalline silicon layer 53 and a P-type amorphous silicon layer 54 on the second intrinsic amorphous silicon layer on the back of the silicon wafer 10 after the treatment of S04 by PECVD to form a multi-layer composite structure P-type doped layer; the specific process is that the preset film forming temperature is 150-250 ℃; introducing mixed gas of silane and hydrogen into a reaction cavity at the pressure of 100-300Pa, and depositing a first layer as a P-surface microcrystalline silicon seed layer 51 with the thickness of 1-4nm; then introducing mixed gas of silane, diborane, hydrogen and carbon dioxide into the reaction cavity, wherein the proportion of diborane to silane is 0.5-4%, the proportion of carbon dioxide to silane is 50-100%, the pressure of the reaction gas is 150-500Pa, and the deposited second layer is a P-type microcrystalline silicon oxide layer 52 with the thickness of 2-6nm; finally, mixed gas of silane, diborane and hydrogen is introduced into the reaction cavity, the ratio of diborane to silane is 0.5-4%, the pressure of the reaction gas is 150-500Pa, and a third layer of a P-type microcrystalline silicon layer 53 with the thickness of 8-20nm is deposited; depositing a fourth layer which is a P-type amorphous silicon layer 54 with the thickness of 1-4nm;
s06, depositing a front transparent conducting layer 60-1 (ITO) on the front side of the silicon wafer 10 treated in the S05 through PVD magnetron sputtering, and depositing a back transparent conducting layer 60-2 (ITO) on the back side of the silicon wafer 10 treated in the S05 through PVD magnetron sputtering; the deposition thickness is 90-110nm.
And S07, manufacturing a front metal grid line 70-1 (silver grid) on the front transparent conductive layer 60-1 of the silicon wafer 10 after the treatment of the S06 through screen printing, and manufacturing a back metal grid line 70-2 (silver grid) on the back transparent conductive layer 60-2 of the silicon wafer 10 through screen printing.
Example 2
A method for manufacturing a high-efficiency heterojunction solar cell (as shown in fig. 2), the specific process is different from that of example 1 only in that:
s05, depositing a P-type semiconductor film layer 50 on the second intrinsic amorphous silicon layer 40 on the back surface of the silicon wafer after the treatment of the S04 by PECVD; introducing diborane, silane and hydrogen into the reaction cavity; the preset film forming temperature is 150-250 ℃; the pressure of the reaction gas is 30-150Pa; the deposition thickness is 6-14nm.
Example 3
A method for manufacturing a high-efficiency heterojunction solar cell (as shown in fig. 3), wherein the specific process is different from that of example 1 only in that:
s04, depositing an N-type semiconductor film layer 30 on the first intrinsic amorphous silicon layer 20 on the front surface of the silicon wafer processed by the S03 through PECVD; the specific process is that phosphane, silane and hydrogen are introduced into a reaction cavity; the preset film forming temperature is 150-250 ℃; the pressure of the reaction gas is 30-150Pa; the deposition thickness is 4-7nm.
Table 1 lists the utility model provides a heterojunction solar cell and conventional heterojunction solar cell's efficiency contrast, the result shows the utility model provides a heterojunction solar cell shows more excellently in the electrical property, specifically as follows:
Claims (5)
1. a high efficiency heterojunction solar cell, characterized by: the semiconductor device comprises a semiconductor substrate, a first passivation layer arranged on a first main surface of the semiconductor substrate and a first semiconductor film layer which is arranged on the first passivation layer and has N-type doping or P-type doping; the first semiconductor film layer includes a first microcrystalline silicon stacked layer provided on the first passivation layer and a first amorphous silicon layer provided on the first microcrystalline silicon stacked layer and having the same conductive type doping as the first microcrystalline silicon stacked layer.
2. The high efficiency heterojunction solar cell of claim 1, wherein: the first microcrystalline silicon laminated layer comprises a first microcrystalline silicon seed layer, a first microcrystalline silicon oxide layer with N-type doping or P-type doping and a first microcrystalline silicon layer with the same conductive type doping as the first microcrystalline silicon oxide layer, wherein the first microcrystalline silicon seed layer, the first microcrystalline silicon layer with N-type doping or P-type doping and the first microcrystalline silicon layer with the same conductive type doping as the first microcrystalline silicon oxide layer are sequentially arranged from bottom to top by taking a first passivation layer as a substrate.
3. The high efficiency heterojunction solar cell of claim 2, wherein: when the first semiconductor film layer is doped in an N type, the thickness of the first microcrystalline silicon seed layer is 1-4nm, the thickness of the first microcrystalline silicon oxide layer is 4-8nm, the thickness of the first microcrystalline silicon layer is 1-4nm, and the thickness of the first amorphous silicon layer is 1-4nm;
when the first semiconductor film layer is doped in a P type mode, the thickness of the first microcrystalline silicon seed layer is 1-4nm, the thickness of the first microcrystalline silicon oxide layer is 2-6nm, the thickness of the first microcrystalline silicon layer is 8-20nm, and the thickness of the first amorphous silicon layer is 1-4nm.
4. The high efficiency heterojunction solar cell of any of claims 1-3, wherein: the semiconductor substrate further comprises a second passivation layer arranged on the second main surface of the semiconductor substrate and a second semiconductor film layer which is arranged on the second passivation layer and is doped with a different conduction type from the first semiconductor film layer; the second semiconductor film layer comprises a second microcrystalline silicon stacked layer arranged on the second passivation layer and a second amorphous silicon layer which is arranged on the second microcrystalline silicon stacked layer and has the same conduction type doping as the second microcrystalline silicon stacked layer.
5. The high efficiency heterojunction solar cell of any of claims 1-3, wherein: the first passivation layer is only arranged on one part of the first main surface of the semiconductor substrate; a second passivation layer and a second semiconductor film layer which is arranged on the second passivation layer and has different conductive type doping with the first semiconductor film layer are arranged on the first main surface which is not covered by the first passivation layer; the second semiconductor film layer comprises a second microcrystalline silicon laminated layer arranged on the second passivation layer and a second amorphous silicon layer which is arranged on the second microcrystalline silicon laminated layer and has the same conductive type doping as the second microcrystalline silicon laminated layer.
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