CN113219749B - 主动元件阵列基板以及显示面板 - Google Patents
主动元件阵列基板以及显示面板 Download PDFInfo
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- CN113219749B CN113219749B CN202110555994.3A CN202110555994A CN113219749B CN 113219749 B CN113219749 B CN 113219749B CN 202110555994 A CN202110555994 A CN 202110555994A CN 113219749 B CN113219749 B CN 113219749B
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- conductive pattern
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- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 229910052751 metal Inorganic materials 0.000 claims abstract description 108
- 239000002184 metal Substances 0.000 claims abstract description 108
- 239000004065 semiconductor Substances 0.000 claims abstract description 71
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 239000010410 layer Substances 0.000 description 300
- 229920002120 photoresistant polymer Polymers 0.000 description 27
- 239000000463 material Substances 0.000 description 11
- 229910044991 metal oxide Inorganic materials 0.000 description 8
- 150000004706 metal oxides Chemical group 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 229910010272 inorganic material Inorganic materials 0.000 description 6
- 239000011147 inorganic material Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
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- 238000000059 patterning Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
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- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
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- 239000002356 single layer Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- SBYXRAKIOMOBFF-UHFFFAOYSA-N copper tungsten Chemical compound [Cu].[W] SBYXRAKIOMOBFF-UHFFFAOYSA-N 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 239000012535 impurity Substances 0.000 description 1
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- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/122—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode having a particular pattern
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
本发明提供一种主动元件阵列基板以及显示面板。主动元件阵列基板包括基板、第一图案化金属层、第一绝缘层、图案化半导体层、第一透光导电图案层、第二图案化金属层、第二绝缘层以及第二透光导电图案层。第二图案化金属层配置于第一透光导电图案层上,且第二图案化金属层与第一透光导电图案层的重叠面积在基板上的正投影与第二图案化金属层在基板上的正投影一致。第二透光导电图案层位于第二绝缘层上且对应于第一透光导电图案层。本发明可减少制作主动元件阵列基板所需使用的掩膜数量,从而降低显示面板的制作成本。
Description
技术领域
本发明涉及一种主动元件阵列基板以及显示面板。
背景技术
近年来,具有低消耗功率、空间利用效率佳、无辐射、高画质等优越特性的平面显示面板(flat display panels)已成为市场主流,其中又以液晶显示面板最为普及。随着显示规格不断地朝向大尺寸发展,市场对于液晶显示面板的性能要求亦朝向高对比度、快速反应及广视角等特性发展。目前常见的广视角技术包括共平面切换式(In-PlaneSwitching,IPS)液晶显示面板、多域垂直配向式(Multi-domain Vertical Alignment,MVA)液晶显示面板以及边际场切换式(Fringe Field Switching,FFS)液晶显示面板。
以边界电场切换型液晶显示面板为例,其具有低色偏与高透光率等光学特性,因此被广泛应用于各种电子设备中作为平面显示设备。然而,目前边界电场切换型液晶显示面板的像素数组结构至少需采用六道掩膜工艺,造成其制作成本较高。因此,如何减少掩膜的使用数量成为重要的研发方向之一。
发明内容
本发明提供一种主动元件阵列基板,其可采用相对少的掩膜数量制作。
本发明提供一种显示面板,其制作成本相对低。
本发明的一种主动元件阵列基板,其包括基板、第一图案化金属层、第一绝缘层、图案化半导体层、第一透光导电图案层、第二图案化金属层、第二绝缘层以及第二透光导电图案层。第一图案化金属层配置在基板上。第一绝缘层位于该基板上且覆盖第一图案化金属层。图案化半导体层配置于第一绝缘层上。第一透光导电图案层配置于第一绝缘层上且延伸至图案化半导体层上,并覆盖图案化半导体层的局部区域。第二图案化金属层配置于第一透光导电图案层上,且第二图案化金属层与第一透光导电图案层的重叠面积在基板上的正投影与第二图案化金属层在基板上的正投影一致。第二绝缘层覆盖第二图案化金属层、被第二图案化金属层暴露出的第一透光导电图案层以及被第一透光导电图案层暴露出的图案化半导体层以及第一绝缘层。第二透光导电图案层配置于第二绝缘层上且对应于第一透光导电图案层。
在本发明的一实施例中,上述的第一图案化金属层包括多条扫描线以及多个栅极。图案化半导体层包括多个半导体图案。第二图案化金属层包括多条数据线、多个源极以及多个漏极。数据线与扫描线交错以画分出多个子像素区。第一透光导电图案层包括多个第一图案以及多个第二图案。第一图案在基板上的正投影与数据线及源极在基板上的正投影一致。各第二图案位于其中一子像素区中,且各漏极位于其中一第二图案上,其中漏极与第二图案的重叠面积在基板上的正投影与漏极在基板上的正投影一致。第二透光导电图案层包括多个第三图案。各第三图案位于其中一子像素区中且位于其中一第二图案上方。
在本发明的一实施例中,上述的各子像素区配置有其中一栅极、其中一半导体图案、其中一第一图案、其中一第二图案、其中一源极、其中一漏极以及其中一第三图案。第一图案与第二图案分别延伸至半导体图案上。源极覆盖延伸至半导体图案上的第一图案。漏极覆盖延伸至半导体图案上的第二图案,且半导体图案被第一图案与第二图案暴露出来的区域与半导体图案被源极与漏极暴露出来的区域一致。
在本发明的一实施例中,上述的主动元件阵列基板还包括第三绝缘层。第三绝缘层设置于该图案化半导体层与该第一透光导电图案层间,且第三绝缘层具有多个第一开口以及多个第二开口。第一开口对应源极设置且分别暴露出各半导体图案的一部分区域。第二开口对应漏极设置且分别暴露出各半导体图案的另一部分区域。第一透光导电图案层配置于第三绝缘层上,且各第一图案通过其中一第一开口与对应的半导体图案接触,而各第二图案通过其中一第二开口与对应的半导体图案接触。
在本发明的一实施例中,上述的图案化半导体层为非晶硅半导体层或氧化铟镓锌半导体层。第一透光导电图案层为金属氧化物层或金属氧化物的堆叠层。
在本发明的一实施例中,上述第二图案化金属层的底角小于第一透光导电图案层的底角。
本发明的一种显示面板,其包括主动元件阵列基板、对向基板以及显示介质层。主动元件阵列基板包括基板、第一图案化金属层、第一绝缘层、图案化半导体层、第一透光导电图案层、第二图案化金属层、第二绝缘层以及第二透光导电图案层。第一图案化金属层配置在基板上。第一绝缘层位于该基板上且覆盖第一图案化金属层。图案化半导体层配置于第一绝缘层上。第一透光导电图案层配置于第一绝缘层上且延伸至图案化半导体层上,并覆盖图案化半导体层的局部区域。第二图案化金属层配置于第一透光导电图案层上,且第二图案化金属层与第一透光导电图案层的重叠面积在基板上的正投影与第二图案化金属层在基板上的正投影一致。第二绝缘层覆盖第二图案化金属层、被第二图案化金属层暴露出的第一透光导电图案层以及被第一透光导电图案层暴露出的图案化半导体层以及第一绝缘层。第二透光导电图案层配置于第二绝缘层上且与第一透光导电图案层相对应。对向基板相对于主动元件阵列基板。显示介质层位于主动元件阵列基板与对向基板之间。
基于上述,本发明实施例可采用一道掩膜形成第一透光导电图案层与第二图案化金属层。相较于现有技术藉由两道掩膜分别形成第一透光导电图案层与第二图案化金属层,本发明实施例的主动元件阵列基板可减少所需使用的掩膜数量,从而可降低应用此主动元件阵列基板的显示面板的制作成本。
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。
附图说明
图1A至图1I是依照本发明的第一实施例的一种主动元件阵列基板的制作流程的局部上视示意图;
图2A至图2I分别是图1A至图1I中剖线I-I’的局部剖面示意图;
图3是依照本发明的第二实施例的一种主动元件阵列基板的局部剖面示意图;
图4是依照本发明的一实施例的一种显示面板的局部剖面示意图。
附图标记:
10:显示面板
12、100、200:主动元件阵列基板
14:对向基板
16:显示介质层
110:基板
120:第一图案化金属层
130:第一绝缘层
140:图案化半导体层
150:第一透光导电图案层
152:第一图案
154:第二图案
160:第二图案化金属层
170:第二绝缘层
180:第二透光导电图案层
182:第三图案
210:第三绝缘层
BM:黑矩阵层
CF:彩色滤光层
CH:半导体图案
D1:第一方向
D2:第二方向
DE:漏极
DL:数据线
GE:栅极
I-I’:剖线
M2:第二金属层
O:开口
O1:第一开口
O2:第二开口
PR:图案化光阻层
PR1:第一光阻图案
PR2:第二光阻图案
P152、PA、PDE、PDS:正投影
PT1:第一部分
PT2:第二部分
SE:源极
SL:扫描线
SP:子像素区
T1:第一透光导电层
θ1、θ2:底角
具体实施方式
图1A至图1I是依照本发明的第一实施例的一种主动元件阵列基板的制作流程的局部上视示意图,其中图1I省略第二绝缘层,以清楚表示位于第二绝缘层下方的膜层。图2A至图2I分别是图1A至图1I中剖线I-I’的局部剖面示意图。
请先参照图1I及图2I,主动元件阵列基板100包括基板110、第一图案化金属层120、第一绝缘层130、图案化半导体层140、第一透光导电图案层150、第二图案化金属层160、第二绝缘层170以及第二透光导电图案层180。第一图案化金属层120配置在基板110上。第一绝缘层130位于基板110上且覆盖第一图案化金属层120。在本实施例中,第一绝缘层130还可进一步覆盖被第一图案化金属层120所暴露出的基板110。图案化半导体层140配置于第一绝缘层130上。第一透光导电图案层150配置于第一绝缘层130上且延伸至图案化半导体层140上,并覆盖图案化半导体层140的局部区域。第二图案化金属层160配置于第一透光导电图案层150上,且第二图案化金属层160与第一透光导电图案层150的重叠面积在基板110上的正投影(垂直投影)与第二图案化金属层160在基板110上的正投影一致。第二绝缘层170覆盖第二图案化金属层160、被第二图案化金属层160暴露出的第一透光导电图案层150以及被第一透光导电图案层150暴露出的图案化半导体层140以及第一绝缘层130。第二透光导电图案层180位于第二绝缘层170上且对应于第一透光导电图案层150。具体地,第二透光导电图案层180例如是配置于第二绝缘层170上且与第一透光导电图案层150重叠。
以下以图1A至图2I说明主动元件阵列基板100的一种制作流程,但本发明的主动元件阵列基板不以此为限。首先,请参照图1A及图2A,提供基板110。基板110的材质可为玻璃、石英、有机聚合物或是其他合适的材质。
在基板110上形成第一图案化金属层120。第一图案化金属层120的材质可包括金属或合金。所述金属例如为钼、铝、钨化钼或钨化铜,但不以此为限。第一图案化金属层120可以是由第一金属层(未显示)图案化形成。第一金属层可以是上述金属或合金所形成的单一膜层或多层堆叠层。
在本实施例中,第一图案化金属层120包括多条扫描线SL以及多个栅极GE。各扫描线SL沿第一方向D1延伸,且扫描线SL沿第二方向D2排列,其中第一方向D1与第二方向D2相交且例如是彼此垂直,但不以此为限。各栅极GE与其中一扫描线SL连接,且栅极GE沿第一方向D1间格排列。
请参照图1B及图2B,先在基板110上形成整面的第一绝缘层130,其中第一绝缘层130覆盖第一图案化金属层120以及被第一图案化金属层120暴露出来的基板110。第一绝缘层130可以是有机材料层、无机材料层或上述两个的堆叠层。无机材料层可包括氧化硅层、氮化硅层、氮氧化硅层或上述两个的堆叠层。
再于第一绝缘层130上形成图案化半导体层140。图案化半导体层140可由半导体层图案化形成,且图案化半导体层140可为非晶硅半导体层或氧化铟镓锌半导体层。在本实施例中,图案化半导体层140包括多个半导体图案CH,且各半导体图案CH位于其中一栅极GE上方。
请参照图1C及图2C,在基板110上形成第一透光导电层T1。第一透光导电层T1的材质可包括金属氧化物,如铟锡氧化物(Indium Tin Oxide,ITO)或铟锌氧化物(Indium ZincOxide,IZO),但不以此为限。第一透光导电层T1不以单层为限。具体地,第一透光导电层T1可为金属氧化物层或金属氧化物的堆叠层。
于第一透光导电层T1上形成第二金属层M2。第二金属层M2的材质可包括金属或合金。所述金属例如可为铜,但不以此为限。第二金属层M2可以是上述金属或合金所形成的单一膜层或多层堆叠层。
由于在形成第二金属层M2时,半导体图案CH已被第一透光导电层T1覆盖住,因此第一透光导电层T1可保护半导体图案CH,避免金属杂质渗入半导体图案CH中而对元件电性造成负面影响。
请参照图1D及图2D,于第二金属层M2上形成图案化光阻层PR。形成图案化光阻层PR的方法例如是于第二金属层M2上全面形成一光阻层(未显示),再利用灰阶掩膜(未显示)对光阻层进行曝光及显影等步骤。在本实施例中,图案化光阻层PR包括多个第一光阻图案PR1以及多个第二光阻图案PR2,其中第一光阻图案PR1的厚度大于第二光阻图案PR2的厚度。第一光阻图案PR1以及第二光阻图案PR2用以定义后续欲形成的第一透光导电图案层150以及第二图案化金属层160。
请参照图1E及图2E,以第一光阻图案PR1以及第二光阻图案PR2为罩幕,移除被图案化光阻层PR暴露出的第二金属层M2及其下的第一透光导电层T1,以形成第一透光导电图案层150。移除第二金属层M2及第一透光导电层T1的方法可以是湿式蚀刻。举例而言,若第二金属层M2的材质为铜,且第一透光导电层T1的材质为铟锌氧化物,则蚀刻剂可选用与第二金属层M2反应但不与图案化半导体层140反应的铜酸,以及与第一透光导电层T1反应的草酸。藉由调变铜酸及草酸的蚀刻比,可有效地移除被图案化光阻层PR暴露出的第二金属层M2及其下的第一透光导电层T1,并可将蚀刻剂对于图案化半导体层140的损害降低。依据第二金属层M2及第一透光导电层T1的材质的不同,蚀刻剂的选用及组成亦有所不同,而不限于上述。
第一透光导电图案层150可包括多个第一图案152以及多个第二图案154,其中第一图案152由第一光阻图案PR1的第一部分PT1定义而成,且第二图案154由第一光阻图案PR1的第二部分PT2及第二光阻图案PR2定义而成。如图2E所示,第一图案152与第二图案154分别延伸至半导体图案CH上,且覆盖半导体图案CH的局部区域。
请参照图1F及图2F,移除第二光阻图案PR2,以暴露出位于第二光阻图案PR2下方的第二金属层M2。移除第二光阻图案PR2的方法可以是干式蚀刻,但不以此为限。
请参照图1G至图1H及图2G至图2H,以第一光阻图案PR1为罩幕,移除被第一光阻图案PR1暴露出的第二金属层M2,以形成第二图案化金属层160。移除第二金属层M2的方法可以是湿式蚀刻。举例而言,若第二金属层M2的材质为铜,则蚀刻剂可选用与第二金属层M2反应但不与图案化半导体层140反应的铜酸,以降低对图案化半导体层140的损害。然而,蚀刻剂的选择不以此为限。
移除第一光阻图案PR1,以暴露出第二图案化金属层160。在本实施例中,第二图案化金属层160包括多条数据线DL、多个源极SE以及多个漏极DE。各数据线DL沿第二方向D2延伸,且数据线DL沿第一方向D1排列。数据线DL与扫描线SL交错以划分出多个子像素区SP(图1H仅示意性标示出一个子像素区SP)。各源极SE位于其中一子像素区SP内且与对应的数据线DL连接,其中各数据线DL与其所连接的源极SE位于其中一第一图案152上,并且第一图案152在基板110上的正投影P152与数据线DL及源极SE在基板110上的正投影PDS一致。所述正投影一致是指正投影完全重叠,且正投影的形状相同而尺寸实质相同。所述尺寸实质相同包括尺寸相同及尺寸近似的情况。具体地,依据选用的蚀刻剂的不同,正投影的尺寸可能相同或略有差异。各第二图案154位于其中一子像素区SP中,且各漏极DE位于其中一第二图案154上,其中漏极DE与第二图案154的重叠面积在基板110上的正投影PA与漏极DE在基板110上的正投影PDE一致。换句话说,第一透光导电图案层150在基板110上的投影面积大于第二图案化金属层160在基板110上的投影面积,且第二图案化金属层160在基板110上的投影面积落在第一透光导电图案层150在基板110上的投影面积所涵盖的范围内。
各漏极DE位于其中一子像素区SP内且与对应的源极SE相对设置。在各子像素区SP中,源极SE覆盖延伸至半导体图案CH上的第一图案152。漏极DE覆盖延伸至半导体图案CH上的第二图案154,且半导体图案CH被第一图案152与第二图案154暴露出来的区域与半导体图案CH被源极SE与漏极DE暴露出来的区域一致。
由于主动元件阵列基板100可利用一道掩膜(如上述的灰阶掩膜)形成第一透光导电图案层150与第二图案化金属层160,因此相较于现有技术利用两道掩膜形成第一透光导电图案层与第二图案化金属层,本实施例的主动元件阵列基板100可减少制程所需的掩膜数量,从而降低应用主动元件阵列基板100的显示面板的制作成本。
请参照图1I及图2I,在基板110上形成第二绝缘层170。第二绝缘层170覆盖第二图案化金属层160、被第二图案化金属层160暴露出的第一透光导电图案层150以及被第一透光导电图案层150暴露出的图案化半导体层140以及第一绝缘层130。第二绝缘层170可以是有机材料层、无机材料层或上述两个的堆叠层。无机材料层可包括氧化硅层、氮化硅层、氮氧化硅层或上述两个的堆叠层。
于第二绝缘层170上形成第二透光导电图案层180。第二透光导电图案层180的材质可包括金属氧化物,如铟锡氧化物或铟锌氧化物,但不以此为限。此外,第二透光导电图案层180不以单层为限。具体地,第二透光导电图案层180可为金属氧化物层或金属氧化物的堆叠层。第二透光导电图案层180可以是于第二绝缘层170上形成第二透光导电层再藉由图案化制程形成。
在本实施例中,第二透光导电图案层180包括多个第三图案182,且第三图案182对应第一透光导电图案层150的第二图案154设置。各第三图案182位于其中一子像素区SP中且位于其中一第二图案154上方。以边缘场切换像素结构为例,各第三图案182可具有多个开口O,并且各第三图案182可利用开口O与对应的第二图案154产生电场。
此外,第二图案化金属层160的底角θ1小于第一透光导电图案层150的底角θ2。举例而言,底角θ1的范围是20度~60度,底角θ2的范围是75度~90度。较佳地,底角θ1的范围是30度~40度,底角θ2的范围是85度~90度。第二图案化金属层160底角小、斜边的坡度较缓可让后续制程的膜层(如第二透光导电图案层180)不易断开,而第一透光导电图案层150的底角大除了可避免在斜坡处产生暗纹外,在晶体管元件的通道区也可维持通道长度,稳定电性。
在本实施例中,各子像素区SP配置有其中一栅极GE、其中一半导体图案CH、其中一第一图案152、其中一第二图案154、其中一源极SE、其中一漏极DE以及其中一第三图案182。此外,各子像素区SP的形状为矩形。然而,各子像素区SP的形状及各子像素区SP中各元件的数量、各元件的形状及元件间的相对配置关系可视需求改变,而不限于图1I及图2I的显示。
图3是依照本发明的第二实施例的一种主动元件阵列基板的局部剖面示意图。请参照图3,主动元件阵列基板200除了基板110、第一图案化金属层120、第一绝缘层130、图案化半导体层140、第一透光导电图案层150、第二图案化金属层160、第二绝缘层170以及第二透光导电图案层180之外,可进一步包括第三绝缘层210,以保护图案化半导体层140。举例而言,第三绝缘层210可以是无机材料层。无机材料层可包括氧化硅层、氮化硅层、氮氧化硅层或上述两个的堆叠层。
第三绝缘层210设置于图案化半导体层140与第一透光导电图案层150间。第三绝缘层210具有多个第一开口O1以及多个第二开口O2(仅示意性显示出一个第一开口O1以及一个第二开口O2)。第一开口O1对应源极SE设置且分别暴露出各半导体图案CH的一部分区域。第二开口O2对应漏极DE设置且分别暴露出各半导体图案CH的另一部分区域。第一透光导电图案层150配置于第三绝缘层210上,且各第一图案152通过其中一第一开口O1与对应的半导体图案CH接触,而各第二图案154通过其中一第二开口O2与对应的半导体图案CH接触。
在本实施例中,主动元件阵列基板200亦可利用一道掩膜形成第一透光导电图案层150与第二图案化金属层160。因此,相较于现有技术藉由两道掩膜形成第一透光导电图案层与第二图案化金属层,本实施例的主动元件阵列基板200可减少所需的掩膜数量,从而降低应用主动元件阵列基板200的显示面板的制作成本。
图4是依照本发明的一实施例的一种显示面板的局部剖面示意图。请参照图4,显示面板10包括主动元件阵列基板12、对向基板14以及显示介质层16。主动元件阵列基板12例如采用图2I所显示的主动元件阵列基板100,但不以此为限。在另一实施例中,主动元件阵列基板12可采用图3所显示的主动元件阵列基板200。对向基板14相对于主动元件阵列基板12。显示介质层16位于主动元件阵列基板12与对向基板14之间。
对向基板14的材质可为玻璃、石英、有机聚合物或是其他合适的材质。显示介质层16可为液晶层。藉由调变第二图案154与第三图案182之间的电压差值,可控制液晶层中液晶分子的转向,从而调控显示画面的灰阶值。
依据不同的设计需求,显示面板10可进一步包括其他膜层。举例而言,显示面板10可进一步包括黑矩阵层BM,以遮蔽显示面板10中不欲被看见的元件,如图1I中的扫描线SL、数据线DL、主动元件(由栅极GE、半导体图案CH、源极SE以及漏极DE所构成)或其他未显示的线路。此外,显示面板10也可进一步包括彩色滤光层CF,以提供彩色的显示画面。
综上所述,本发明实施例可利用一道掩膜形成第一透光导电图案层与第二图案化金属层。相较于现有技术藉由两道掩膜形成第一透光导电图案层与第二图案化金属层,本发明实施例的主动元件阵列基板可减少所需的掩膜数量,从而可降低应用此主动元件阵列基板的显示面板的制作成本。
虽然本发明已以实施例揭示如上,然其并非用以限定本发明,任何所属技术领域中普通技术人员,在不脱离本发明的精神和范围内,当可作些许的改动与润饰,故本发明的保护范围当视所附权利要求界定范围为准。
Claims (8)
1.一种主动元件阵列基板,其特征在于,包括:
基板;
第一图案化金属层,位于所述基板上;
第一绝缘层,位于所述基板上;
图案化半导体层,位于所述第一绝缘层上;
第一透光导电图案层,位于所述第一绝缘层上;
第二图案化金属层,位于所述第一透光导电图案层上,且延伸至所述图案化半导体层上;
第二绝缘层,位于所述第二图案化金属层上;以及
第二透光导电图案层,位于所述第二绝缘层上,
其中所述第二透光导电图案层具有多个开口,所述多个开口的其中之一暴露出部分所述第二图案化金属层,所述第二图案化金属层的底角小于所述第一透光导电图案层的底角,所述第二图案化金属层的所述底角的范围是20度~60度。
2.根据权利要求1所述的主动元件阵列基板,其特征在于,所述多个开口的其中之一暴露的部分所述第二图案化金属层是漏极。
3.根据权利要求1所述的主动元件阵列基板,其特征在于,所述第二图案化金属层在所述基板上的投影面积小于所述第一透光导电图案层在所述基板上的投影面积。
4.根据权利要求1所述的主动元件阵列基板,其特征在于,所述第二透光导电图案层重叠所述第一透光导电图案层。
5.根据权利要求1所述的主动元件阵列基板,其特征在于,所述第二图案化金属层是多层堆叠层。
6.一种显示面板,其特征在于,包括:
主动元件阵列基板,包括基板、第一图案化金属层、第一绝缘层、图案化半导体层、第一透光导电图案层、第二图案化金属层、第二绝缘层以及第二透光导电图案层,其中所述第一图案化金属层位于所述基板上,所述第一绝缘层位于所述基板上,所述图案化半导体层位于所述第一绝缘层上,所述第一透光导电图案层位于所述第一绝缘层上,所述第二图案化金属层位于所述第一透光导电图案层上且延伸至所述图案化半导体层上,所述第二绝缘层位于所述第二图案化金属层上,所述第二透光导电图案层位于所述第二绝缘层上,其中所述第二透光导电图案层具有多个开口,所述多个开口的其中之一暴露出部分所述第二图案化金属层;以及
对向基板,相对于所述主动元件阵列基板,其中所述第二图案化金属层的底角小于所述第一透光导电图案层的底角,所述第二图案化金属层的所述底角的范围是20度~60度。
7.根据权利要求6所述的显示面板,其特征在于,还包括:
显示介质层,位于所述主动元件阵列基板与所述对向基板之间。
8.根据权利要求6所述的显示面板,其特征在于,所述对向基板包括黑矩阵层以及彩色滤光层,所述黑矩阵层的厚度不同于所述彩色滤光层的厚度。
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CN107092111A (zh) | 2017-08-25 |
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US10203577B2 (en) | 2019-02-12 |
US20170235172A1 (en) | 2017-08-17 |
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