CN112967653B

CN112967653B - Display panel and display device

Info

Publication number: CN112967653B
Application number: CN202110259126.0A
Authority: CN
Inventors: 张蒙蒙; 李玥; 杨帅; 周星耀
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2019-12-11
Filing date: 2019-12-11
Publication date: 2024-05-31
Anticipated expiration: 2039-12-11
Also published as: CN112967653A; CN110827756A; CN110827756B

Abstract

The embodiment of the invention provides a display panel and a display device. The display panel provided by the embodiment of the invention comprises: a subpixel and a pixel driving circuit driving the subpixel; the pixel driving circuit comprises a first power supply signal end, a driving transistor, an organic light emitting element and a second power supply signal end which are connected in series; the initialization transistor is connected in series between the grid electrode of the driving transistor and the initialization signal end; an initialization signal line for transmitting an initialization signal to the initialization signal terminal; the display panel comprises a first driving frequency mode and a second driving frequency mode; the first driving frequency is smaller than the second driving frequency; in the first driving frequency mode, the initialization signal is a first initialization signal V ₁; at the second driving frequency, the initialization signal is a second initialization signal V ₂,V₁≠V₂. The technical scheme of the invention reduces brightness change caused by leakage current at low frequency.

Description

Display panel and display device

Technical Field

The present invention relates to the field of technologies, and in particular, to a display panel and a display device.

Background

For wearing products such as watches or hand rings, minimization of power consumption is an important goal. For convenience of viewing information, these products generally have a continuous display mode, also called AOD (always on display) mode, but the power consumption of continuous display at a normal driving frequency is high, so that the display frequency is generally reduced in a standby state or some special screen, such as 15Hz or less, in order to reduce the power consumption. However, after the frequency is reduced, the display brightness is changed due to the leakage current of the grid electrode of the driving transistor, and even the flicker problem occurs.

In the current design, the leakage current time is increased after the frequency is reduced, and the problem of dark state brightening can occur. If the dark state brightness needs to be reduced, the dark state voltage needs to be pulled up, and the problem of power consumption increase is brought. This may cause the power consumption in the low frequency mode to be increased instead, contrary to the original purpose of designing the low frequency display mode. Therefore, there is a need to solve the aforementioned technical problems.

Disclosure of Invention

An embodiment of the present invention provides a display panel, including: a subpixel and a pixel driving circuit driving the subpixel; the pixel driving circuit comprises a first power supply signal end, a driving transistor, an organic light emitting element and a second power supply signal end which are connected in series; the initialization transistor is connected in series between the grid electrode of the driving transistor and the initialization signal end; an initialization signal line transmitting an initialization signal to the initialization signal terminal; the display panel includes a first driving frequency mode and a second driving frequency mode; the first driving frequency is smaller than the second driving frequency; in the first driving frequency mode, the initialization signal is a first initialization signal V ₁; at the second driving frequency, the initialization signal is a second initialization signal V ₂,V₁≠V₂.

An embodiment of the present invention provides a display device including: the display panel.

According to the display panel and the display device provided by the embodiment of the invention, the initialization signal is changed in the low-frequency driving mode, so that the leakage current in the low-frequency driving mode is reduced, the brightness after the leakage in the low-frequency driving mode is identical to the brightness after the leakage in the normal frequency driving mode, and the problems of brightness darkening and flickering caused by large leakage current in the low-frequency driving are solved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it will be obvious that the drawings in the following description are some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort to a person skilled in the art.

Fig. 1 is a schematic diagram of a display panel according to an embodiment of the present invention;

Fig. 2 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;

FIG. 3 is a timing diagram of the pixel driving circuit shown in FIG. 2;

FIG. 4 is a schematic diagram illustrating signal simulation according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a display panel according to another embodiment of the present invention;

FIG. 6 is a schematic diagram of a display panel according to another embodiment of the present invention;

FIG. 7 is a schematic diagram illustrating signal simulation according to another embodiment of the present application;

FIG. 8 is a schematic diagram illustrating signal simulation according to another embodiment of the present application;

fig. 9 is a schematic diagram of a display device according to an embodiment of the invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

As described in the background art, products such as watches, wrist bands, or cellular phones require real-time display, and driving frequencies of display panels are reduced in order to reduce power consumption. The time for the next frame at 60Hz is 16.67ms and the time for the next frame at 15Hz is 66.67ms, i.e. the potential of the gate of the drive transistor needs to be maintained for 4 times the time for the display mode at 15 Hz. Accordingly, the leakage is continued in the low frequency mode, resulting in an increase in luminance and even flickering of display luminance. The present application provides a display panel and a display device to solve the above technical problems.

Referring to fig. 1 to 4, fig. 1 is a schematic diagram of a display panel according to an embodiment of the application; fig. 2 is a schematic diagram of a pixel driving circuit according to an embodiment of the application; FIG. 3 is a timing diagram of the pixel driving circuit shown in FIG. 2; FIG. 4 is a schematic diagram illustrating signal simulation according to an embodiment of the present application;

The display panel of the present application includes a subpixel P and a pixel driving circuit C driving the subpixel; the pixel driving circuit C includes a first power signal terminal PVDD, a driving transistor DT, an organic light emitting element OLED, and a second power signal terminal PVEE connected in series; the initialization transistor T1 is connected in series between the gate of the driving transistor DT (represented by an N1 node) and the initialization signal terminal Vint; the device also comprises an initialization signal line Int, wherein the initialization signal line Int transmits an initialization signal to the initialization signal terminal Vint; to initialize the driving transistor DT. Taking the PMOS type pixel driving circuit shown in fig. 2 as an example, in order to ensure that the driving transistor DT can be turned on in the data writing stage, the potential of the gate N1 of the driving transistor DT must satisfy V _min-V_N1＜|V_th |, where V _min is the lowest data voltage. The potential input to the driving transistor gate N1 must be a smaller potential than the lowest data voltage V _min minus the absolute value of the threshold voltage |v _th |. That is, the initializing signal line Int always keeps a very low potential, and at the moment of light emission, two ends of the initializing transistor T1 are respectively the initializing signal terminal Vint and the node N1. Since the potential at the gate N1 node of the driving transistor and the initializing signal line is changed by a large voltage difference, the initializing transistor T1 generates a leakage current, resulting in a change in the potential at the gate N1 node of the driving transistor and eventually a change in brightness. With continued reference to fig. 4, taking the first driving frequency as 30Hz and the second driving frequency as 60Hz as an example, one frame at the first driving frequency corresponds to two frames at the second driving frequency. At 60Hz, the potential of the N1 node corresponding to the first Frame 1st Frame and the second initialization voltage V ₂ is shown as figure 4, and the potential of the N1 node gradually drops due to the existence of leakage current; the potential of the N1 node starts to drop from the upper bits again after the data signal is rewritten in the second Frame 2nd Frame. If the initializing potential in the first driving frequency mode is the same as that in the second driving frequency mode, namely, as shown in the potential analog diagram of the N1 node corresponding to V ₁', the potential of the N1 node continuously drops in the second half of the first driving frequency mode, so that the brightness continuously changes, and the potential change is larger in the second half, the brightness change is larger, even flicker occurs, and the display effect is affected.

The display panel of the application comprises a first driving frequency mode and a second driving frequency mode; the first driving frequency is smaller than the second driving frequency; in the first driving frequency mode, the initialization signal is a first initialization signal V ₁; at the second driving frequency, the initialization signal is a second initialization signal V ₂,V₁≠V₂. According to the application, the initialization signals in the first driving frequency mode and the second frequency mode are set to be unequal, so that although the time of leakage current in the first driving frequency mode is prolonged, the leakage current is reduced, and the brightness after leakage in the first driving frequency mode is ensured to be the same as the brightness after leakage in the second driving frequency table mode.

Further, a pixel driving circuit according to an embodiment of the present application is illustrated in fig. 2 and 3. The pixel driving circuit comprises a driving transistor DT, and an initializing transistor T1 connected in series between an initializing signal terminal Vint and a driving transistor grid N1; a reset transistor T2 connected in series between the reset signal terminal Vreset and the first electrode of the organic light emitting element; a first light emitting control transistor T3 connected in series between the first power supply signal terminal PVDD and the first pole of the driving transistor; a second light emission control transistor T4 connected in series between the second electrode of the driving transistor and the first electrode of the organic light emitting element; a compensation transistor T5 connected in series between the gate of the driving transistor and the second pole; a DATA write transistor T6 connected in series between the DATA signal terminal DATA and the first electrode of the driving transistor; the storage capacitor CST is further included, a first pole of the storage capacitor CST is connected with the first power signal end PVDD, and a second pole of the storage capacitor CST is connected with the grid electrode N1 of the driving transistor. The initialization transistor T1 is controlled by a first Scan signal Scan1, the reset transistor T2, the data writing transistor T6 and the compensation transistor T5 are controlled by a second Scan signal Scan2; the first light emission control transistor T3 and the second light emission control transistor T4 are controlled by a light emission control signal EMIT.

Referring to fig. 3, the driving sequence of the pixel driving circuit includes an initialization phase P1, a threshold grabbing phase P2 and a light emitting phase P3;

In the initialization stage P1, the first Scan signal Scan1 provides an on level, the second Scan signal Scan2 and the emission control signal EMIT provide an off level, and the initialization transistor T1 is turned on to initialize the driving transistor DT; the active level here refers to a level at which a transistor that can be controlled by another transistor is in an on state, for example, in the PMOS pixel driving circuit of fig. 2, the active level refers to a low level. An initialization signal is transmitted to the driving transistor DT to reset the driving transistor DT.

In the threshold grabbing stage P2, the second Scan signal Scan2 provides an on level, and the first Scan signal Scan1 and the emission control signal EMIT provide an off level; the data writing transistor T6 and the compensation transistor T5 are conducted, so that a data signal is written into the grid electrode of the driving transistor DT and self-compensation is completed; at the same time, the reset transistor T2 is turned on, and an initialization signal is transmitted to the organic light emitting element OLED to reset the organic light emitting element OLED. The data signal is transmitted to the gate of the driving transistor DT through the first pole of the data writing transistor T6, the driving transistor DT and the compensating transistor T5, and the initializing signal stored in the gate of the driving transistor DT at the previous time is raised until the driving transistor DT is turned off when the potential of the driving transistor gate is V _DATA-V_th, and at this time, the potential stored in the gate of the driving transistor is V _DATA-V_th, where V _th is the threshold voltage of the driving transistor. Because of the process reason of transistor manufacture, even if the same process parameters are satisfied when the transistors are manufactured, the threshold voltages of the transistors on the display panel are different, and the threshold voltages of the transistors drift after the transistors age with the increase of the service time, so that the brightness of the same data signals written in different positions of the display panel is different, and the brightness of the same data signals written in the same data signals is different with the increase of the service time, so that uneven display and color drift are caused. Therefore, the present embodiment grabs and stores the threshold voltage of the driving transistor DT to the gate of the driving transistor so as to eliminate the influence of the threshold voltage on the light emission luminance.

In the light emitting stage P3, the light emitting control signal EMIT provides an on level, and the first Scan signal Scan1 and the second Scan signal Scan2 provide an off level; the driving transistor DT generates a driving current and causes the organic light emitting element OLED to emit light. The first light emitting control transistor T3 is turned on, and the first power signal VDD is transmitted to the first electrode of the driving transistor DT to cause the driving transistor DT to generate a driving current; the second light emission control transistor T4 is turned on to transmit a driving current to the organic light emitting element OLED. As can be seen from the driving current I_ds＝1/2Coxμ*W/L*(V_sg-V_th)^2＝1/2Coxμ*W/L*(VDD-(V_DATA-Vt_h)-V_th)^2＝1/2Coxμ*W/L*(VDD-V_DATA)^2. generated by the driving transistor DT, the light-emitting current of the present embodiment is independent of the threshold voltage of the driving transistor DT depending on the written data signal after the data writing period P3 is compensated, and thus, the influence of the non-uniformity and drift of the threshold voltage of the driving transistor on the light-emitting current is eliminated.

In addition, it can be found from the above formula that the higher the data signal, the smaller the driving current, and the lower the luminance. Therefore, the black state voltage is generally close to or equal to the first power voltage VDD, and the voltage of the N1 node and the initialization signal V ₁ are very different when the black state voltage is written in the first driving frequency mode, so that the leakage current is serious, and the black state is not black, even the flicker phenomenon occurs. The application sets the initialization voltage of the first driving frequency mode and the initialization voltage of the second driving frequency mode to be different, thereby reducing the leakage current in the first driving frequency mode and enabling the brightness after the leakage to be approximately the same as that in the second driving frequency mode, and solving the technical problems. And the data voltage does not need to be increased to enable the black state to be darker, so that the power consumption is prevented from being improved.

Referring to fig. 1 to fig. 4, in an embodiment of the application, the driving transistor is a P-type transistor, and the first initialization signal V ₁ is greater than the second initialization signal V ₂. On the other hand, referring to the aforementioned threshold grabbing stage P2, the data signal is transmitted to the gate of the driving transistor DT through the first pole of the data writing transistor T6, the driving transistor DT and the compensating transistor T5, so as to raise the initializing signal stored in the gate of the driving transistor at the previous time, but the potential of the N1 node cannot be raised to V _DATA-V_th completely, but only approaches V _DATA-V_th. In this embodiment, since the first initialization signal is greater than the second initialization signal, the initial state in the first driving frequency mode is higher, and therefore, even if the same data voltage is written, the potential of the node N1 of the driving transistor gate is higher in the first driving frequency mode. On the other hand, since the first initialization voltage is larger than the second initialization voltage, the difference between the potentials of the gates of the driving transistors in the first driving frequency mode is smaller, and the leakage current is smaller. The former two factors are combined so that the luminance in the first driving frequency mode and the luminance in the second driving frequency mode after using the present application are the same. Please refer to fig. 4, which illustrates a potential change of the N1 node corresponding to the first initialization voltage V ₁. According to the application, after the first initialization signal V ₁ is set to be larger than the second initialization signal V ₂, the average value of the corresponding potential change line is more approximate to the average value of the N1 node potential change line corresponding to the second initialization voltage V ₂, namely the brightness in two driving frequency modes at one position is approximate. With continued reference to fig. 4, taking the first driving frequency as 30Hz and the second driving frequency as 60Hz as an example, one frame at the first driving frequency corresponds to two frames at the second driving frequency. At 60Hz, the potential of the N1 node corresponding to the first Frame 1st Frame and the second initialization voltage V ₂ is shown as figure 4, and the potential of the N1 node gradually drops due to the existence of leakage current; the potential of the N1 node starts to drop from the upper bits again after the data signal is rewritten in the second Frame 2nd Frame. If the initialization voltage is greater than the second driving frequency mode in the first driving frequency mode, namely, as shown in the potential analog diagram of the N1 node corresponding to V ₁, the potential of the N1 node is higher in the first half section in the first driving frequency mode, and the leakage current rate in the first half section and the second half section is very small, so that the average value of the potential of the N1 node of the gate electrode of the driving transistor is even equal to that in the second driving frequency mode, and the problems of brightness change and flicker in the low frequency mode are solved.

In another embodiment of the present application, referring to fig. 1, the pixel driving circuit C further includes a reset transistor T2 connected in series between the reset signal terminal Vreset and the first electrode of the organic light emitting device; the Reset signal end Vreset is electrically connected with a Reset signal line Reset; the Reset signal line Reset is electrically insulated from the initialization signal line Int. When the voltage across the organic light emitting element is the threshold voltage of the organic light emitting element, the organic light emitting element is lit up to emit light. In the display panel of the related art, the gate initialization and the reset of the organic light emitting element share the same signal, that is, the initialization transistor and the reset transistor are connected to the same terminal. Since the initialization voltage is increased in the first driving frequency mode, the voltage transmitted to the first electrode of the organic light emitting element OLED is increased, and the voltage difference between the first electrode and the second power supply voltage may be close to or even exceed the threshold voltage of the organic light emitting element, so that the organic light emitting element is stolen to be bright.

In another embodiment of the present application, in a display panel with high pixel density, the layout design cannot accommodate the separate reset signal line and the initialization signal line, please refer to fig. 6, fig. 6 is a schematic diagram of a display panel according to another embodiment of the present application; the pixel driving circuit C further comprises a reset transistor T2 connected in series between the reset signal terminal Vreset and the first electrode of the organic light emitting element OLED; the reset signal end Vreset is electrically connected with the initialization signal line Int;

In the first driving frequency mode, the voltage signal of the second power supply signal end is PVEE ₁; at the second driving frequency, the voltage signal of the second power signal terminal is PVEE ₂,V₁-PVEE₁≤V₂-PVEE₂＜V_oled, where V _oled is the threshold voltage of the organic light emitting device. In the embodiment, the second power supply voltage is adjusted in the first driving frequency mode and the second driving frequency mode, so that the voltage difference between the electric potential transmitted to the first electrode of the organic light emitting element and the second power supply signal in resetting is smaller than the threshold voltage of the organic light emitting element, and the organic light emitting element is prevented from being stolen. Meanwhile, the reset signal end is electrically connected with the initialization signal wire, an independent reset signal wire is not required to be arranged, the pressure of layout is reduced, and the design of the high-pixel-density display panel is facilitated.

In another embodiment of the present application, in the first driving frequency mode, when the display panel displays a dark state picture, 0.5V is less than or equal to (V _black-|V_th|)-V₁ is less than or equal to 1V, wherein V _black is a black state data voltage, and V _th is a threshold voltage of the driving transistor, wherein the dark state picture is a picture in which sub-pixels with display gray scale less than 16 gray scale account for more than 70% of the total number of sub-pixels. Therefore, in the application, when a dark state picture is displayed, the first initialization voltage V ₁ is set to be less than or equal to 0.5V and less than or equal to 1V (V _black-|V_th|)-V₁ and less than or equal to 1V, and the brightness fluctuation in a low frequency mode is reduced, specifically, the first initialization voltage is increased when the frequency is reduced, when the dark state picture is displayed in a standby mode, the first initialization voltage is set to be 0.5-1V lower than the black state voltage-Vth|i.e. for example, the black state voltage V _black＝5V,V_th = -1.5V, then V ₁ = 3V can be set, the voltage difference between the first initialization voltage V ₁ and the grid electrode of the driving transistor is only 2V, and the leakage current of the node of an N1 node (the grid electrode of the driving transistor) is small, and meanwhile, the charge and discharge of a CST capacitor are greatly reduced due to the need of charging and discharging of the CST capacitor in the initialization stage. Specifically, assuming that the first initialization voltage V ₁ = -3.5V, the storage CST needs to be reset from the N1 voltage to the first initialization voltage V ₁ every frame, and then written to the N1 voltage by the data line, as set by the data voltage, the N1 node changes as follows: 3.5V-3.5V, with a variation range of 7V. And setting the first initialization voltage V ₁ close to V _black -vth| requires only a very small amount of charge and discharge during the reset phase. If the first initialization voltage V ₁ is set to 3V, the node n1 is changed as follows: 3.5V-3V-3.5V, with a variation range of only 0.5V. The problem of dark state lighting can be reduced, and power consumption can be saved.

In another embodiment of the present application, when the display panel displays a non-dark state frame in the first driving frequency mode, 0.5V is less than or equal to 1V (V _mode-|V_th|)-V₁ is less than or equal to 1V, wherein V _mode is the mode of the data voltage in the display panel. Setting the first initialization voltage V ₁ to be close to V _mode -Vth is only required for a very small amount of charge and discharge in the reset phase, N1 is changed as follows, V ₁→V_data-|V_th|→V₁, for most of the sub-pixels, the change range is only about 0.5V to 1V, the problem of dark state lighting can be reduced, and the power consumption can be saved.

Further, referring to fig. 5, fig. 5 is a schematic diagram of a display panel according to another embodiment of the invention; due to the development of the organic light emitting device, the blue organic light emitting device has low light emitting efficiency, and the driving current is larger, almost twice that of the red and green sub-pixels. According to the formula I _ds＝1/2Coxμ*W/L*(VDD-V_DATA) 2 of the driving current, that is, the N1 node potential of the blue sub-pixel is lower under the same gray scale, at this time, the leakage current of the blue sub-pixel is small and the leakage currents of the red and green sub-pixels are larger under the same initialization voltage. When the leakage time is increased in the first driving frequency mode, the difference of the leakage current is amplified, which results in not only brightness change but also significant color shift. Therefore, in the present embodiment, referring to fig. 5, the display panel includes red sub-pixels, green sub-pixels and blue sub-pixels; the initialization signal lines comprise a first initialization signal line IntRG and a second initialization signal line IntB; the first initialization signal line IntRG is used for initializing the pixel driving circuits corresponding to the red sub-pixel and the green sub-pixel, and the second initialization signal line IntB is used for initializing the pixel driving circuits corresponding to the blue sub-pixel; the first initialization signal line provides a red-green first initialization signal V ₁₁; the second initialization signal line provides a blue first initialization signal V ₁₂;V₁₁＞V₁₂. Because the driving voltages of the red sub-pixel and the green sub-pixel are relatively large, the driving voltage of the blue sub-pixel is small, and the first smaller initializing voltage is set, the leakage currents of the red sub-pixel, the green sub-pixel and the blue sub-pixel are close, and color cast is avoided.

In one embodiment of the application, since only a few drive modes are commonly used, for example: the driving frequency of the display panel corresponding to the application is scattered point change, and the first driving frequency mode comprises a driving frequency F ₅; the second drive frequency mode includes a drive frequency F ₆,F₅＜F₆. It should be noted that the first driving frequency mode and the second driving frequency mode according to the present application do not represent that the present application can only have two driving frequency modes, but relatively have one high-frequency driving mode and one low-frequency driving mode. For example: the display panel includes driving frequencies of 60Hz,30Hz,15Hz, and 1Hz, wherein 1Hz is a first driving frequency pattern, and 15Hz, 30Hz, and 60Hz may be referred to as a second driving frequency pattern, compared to the first driving frequency pattern of 1 Hz; similarly, 15Hz is the first drive frequency mode, and both 30Hz and 60Hz may be referred to as the second drive frequency mode, as compared to the first drive frequency mode of 1 Hz;

Further, referring to fig. 7 and 8, fig. 7 is a signal simulation diagram of an initialization signal according to another embodiment of the present application; FIG. 8 is a signal simulation diagram of an initialization signal according to another embodiment of the present application;

The inventors have found that the human eye perceives brightness as an average brightness per unit time. The human eye perceives the luminance l= ≡l (T) dt/T; while the potential of the N1 node is related to current, which is related to brightness. The inventor analyzes through the infinitesimal method that the potential and the brightness of the N1 node are basically in a linear relation in the range of the voltage difference DeltaV caused by the leakage current of the N1 node. Whereas ≡l (T) dt actually represents the area, T represents time, and l= L (T) dt/T represents the average value of the area. Referring to fig. 7, s ₁ represents an area of the second driving frequency mode that is larger than that of the first driving frequency mode if the initialization voltage is not adjusted. This causes a difference in brightness. Referring to fig. 8, if the area S ₂ of the first initialization voltage is larger than the area S ₁ of the second initialization voltage, the brightness in the first driving frequency mode and the brightness in the second driving frequency mode are similar or even identical. Wherein S ₁ is equal to the time when the voltage at node N1 falls to a value = (K/F ₆)*1/F₆,＝K/F₆ A2, where K is the leakage rate S2 is similar to the area ≈(△V₁+(△V₁+K/F₅-K'/F₅))/2F₅＝△V₁/F₅+K-K'/2F₅^2, of the trapezoid where K' is the leakage rate after the first initialization voltage is adjusted. To make S ₂ approach S ₁, deltaV ₁/F₅+(K-K')/2F₅^2＝＝K/F₆, deltaV ₁＝K*F₅/F₆^2+(K-K')/2F₅. Obviously, the leakage rate at the second initialization voltage is greater than that at the first initialization voltage, and therefore K-K' > 0. In addition, as described above, when the first initialization potential is higher than the second initialization potential, the potential of the N1 node cannot be pulled up by V ₁-V₂, that is, V ₁-V₂＞△V₁. Thus, in another embodiment of the present application, V ₁-V₂＞K*F₅/F₆ A2. In addition, K' > 0, V ₁-V₂＜K*F₅/F₆^2+K/2F₅ may be set, and according to the present embodiment, the brightness of the first driving frequency mode and the second driving frequency mode may be made to be close to or equal to each other, so that the problem of brightness is avoided.

Further, in an embodiment of the present application, the driving frequency of the display panel is continuously changed, and the first driving frequency mode includes a driving frequency having a driving frequency between F ₁～F₂; the second drive frequency mode includes a drive frequency having a drive frequency between F ₃～F₄; the maximum between F ₁～F₂ is less than the minimum between F ₃～F₄.

The first average driving frequency F _m is the average of F ₁ and F ₂, the second average driving frequency F _n is the average of F ₃ and F ₄, and K is F _m/F_n^2＜V₁-V₂＜K*F_m/F_n^2+K/2F_m, where K is the leakage rate. The problem of leakage current time increase and brightness change only occurs when the frequency difference is large, and compensation can be performed according to the average value in a relatively small frequency range, so that the brightness of the first driving frequency mode and the second driving frequency mode can be close to or equal to each other according to the embodiment, and the problem of brightness is avoided.

Further, the application also discloses a display device, the display device further comprises an initialization voltage adjusting unit 20, the initialization voltage adjusting unit 20 comprises a frequency identifier 201 and an initialization voltage generator 202, the frequency identifier 201 is used for identifying the driving frequency of the display panel, and the initialization voltage generator 202 is used for generating a corresponding initialization voltage according to the driving frequency identified by the frequency identifier. The display device of the present application includes, but is not limited to, a cellular phone 1000, a tablet computer, a display of a computer, a display applied to a smart wearable device, a display applied to a vehicle such as an automobile, and the like. As long as the display device includes the organic light emitting display panel included in the display device disclosed in the present application, it is considered to fall within the scope of the present application.

The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather to enable any modification, equivalent replacement, improvement or the like to be made within the spirit and principles of the invention.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

1. A display panel, comprising:

A subpixel and a pixel driving circuit driving the subpixel;

The pixel driving circuit comprises a first power supply signal end, a driving transistor, an organic light emitting element and a second power supply signal end which are connected in series; the initialization transistor is connected in series between the grid electrode of the driving transistor and the initialization signal end;

an initialization signal line transmitting an initialization signal to the initialization signal terminal;

the display panel includes a first driving frequency mode and a second driving frequency mode; the first driving frequency is smaller than the second driving frequency;

In the first driving frequency mode, the initialization signal is a first initialization signal V ₁; and in an initialization phase, the first initialization signal V ₁ is written to the gate of the driving transistor through the initialization transistor; in the second driving frequency mode, the initialization signal is a second initialization signal V ₂,V₁≠V₂.

2. The display panel of claim 1, wherein the display panel comprises,

The pixel driving circuit further comprises a reset transistor connected in series between a reset signal terminal and the first electrode of the organic light emitting element; the reset signal end is electrically connected with a reset signal line; the reset signal line is electrically insulated from the initialization signal line.

3. The display panel of claim 1, wherein the display panel comprises,

The pixel driving circuit further comprises a reset transistor connected in series between the first electrodes of the organic light emitting elements at a reset signal end; the reset signal end is electrically connected with the initialization signal line;

In the first driving frequency mode, the voltage signal of the second power supply signal end is PVEE ₁; in the second driving frequency mode, the voltage signal of the second power signal terminal is PVEE ₂,V₁-PVEE₁≤V₂-PVEE₂＜V_oled, where V _oled is the threshold voltage of the organic light emitting element.

4. The display panel of claim 1, wherein the display panel comprises,

The driving transistor is a P-type transistor, and the first initialization signal V ₁ is greater than the second initialization signal V ₂.

5. The display panel of claim 4, wherein the display panel comprises,

In the first driving frequency mode, when the display panel displays a dark state picture, 0.5V is less than or equal to 1V (V _black-|V_th|)-V₁ is less than or equal to 1V, wherein V _black is black state data voltage, V _th is threshold voltage of the driving transistor, and the dark state picture is a picture with more than 70% of total sub-pixels, wherein the number of sub-pixels is displayed in a gray scale of less than 16.

6. The display panel of claim 5, wherein the display panel comprises,

In the first driving frequency mode, when the display panel displays a non-dark state picture, 0.5V is less than or equal to (V _mode-|V_th|)-V₁ is less than or equal to 1V, wherein V _mode is the mode of the data voltage in the display panel.

7. The display panel of claim 4, wherein the display panel comprises,

The display panel comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel; the initialization signal line comprises a first initialization signal line and a second initialization signal line; the first initialization signal line is used for initializing the pixel driving circuits corresponding to the red sub-pixels and the green sub-pixels, and the second initialization signal line is used for initializing the pixel driving circuits corresponding to the blue sub-pixels;

the first initialization signal line provides a red-green first initialization signal V ₁₁; the second initialization signal line provides a blue first initialization signal V ₁₂;V₁₁＞V₁₂.

8. The display panel of claim 1, wherein the display panel comprises,

The driving frequency of the display panel is continuously changed, and the first driving frequency mode comprises driving frequencies with the driving frequency between F ₁～F₂; the second driving frequency mode includes a driving frequency having a driving frequency between F ₃～F₄; the maximum between F ₁～F₂ is less than the minimum between F ₃～F₄.

9. The display panel of claim 8, wherein the display panel comprises,

The first average driving frequency F _m is the average of F ₁ and F ₂, the second average driving frequency F _n is the average of F ₃ and F ₄,

K is F _m/F_n^2＜V₁-V₂＜K*F_m/F_n^2+K/2F_m, where K is the leakage rate.

10. The display panel of claim 1, wherein the display panel comprises,

The driving frequency of the display panel is in scattered point change, and the first driving frequency mode comprises a driving frequency F ₅; the second driving frequency mode includes a driving frequency F ₆,F₅＜F₆.

11. The display panel of claim 10, wherein the display panel comprises,

K is F ₅/F₆^2＜V₁-V₂＜K*F₅/F₆^2+K/2F₅, where K is the leakage rate.

12. A display device comprising the display panel according to any one of claims 1 to 11,

The display device further comprises an initialization voltage adjusting unit, wherein the initialization voltage adjusting unit comprises a frequency identifier and an initialization voltage generator, the frequency identifier is used for identifying the driving frequency of the display panel, and the initialization voltage generator is used for generating corresponding initialization voltage according to the driving frequency identified by the frequency identifier.