CN110379351B - Display panel driving method, display panel and display device - Google Patents
Display panel driving method, display panel and display device Download PDFInfo
- Publication number
- CN110379351B CN110379351B CN201910686863.1A CN201910686863A CN110379351B CN 110379351 B CN110379351 B CN 110379351B CN 201910686863 A CN201910686863 A CN 201910686863A CN 110379351 B CN110379351 B CN 110379351B
- Authority
- CN
- China
- Prior art keywords
- pulse width
- shift register
- frequency
- scan
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Abstract
The embodiment of the invention provides a display panel driving method, a display panel and a display device, relates to the technical field of display, and can avoid the phenomenon of screen flashing and ensure that the brightness of light at different frequencies tends to be consistent when scanning at different frequencies. The driving method comprises the following steps: in a first scanning mode, driving a shift register to scan at a first frequency, so that the shift register outputs a first scanning signal with a first pulse interval and a first pulse width; in a second scanning mode, driving the shift register to scan at a second frequency, so that the shift register outputs a second scanning signal with a second pulse interval and a second pulse width; wherein the second frequency is less than the first frequency, the second pulse interval is greater than the first pulse interval, the second pulse width is greater than the first pulse width, and Δ t is less than or equal to 0.25 μ s, and Δ t is the difference between the second pulse width and the first pulse width.
Description
[ technical field ] A method for producing a semiconductor device
The present invention relates to the field of display technologies, and in particular, to a driving method of a display panel, and a display device.
[ background of the invention ]
At present, the display panel usually includes a plurality of display modes, such as a sleep mode, a game mode, etc., and in order to save power consumption, the scanning frequency of the shift register is different in different display modes, for example, the shift register performs low frequency scanning in the sleep mode and performs high frequency scanning in the game mode. For this case, there are two driving methods in the prior art:
the first method comprises the following steps: under different scanning frequencies, the shift register outputs scanning signals with different pulse widths, but the writing duration of data signals under different scanning frequencies is different, so that the original brightness is different, and different regulation data, such as gamma data for correcting an original picture, needs to be matched. That is to say, in this kind of driving method, different scanning frequencies need to match different regulation and control data, which not only leads to the driving method to be comparatively tedious, but also, when the scanning frequency switches, it takes a certain time to match the regulation and control data again, which leads to the phenomenon of screen flashing, and affects the display performance.
And the second method comprises the following steps: under different scanning frequencies, the shift register outputs scanning signals with the same pulse width to match the same set of regulation and control data. However, with this driving method, as shown in fig. 1, fig. 1 is a schematic structural diagram of a pixel circuit in the prior art, in a light emitting period in a frame driving period, the potential of the first node N1 is decreased under the influence of leakage of the reference voltage signal Vref, but since the durations of the driving periods corresponding to different scanning frequencies are different, the duration of the potential decrease of the first node in the frame driving period is also different, as shown in fig. 2, fig. 2 is a schematic diagram of the attenuation degree of the potential of the first node corresponding to different frequencies in the prior art, for a high frequency such as 120Hz, the duration of the frame driving period is shorter, the decrease degree of the potential of the first node in the shorter light emitting period is larger, and for a low frequency, the duration of the frame driving period is longer, and the decrease degree of the potential of the first node in the longer light emitting period is larger. According to the formula of leakage current I = K (PVDD-V) in the light emitting stage N1 -|Vth|) 2 It is known that the luminance and the potential V of the first node are N1 And inversely proportional to each other, the light-emitting luminance corresponding to the low frequency is higher than the light-emitting luminance corresponding to the high frequency, which causes the light-emitting luminance of the display panel to be different at different scanning frequencies, and affects the display uniformity.
Therefore, how to make the display panel have good display performance under different scanning frequencies becomes the technical problem to be solved for the moment.
[ summary of the invention ]
In view of this, embodiments of the present invention provide a driving method for a display panel, a display panel and a display device, which can avoid a screen flicker phenomenon when scanning at different frequencies, ensure that luminance at different frequencies tends to be consistent, and improve display performance.
In one aspect, an embodiment of the present invention provides a method for driving a display panel, including:
in a first scanning mode, driving a shift register to scan at a first frequency, so that the shift register outputs a first scanning signal with a first pulse interval and a first pulse width;
in a second scanning mode, driving the shift register to scan at a second frequency, so that the shift register outputs a second scanning signal with a second pulse interval and a second pulse width;
wherein the second frequency is less than the first frequency, the second pulse spacing is greater than the first pulse spacing, the second pulse width is greater than the first pulse width, and Δ t is less than or equal to 0.25 μ s, Δ t being a difference between the second pulse width and the first pulse width.
Alternatively to this, the first and second parts may,
wherein k is more than 0 and less than 2, f1 is the first frequency, f2 is the second frequency, I off Is a leakage current of the thin film transistor, I on The charging current of the thin film transistor.
In the alternative,
optionally, for the same gray-scale value corresponding to the same color sub-pixel, the second data voltage provided to the data line in the second scanning mode is equal to the first data voltage provided to the data line in the first scanning mode.
Optionally, the method further includes:
the time difference between the start leading edge of the second scan signal and the writing time of the second data voltage is equal to the time difference between the start leading edge of the first scan signal and the writing time of the first data voltage.
Optionally, the method further includes:
in the first scanning mode, providing a first clock signal with the first pulse width to the shift register;
in the second scan mode, a second clock signal having the second pulse width is supplied to the shift register.
Optionally, the method further includes:
in the first scanning mode, the shift register scans at any one of the first frequencies in a first frequency band, and the first pulse width of the first scanning signal output by the shift register at each of the first frequencies in the first frequency band is the same;
in the second scanning mode, the shift register scans at any one of the second frequencies in a second frequency band, and the second pulse width of the second scanning signal output by the shift register at each of the second frequencies in the second frequency band is the same.
Optionally, a maximum frequency difference of the plurality of first frequencies in the first frequency segment is less than or equal to 30Hz, and a maximum frequency difference of the plurality of second frequencies in the second frequency segment is less than or equal to 30Hz.
Optionally, the first scanning mode and the second scanning mode are switched, and when Y is greater than or equal to 50%, the difference between the second pulse width and the first pulse width is Δ t1; when Y is less than 50%, the difference value between the second pulse width and the first pulse width is delta t2, and delta t1 is less than delta t 2; y is the percentage of the number of the sub-pixels displaying the high gray scale after the scanning mode is switched to the number of all the sub-pixels.
On the other hand, an embodiment of the present invention further provides a display panel, including:
a shift register for sequentially outputting scan signals;
a timing controller, the timing controller comprising:
the scanning mode control module is electrically connected with the shift register and is used for driving the shift register to scan at a first frequency in a first scanning mode and driving the shift register to scan at a second frequency in a second scanning mode;
the pulse control module is respectively electrically connected with the scanning mode control module and the shift register and is used for controlling the shift register to output a first scanning signal with a first pulse interval and a first pulse width in the first scanning mode and controlling the shift register to output a second scanning signal with a second pulse interval and a second pulse width in the second scanning mode;
wherein the second frequency is less than the first frequency, the second pulse spacing is greater than the first pulse spacing, the second pulse width is greater than the first pulse width, and Δ t is less than or equal to 0.25 μ s, Δ t being a difference between the second pulse width and the first pulse width.
Optionally, the timing controller further includes:
and the clock control module is respectively electrically connected with the scanning mode control module and the shift register and is used for providing a first clock signal with the first pulse width to the shift register in the first scanning mode and providing a second clock signal with the second pulse width to the shift register in the second scanning mode.
In another aspect, an embodiment of the present invention further provides a display device, including the display panel.
One of the above technical solutions has the following beneficial effects:
by adopting the technical scheme provided by the embodiment of the invention, when the shift register scans at different frequencies, the duration of the driving period is adjusted by adjusting the pulse spacing of the scanning signals, so that the pulse width of the scanning signals can be prevented from being greatly adjusted, the pulse widths corresponding to different frequencies are approximately the same, the writing duration of data signals is approximately the same, the original brightness under different frequencies is ensured to be approximately the same, and only one set of regulation data is matched. Therefore, when the frequency is switched, the driving method is simplified, regulation and control data do not need to be matched again, and the phenomenon of screen flashing is avoided. In addition, the pulse widths corresponding to different frequencies are further finely adjusted, so that the pulse width corresponding to a higher frequency is smaller than the pulse width corresponding to a lower frequency, the problem that the voltage attenuation degrees of the first node in the light-emitting period are inconsistent can be effectively solved, the light-emitting brightness under different frequencies tends to be consistent, and the display performance is improved.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a pixel circuit in the prior art;
FIG. 2 is a schematic diagram illustrating the attenuation of the first node potential corresponding to different frequencies in the prior art;
FIG. 3 is a timing diagram of a pixel circuit according to the prior art;
FIG. 4 is a flowchart of a driving method according to an embodiment of the present invention;
FIG. 5 is a timing diagram of a first scan signal corresponding to a first frequency according to an embodiment of the present invention;
FIG. 6 is a timing diagram of a second scan signal corresponding to a second frequency according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the invention;
FIG. 8 is a schematic view of another structure of a display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention.
[ detailed description ] A
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the description of the invention and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely a relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B, may represent: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter associated objects are in an "or" relationship.
In order to more clearly understand the technical solution provided by the embodiment of the present invention, before explaining the technical solution provided by the embodiment of the present invention, firstly, the working principle of the pixel circuit shown in fig. 1 is explained:
as shown in fig. 3, fig. 3 is a signal timing diagram corresponding to a pixel circuit in the prior art, and a driving cycle of the pixel circuit includes an initialization period t1, a data signal writing period t2, and an emission period t3.
In the initialization period T1, the first Scan signal Scan1 is at a low level, the second Scan signal Scan2 and the emission control signal Emit are at a high level, the reference voltage signal Vref is transmitted to the first node N1 via the fifth thin film transistor T5 which is turned on, and is transmitted to the anode of the light emitting diode D via the seventh thin film transistor T7 which is turned on, and the reset of the first node N1 and the anode of the light emitting diode D is realized, and in this period, V is set to be at a low level, and the reset of the first node N1 and the anode of the light emitting diode D is realized N1 ＝Vref。
In the Data signal writing period T2, the first Scan signal Scan1 and the emission control signal Emit are at the high level, the second Scan signal Scan2 is at the low level, the Data signal Data is written into the first node N1 via the turned-on second thin film transistor T2 and the turned-on fourth thin film transistor T4 to charge the first node N1, and in this period, V is ideally set to be in the high level N1 ＝V Data -|Vth|。
In the light emitting period T3, the first Scan signal Scan1 and the second Scan signal Scan2 are at a high level, the light emitting control signal Emit is continuously at a low level, the first thin film transistor T1, the third thin film transistor T3, and the sixth thin film transistor T6 are continuously turned on, the light emitting diode D continuously emits light under the action of the written Data signal Data and the power supply signal PVDD, and the driving current is driven in this period
Under ideal conditions, V N1 ＝V Data - | Vth |, derived,
wherein, mu n Denotes the migration rate of electrons, C OX The capacitance of the gate oxide layer per unit area is expressed,
indicating the channel width to length ratio.
Based on this, an embodiment of the present invention provides a driving method of a display panel, as shown in fig. 4 to 6, fig. 4 is a flowchart of the driving method provided by the embodiment of the present invention, fig. 5 is a timing diagram of a first scan signal corresponding to a first frequency provided by the embodiment of the present invention, and fig. 6 is a timing diagram of a second scan signal corresponding to a second frequency provided by the embodiment of the present invention, the driving method includes:
step S1: in the first Scan mode, the shift register is driven to Scan at the first frequency f1, so that the shift register outputs a first Scan signal Scan (Scan 1, scan2, \ 8230;, scan n) having a first pulse pitch L1 and a first pulse width W1.
Step S2: in a second scanning mode, driving the shift register to Scan at a second frequency f2, so that the shift register outputs a second scanning signal Scan '(Scan 1', scan2', \8230; scan n') with a second pulse interval L2 and a second pulse width W2; the second frequency f2 is smaller than the first frequency f1, the second pulse interval L2 is larger than the first pulse interval L1, the second pulse width W2 is larger than the first pulse width W1, and delta t is smaller than or equal to 0.25 mu s, and is the difference between the second pulse width W2 and the first pulse width W1.
In the driving method of the display panel provided in the embodiment of the present invention, when the shift register scans at different frequencies, the duration of the driving period is adjusted to match the corresponding frequency value by adjusting the pulse interval of the scanning signal so that the pulse widths are substantially the same: the first pulse interval L1 corresponding to the higher first frequency f1 is smaller, so that the duration of the driving period is shorter; and the corresponding second pulse interval L2 is larger at the lower second frequency f2, so that the duration of the driving period is longer.
Furthermore, the pulse width of the scanning signals corresponding to different frequencies is finely adjusted, so that the pulse width corresponding to the lower frequency is larger than the pulse width corresponding to the higher frequency, and the same light-emitting brightness at different frequencies can be ensured. Specifically, in combination with the operating principle of the pixel circuit, when the shift register scans at the higher first frequency f1, in the data signal writing period t2, the writing duration of the data signal is the duration corresponding to the first pulse width W1, and at this time, the voltage actually written into the first node N1 is v N1 . When the shift register scans at the second lower frequency f2, the second pulse width W2 is adjusted to be larger than the first pulse width W1 by adjusting the second pulse width W2 to be larger than the first pulse width W1, and the data signal writing duration is longer than the data signal writing duration at the first frequency f1 in the data signal writing period t2, so that the voltage v actually written into the first node N1 at the second frequency f2 N1 ' more fully, closer to V Data - | Vth |, i.e., v N1 ′＞v N1 . Thus, in the light-emitting period t3, even if receiving lightHigher v to the effect of leakage of the reference voltage signal Vref N1 ' actual voltage value v after occurrence of large attenuation N11 ', will also be associated with lower v N1 Actual voltage value v after small attenuation N11 Tend to be consistent, so that the driving current corresponding to the first frequency f1
Drive current corresponding to second frequency f2
The brightness tends to be the same, so that the brightness tends to be consistent under different frequencies, and the display performance is improved.
In addition, the inventor finds that, referring to table 1, the difference of the initial brightness values corresponding to different frequencies is small when the difference of the pulse widths corresponding to different frequencies is within 0.25 μ s, and the initial picture can be corrected by matching with the same set of regulation data, as can be known by actually measuring the brightness values of 120Hz, 60Hz, and 30Hz at different pulse widths.
TABLE 1
In summary, with the driving method provided in the embodiments of the present invention, when the shift register scans at different frequencies, the duration of the driving period is adjusted by adjusting the pulse distance of the scanning signal, which can avoid the pulse width of the scanning signal from being adjusted greatly, so that the pulse widths corresponding to different frequencies are substantially the same, and thus the writing durations of the data signals are substantially the same, and it is ensured that the original brightness at different frequencies is substantially the same, so that only one set of adjustment data is matched. Therefore, when the frequency is switched, the driving method is simplified, the regulation and control data do not need to be matched again, and the phenomenon of screen flashing is avoided. In addition, the pulse widths corresponding to different frequencies are further finely adjusted, so that the pulse width corresponding to a higher frequency is smaller than the pulse width corresponding to a lower frequency, the problem of inconsistent voltage attenuation degrees of the first node N1 in the light-emitting period can be effectively solved, the light-emitting brightness tends to be consistent under different frequencies, and the display performance is improved.
Furthermore, when the pulse width is not finely adjusted, the difference between the potential drop degree of the first node N1 after being influenced by the leakage current corresponding to the second frequency f2 and the first frequency f1
Wherein, I off Is a leakage current of the thin film transistor, I off ＝10 -12 A～10 -13 A; after the pulse width is finely adjusted, the second frequency f2 corresponds to the first frequency f1 without considering the potential difference of the first node N1 when the influence of the leakage current is not considered (i.e., the potential difference written in the first node N1 before the influence of the leakage current)
Where Δ t is the difference between the second pulse interval L2 and the first pulse interval L1, I on Charging current for thin film transistor, I on ＝10*10 -9 A～100*10 -9 A. In order to better compensate the difference of the potential drop degree of the first node N1 at different frequencies caused by leakage current in order to make the potential difference of the first node N1 at different frequencies generated by fine adjustment of pulse width, the potential of the first node N1 after being affected and attenuated by leakage current at different frequencies tends to be the same, and Δ V2 and Δ V1 can satisfy: Δ V2= k × Δ V1, where 0 < k < 2, and further derives:
note that Δ t corresponding to the first frequency f1 and the second frequency f2 is different in value for the first frequency f1 and the second frequency f 2. For example, when the second frequency f2 is 30Hz and the first frequency f1 is 60Hz, the duration difference between the driving periods corresponding to 30Hz and 60Hz is larger, and therefore, the attenuation degree difference of the first node N1 due to the leakage current is larger, and at this time, the second pulse width W2 needs to be compensated more than the first pulse width W1, that is, Δ t is larger. When the second frequency f2 is 120Hz and the first frequency f1 is 90Hz, the difference between the durations of the scanning cycles corresponding to 90Hz and 120Hz is small, so that the difference between the attenuation degrees of the first node N1 affected by the leakage current is also small, and at this time, the second pulse width W2 can compensate for a little bit less than the first pulse width W1, that is, Δ t is small. And when different frequencies are switched, a proper numerical value can be selected for k according to the size of delta t to be compensated: when the delta t needing to be compensated is larger, k selects a larger value from 0 to 2, and when the delta t needing to be compensated is smaller, k selects a smaller value from 0 to 2.
Optionally, after compensating the second pulse width W2, in the light emitting period, the potential of the first node N1 in the first half time period is decreased to a smaller extent, the potential of the first node N1 is higher, the potential of the first node N1 in the second half time period is decreased to a larger extent, the potential of the first node N1 is lower, and the driving current formula is used according to the driving current formula
It can be seen that, in order to make the luminance average value of the first half period closer to the luminance average value of the second half period and weaken the difference of the luminance within the whole lighting period, the luminance of the first half period is darker and the luminance of the second half period is brighter, so that the luminance of the first half period is closer to the luminance average value of the second half period
Optionally, for the same gray-scale value corresponding to the same color sub-pixel, the second data voltage provided to the data line in the second scanning mode is equal to the first data voltage provided to the data line in the first scanning mode. For the same gray scale value corresponding to the same color sub-pixel, the data voltages provided to the data lines under different frequencies are equal, so that V written in the data signal writing period can be realized Data Are identical, thereby ensuring that the same V is utilized at different frequencies Data The first node N1 is charged, avoiding being charged by V Data The charged first node N1 has a different potential due to the difference.
Further, referring to fig. 5 and 6 again, a time difference H2 between the on-leading edge (the position of the dotted line in fig. 6) of the second Scan signal Scan 'and the second data voltage writing time (the position of the falling edge of the second Scan signal Scan' in fig. 6) is equal to a time difference H1 between the on-leading edge (the position of the dotted line in fig. 5) of the first Scan signal Scan and the first data voltage writing time (the position of the falling edge of the first Scan signal Scan in fig. 5).
It should be noted that, a multi-channel gate is electrically connected between the data line and the driving chip, and when the driving chip provides the data voltage to the data line, the switch control signal is at a low level to control the conduction of the shunt switch in the multi-channel gate, so that the data voltage provided by the driving chip is transmitted to the corresponding data line through the conducted shunt switch. The starting front edge of the scanning signal refers to the moment when the switch control signal jumps low, namely the position of the falling edge of the switch control signal.
Based on the working principle of the pixel circuit, at the starting leading edge of the scanning signal, namely the moment when the switch control signal jumps low, the data signal is transmitted on the data line, the data signal transmitted on the data line is written into the pixel circuit until the falling edge of the scanning signal is started, and the time difference between the starting leading edge of the second scanning signal Scan' and the writing time of the second data voltage is equal to the time difference between the starting leading edge of the first scanning signal Scan and the writing time of the first data voltage, so that the transmission time of the data signal on the data line can be ensured to be the same, the data signal initially written into the pixel circuit is ensured to be the same, and the V for charging the first node N1 under different frequencies caused by different written initial data voltages is avoided Data And different potentials of the first node N1 after charging are avoided.
Optionally, in order to drive the shift register to normally operate and enable the shift register to output the scan signals with corresponding pulse widths at different frequencies, referring to fig. 5 and fig. 6 again, the driving method provided in the embodiment of the present invention further includes: in a first scan mode, providing first clock signals CK and XCK having a first pulse width W1 to the shift register; in the second scan mode, the second clock signals CK 'and XCK' having the second pulse width W2 are supplied to the shift register.
Optionally, the driving method provided in the embodiment of the present invention further includes: in a first scanning mode, the shift register scans at any one first frequency f1 in a first frequency band, and the first pulse width W1 of the first scanning signal Scan output by the shift register at each first frequency f1 in the first frequency band is the same; in the second scanning mode, the shift register scans at any one second frequency f2 in the second frequency band, and the second pulse width W2 of the second scanning signal Scan' output by the shift register at each second frequency f2 in the second frequency band is the same.
Illustratively, the first frequency segment includes 60Hz to 90Hz, in the first scanning mode, the shift register scans at any one of 60Hz to 90Hz, such as 60Hz or 70Hz, and the first pulse width W1 of the first scanning signal Scan output by the shift register at any one of 60Hz to 90Hz is the same. The second frequency segment includes 90Hz to 120Hz, in the second scanning mode, the shift register scans at any frequency of 90Hz to 120Hz, such as 100Hz or 120Hz, and the second pulse width W2 of the second scanning signal Scan' output by the shift register at any frequency of 90Hz to 120Hz is the same.
For similar frequencies, the driving periods are similar in duration, and therefore, the attenuation degree of the potential of the first node N1 under the action of the leakage current is also similar, that is, even if the corresponding pulse widths of the plurality of frequencies in the first frequency segment are the same, the brightness difference is small and can be almost ignored. Therefore, by adopting the above mode, the pulse widths corresponding to the multiple frequencies in one frequency band are the same, and when switching is performed among the multiple frequencies in one frequency band, the pulse width does not need to be adjusted, so that the complexity of the driving method is reduced, and the practicability is improved.
Furthermore, the maximum frequency difference of the plurality of first frequencies f1 in the first frequency segment is less than or equal to 30Hz, and the maximum frequency difference of the plurality of second frequencies f2 in the second frequency segment is less than or equal to 30Hz, so that the difference between the maximum frequency and the minimum frequency in one frequency segment is avoided to be large, and the brightness difference corresponding to different frequencies in the frequency segment is ensured to be small.
Optionally, when the first scanning mode and the second scanning mode are switched, when the percentage Y of the number of sub-pixels displaying a high gray scale to the number of all sub-pixels after the scanning mode is switched is greater than or equal to 50%, the difference between the second pulse width W2 and the first pulse width W1 is Δ t1; when Y is less than 50%, the difference between the second pulse width W2 and the first pulse width W1 is Δ t2. Compared with the display of a low-gray-scale picture, the brightness change caused by the potential drop of the first node N1 is more obvious when a high-gray-scale picture is displayed, so that delta t1 can be smaller than delta t2 in order to realize greater compensation on the high-gray-scale picture. In particular, can be through
And adjusting the size of middle k to realize the adjustment of the sizes of delta t2 and delta t1.
Fig. 7 is a schematic structural diagram of the display panel provided in the embodiment of the present invention, where the display panel includes a shift register 1 and a timing controller 2, where the shift register 1 is used to sequentially output scan signals; the timing controller 2 includes a scan mode control block 3 and a pulse control block 4.
The scan mode control module 3 is electrically connected to the shift register 1, and is configured to drive the shift register 1 to scan at a first frequency f1 in a first scan mode, and drive the shift register 1 to scan at a second frequency f2 in a second scan mode. The pulse control module 4 is electrically connected to the Scan mode control module 3 and the shift register 1, respectively, and is configured to control the shift register 1 to output a first Scan signal Scan having a first pulse interval L1 and a first pulse width W1 in the first Scan mode, and control the shift register 1 to output a second Scan signal Scan' having a second pulse interval L2 and a second pulse width W2 in the second Scan mode. The second frequency f2 is less than the first frequency f1, the second pulse interval L2 is greater than the first pulse interval L1, the second pulse width W2 is greater than the first pulse width W1, and Δ t is less than or equal to 0.25 μ s, and Δ t is the difference between the second pulse width W2 and the first pulse width W1.
By combining the driving method of the display panel in the above embodiment, with the display panel provided in the embodiment of the present invention, when the shift register 1 scans at different frequencies, the pulse control module 4 adjusts the pulse intervals of the scanning signals corresponding to different frequencies, so as to adjust the driving period duration, thereby enabling the pulse widths of the scanning signals corresponding to different frequencies to be substantially the same, that is, enabling the writing durations of the data signals to be substantially the same, ensuring that the original brightness at different frequencies is substantially the same, and only matching one set of control data, thereby simplifying the driving method without re-matching the control data, and avoiding the occurrence of the splash screen phenomenon. In addition, the pulse control module 4 further performs fine adjustment on the pulse widths corresponding to different frequencies, so that the pulse width corresponding to a higher frequency is smaller than the pulse width corresponding to a lower frequency, the problem of inconsistent voltage attenuation degree of the first node N1 in the light-emitting period can be effectively solved, the light-emitting brightness tends to be consistent under different frequencies, and the display performance is improved.
Optionally, in order to drive the shift register 1 to normally operate and enable the shift register 1 to output scan signals with corresponding pulse widths at different frequencies, as shown in fig. 8, fig. 8 is another schematic structural diagram of the display panel provided in the embodiment of the present invention, the timing controller 2 further includes a clock control module 5, the clock control module 5 is electrically connected to the scan mode control module 3 and the shift register 1 respectively, and is configured to provide a first clock signal with a first pulse width W1 to the shift register 1 in the first scan mode and provide a second clock signal with a second pulse width W2 to the shift register 1 in the second scan mode.
As shown in fig. 9, fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention, and the display device includes the display panel 100. The specific structure of the display panel 100 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 9 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
Since the display device provided by the embodiment of the invention includes the display panel 100, when the shift register 1 scans at different frequencies, the first pulse width W1 and the second pulse width W2 are substantially the same, and different frequencies are only matched with one set of regulation data, so that the driving method is simplified, the regulation data does not need to be matched again, and the phenomenon of screen flashing is avoided. In addition, the first pulse width W1 and the second pulse width W2 can be finely adjusted, so that the brightness of the light emitted under different frequencies tends to be consistent, and the display performance is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (12)
1. A method of driving a display panel, comprising:
in a first scanning mode, driving a shift register to scan at a first frequency, so that the shift register outputs a first scanning signal with a first pulse interval and a first pulse width;
in a second scanning mode, driving the shift register to scan at a second frequency, so that the shift register outputs a second scanning signal with a second pulse interval and a second pulse width;
wherein the second frequency is less than the first frequency, the second pulse spacing is greater than the first pulse spacing, the second pulse width is greater than the first pulse width, and Δ t ≦ 0.25 μ s, Δ t being a difference between the second pulse width and the first pulse width;
wherein the display panel includes a pixel circuit, a driving cycle of the pixel circuit including an initialization period, a data signal writing period, and a light emitting period;
in the first scanning mode, when the shift register is driven to scan at the first frequency, in the data signal writing period, the duration of data signal writing is the duration corresponding to the first pulse width;
in the second scanning mode, when the shift register is driven to scan at the second frequency, in the data signal writing period, the data signal writing duration is the duration corresponding to the second pulse width.
2. The driving method according to claim 1,
wherein k is more than 0 and less than 2, f1 is the first frequency, f2 is the second frequency, I off Is leakage current of the thin film transistor, I on The charging current of the thin film transistor.
3. The driving method according to claim 2,
4. the driving method according to claim 1, wherein the second data voltage supplied to the data line in the second scan mode is equal to the first data voltage supplied to the data line in the first scan mode for a same gray scale value corresponding to a same color sub-pixel.
5. The driving method according to claim 4, further comprising:
the time difference between the start leading edge of the second scan signal and the writing time of the second data voltage is equal to the time difference between the start leading edge of the first scan signal and the writing time of the first data voltage.
6. The driving method according to claim 1, further comprising:
in the first scan mode, providing a first clock signal having the first pulse width to the shift register;
in the second scan mode, a second clock signal having the second pulse width is supplied to the shift register.
7. The driving method according to claim 1, further comprising:
in the first scanning mode, the shift register scans at any one of the first frequencies in a first frequency band, and the first pulse width of the first scanning signal output by the shift register at each of the first frequencies in the first frequency band is the same;
in the second scanning mode, the shift register scans at any one of the second frequencies in a second frequency band, and the second pulse width of the second scanning signal output by the shift register at each of the second frequencies in the second frequency band is the same.
8. The driving method according to claim 7, wherein a maximum frequency difference of the plurality of first frequencies in the first frequency band is less than or equal to 30Hz, and a maximum frequency difference of the plurality of second frequencies in the second frequency band is less than or equal to 30Hz.
9. The driving method according to claim 1, wherein the first scanning mode and the second scanning mode are switched, and when Y ≧ 50%, the difference between the second pulse width and the first pulse width is Δ t1; when Y is less than 50%, the difference value between the second pulse width and the first pulse width is delta t2, and delta t1 is less than delta t 2; y is the percentage of the number of the sub-pixels displaying the high gray scale after the scanning mode is switched to the number of all the sub-pixels.
10. A display panel, comprising:
a shift register for sequentially outputting scan signals;
a timing controller, the timing controller comprising:
the scanning mode control module is electrically connected with the shift register and is used for driving the shift register to scan at a first frequency in a first scanning mode and driving the shift register to scan at a second frequency in a second scanning mode;
the pulse control module is respectively electrically connected with the scanning mode control module and the shift register and is used for controlling the shift register to output a first scanning signal with a first pulse interval and a first pulse width in the first scanning mode and controlling the shift register to output a second scanning signal with a second pulse interval and a second pulse width in the second scanning mode;
wherein the second frequency is less than the first frequency, the second pulse spacing is greater than the first pulse spacing, the second pulse width is greater than the first pulse width, and Δ t is less than or equal to 0.25 μ s, Δ t being a difference between the second pulse width and the first pulse width;
wherein the display panel includes a pixel circuit whose drive cycle includes an initialization period, a data signal writing period, and a light emission period;
the pulse control module is configured to, in the first scanning mode, control the shift register to output a first scanning signal having a first pulse interval and a first pulse width, where a duration corresponding to the first pulse width of the first scanning signal is a duration for writing the data signal in the data signal writing period in the first scanning mode;
the pulse control module is configured to control, in the second scan mode, when the shift register outputs a second scan signal having a second pulse interval and a second pulse width, a duration corresponding to the second pulse width of the second scan signal to be a duration for writing the data signal in the data signal writing period in the second scan mode.
11. The display panel according to claim 10, wherein the timing controller further comprises:
and the clock control module is respectively electrically connected with the scanning mode control module and the shift register and is used for providing a first clock signal with the first pulse width to the shift register in the first scanning mode and providing a second clock signal with the second pulse width to the shift register in the second scanning mode.
12. A display device characterized by comprising the display panel according to claim 10 or 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910686863.1A CN110379351B (en) | 2019-07-29 | 2019-07-29 | Display panel driving method, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910686863.1A CN110379351B (en) | 2019-07-29 | 2019-07-29 | Display panel driving method, display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110379351A CN110379351A (en) | 2019-10-25 |
| CN110379351B true CN110379351B (en) | 2022-10-11 |
Family
ID=68256586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910686863.1A Active CN110379351B (en) | 2019-07-29 | 2019-07-29 | Display panel driving method, display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110379351B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110867162B (en) * | 2019-11-28 | 2023-04-14 | 京东方科技集团股份有限公司 | Pixel driving circuit, driving method thereof and display panel |
| CN111179849B (en) * | 2020-01-06 | 2021-03-26 | 京东方科技集团股份有限公司 | Control unit, control circuit, display device and control method thereof |
| CN111477665B (en) * | 2020-04-29 | 2022-08-26 | 湖北长江新型显示产业创新中心有限公司 | Display panel and display device |
| CN113257180B (en) * | 2021-06-08 | 2021-09-24 | 深圳市明微电子股份有限公司 | LED display screen, driving method and device thereof, and computer readable storage medium |
| CN114992768B (en) * | 2022-05-20 | 2023-08-04 | 宁波奥克斯电气股份有限公司 | PWM modulation method and device, air conditioner and readable storage medium |
| TWI825947B (en) * | 2022-08-25 | 2023-12-11 | 友達光電股份有限公司 | Display panel |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100649222B1 (en) * | 2004-06-25 | 2006-11-24 | 삼성에스디아이 주식회사 | Light emitting display apparatus and driving device and method thereof |
| US10614279B2 (en) * | 2017-06-02 | 2020-04-07 | Samsung Electronics Co., Ltd. | Apparatus and method for driving fingerprint sensing array provided in touchscreen, and driver integrated circuit for driving the touchscreen including the fingerprint sensing array |
| CN107819011B (en) * | 2017-09-28 | 2019-12-17 | 维沃移动通信有限公司 | Display screen, mobile terminal and display method |
| CN108735790B (en) * | 2018-05-30 | 2020-11-10 | 武汉天马微电子有限公司 | Display panel, display device and pixel driving method |
| CN108776789B (en) * | 2018-06-05 | 2020-12-04 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
-
2019
- 2019-07-29 CN CN201910686863.1A patent/CN110379351B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN110379351A (en) | 2019-10-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110379351B (en) | Display panel driving method, display panel and display device | |
| CN110827756B (en) | Display panel and display device | |
| CN212907021U (en) | Display pixel and electronic device | |
| KR102509795B1 (en) | Display apparatus, method of driving display panel using the same | |
| KR20240015130A (en) | Display device and driving method thereof | |
| KR102527847B1 (en) | Display apparatus | |
| WO2022095409A1 (en) | Brightness adjustment method, brightness adjustment device, display panel, and display device | |
| US11636790B2 (en) | Display panel and display drive method thereof, and display device | |
| CN113450711B (en) | Display device, driving method thereof and driving device | |
| CN111833802A (en) | Display device | |
| CN114038383B (en) | Display panel, driving method thereof and display device | |
| CN114420032B (en) | Display panel, integrated chip and display device | |
| KR102544572B1 (en) | Display apparatus | |
| KR20200088545A (en) | Display apparatus and method of driving display panel using the same | |
| KR20180003402A (en) | Organic light emitting diode display | |
| US20240078972A1 (en) | Display panel, method for driving display panel, driving circuit and display device | |
| CN111341278A (en) | Overdrive processing method and overdrive device for image data | |
| US8681082B2 (en) | Display device and drive method therefor, and electronic unit | |
| JP2012058351A (en) | Image display device | |
| CN116665592A (en) | Display device and control method thereof | |
| CN114694579B (en) | Display panel and display device | |
| KR20200130610A (en) | Display device | |
| KR20180135405A (en) | Control apparatus of display panel, display apparatus and method of driving display panel | |
| KR20210081959A (en) | Display Device and Driving Method of the same | |
| US20220238066A1 (en) | Driving circuit, driving control method and display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20211029 Address after: No.8, liufangyuan Henglu, Donghu New Technology Development Zone, Wuhan City, Hubei Province Applicant after: WUHAN TIANMA MICRO-ELECTRONICS Co.,Ltd. Applicant after: Wuhan Tianma Microelectronics Co.,Ltd. Shanghai Branch Address before: Room 509, building 1, No. 6111, Longdong Avenue, Pudong New Area, Shanghai, 201201 Applicant before: SHANGHAI TIANMA AM-OLED Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |