CN115331599B - Display panel driving method, display panel and display device - Google Patents

Abstract

The invention discloses a driving method of a display panel, the display panel and a display device, and relates to the technical field of display; the driving method of the display panel comprises the following steps: in a first transition stage, a first power supply voltage signal received by a first power supply voltage signal end generates a first change, and the first change is converted from a first sub-first power supply voltage signal to a second sub-first power supply voltage signal; the second power supply voltage signal received by the second power supply voltage signal end generates second change, and the second change is converted into a second sub-second power supply voltage signal from the first sub-second power supply voltage signal; and the reference voltage signal received by the reference voltage signal end generates a third change, and the third change is converted into a second sub-reference voltage signal from the first sub-reference voltage signal; the first, second and third changes are different in starting time. The arrangement mode avoids the problems of abrupt brightness change and insufficient darkness of the picture display, thereby avoiding picture jitter.

Description

Display panel driving method, display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a driving method of a display panel, and a display device.

Background

In the related art, the driving frequency of the pixels of the display device may be changed according to the display mode. For example, in the normal image display mode, the pixels may be driven at a relatively high frequency, and in the power saving display mode, in which only a small amount of information is displayed, the pixels may be driven at a relatively low frequency.

Currently, those skilled in the art are actively researching how to reduce power consumption of a display device when driving pixels of the display device at a low frequency, while avoiding a problem that a picture is liable to be dithered due to power saving.

Disclosure of Invention

In view of the above, the present invention provides a driving method of a display panel, a display panel and a display device, which are used for improving the problems of large power consumption of the display device when the pixels of the display device are driven at low frequency and easy occurrence of picture shake when the display device is driven by saving power consumption.

In a first aspect, the present application provides a driving method of a display panel, the display panel including a pixel driving circuit, the pixel driving circuit including a first power supply voltage signal terminal, a second power supply voltage signal terminal, and a reference voltage signal terminal;

The display panel comprises a first display mode and a second display mode, and a first transition stage is arranged between the first display mode and the second display mode;

The driving method includes:

In the first transition stage, the first power supply voltage signal received by the first power supply voltage signal receives a first change, and the first change is converted from a first sub-first power supply voltage signal to a second sub-first power supply voltage signal; the second power supply voltage signal received by the second power supply voltage signal end generates a second change, and the second change is converted from a first sub-second power supply voltage signal to a second sub-second power supply voltage signal; and, the reference voltage signal received by the reference voltage signal terminal undergoes a third change, the third change being converted from a first sub-reference voltage signal to a second sub-reference voltage signal;

the first, second, and third changes differ in their starting moments.

In a second aspect, the present application provides a display panel, including a pixel driving circuit including a first power supply voltage signal terminal, a second power supply voltage signal terminal, and a reference voltage signal terminal; the display panel comprises a first display mode and a second display mode, and a first transition stage is arranged between the first display mode and the second display mode;

the pixel driving circuit further comprises a light emitting element and a driving transistor;

The first power supply voltage signal end is electrically connected with the first end of the driving transistor, the second end of the driving transistor is electrically connected with the first end of the light emitting element, the second end of the light emitting element is electrically connected with the second power supply voltage signal end, and the reference voltage signal end is electrically connected with the control end of the driving transistor.

In a third aspect, the present application provides a display device comprising the display panel.

Compared with the prior art, the driving method of the display panel, the display panel and the display device provided by the invention have the advantages that at least the following effects are realized:

The application provides a driving method of a display panel, a display panel and a display device, wherein a first transition stage is included between a first display mode and a second display mode of the display panel, in the first transition stage, a first power voltage signal received by a first power voltage signal end generates a first change, a second power voltage signal received by a second power voltage signal end generates a second change, and a reference voltage signal received by a reference voltage signal end generates a third change; when the display panel is in a display state, the first power supply voltage signal is firstly hopped in the first transition stage, so that the driving transistor in the pixel driving circuit can keep the original working state, the problem of abrupt change of brightness of a display picture is avoided, the problem that the second power supply voltage signal is hopped before the reference voltage signal is further set, the problem that the dark state of the display picture is not dark enough due to the fact that the voltage of the light-emitting element in the pixel driving circuit is greatly changed is avoided, the problem that the display picture is easy to shake when the display panel is hopped from the first display mode to the second display mode is avoided, and the picture display effect of the display panel is improved.

Of course, it is not necessary for any one product embodying the invention to achieve all of the technical effects described above at the same time.

Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic view of a display panel according to the present application;

Fig. 2 is a waveform diagram illustrating an exemplary operation of the display panel according to the present application;

FIG. 3 is a schematic diagram of a pixel driving circuit according to the present application;

FIG. 4 is a waveform diagram illustrating another exemplary operation of the display panel according to the present application

FIG. 5 is a schematic diagram of a pixel driving circuit according to the present application;

fig. 6 is a waveform diagram illustrating another operation example of the display panel according to the present application;

Fig. 7 is a waveform diagram illustrating another operation example of the display panel according to the present application;

Fig. 8 is a waveform diagram illustrating another operation example of the display panel according to the present application;

Fig. 9 is a waveform diagram illustrating another operation example of the display panel according to the present application;

fig. 10 is a waveform diagram illustrating another operation example of the display panel according to the present application;

fig. 11 is a schematic diagram of a display device provided by the present application.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.

The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.

In the prior art, three display modes are commonly used in display panels, specifically, HBM (High Brightness Monitor, high brightness display) mode, normal (Normal) mode, and AOD (Always On Display, off-screen display) mode, and when the display panel is driven in an AOD mode in a power-saving manner, there is a problem of screen shake, so each large panel manufacturer is seeking a method for avoiding the problem of screen shake in the AOD mode.

In the prior art, it is proposed that the HBM mode uses a gamma (display parameter, such as voltage), and the Normal mode and the AOD mode share the same gamma, and the following is provided as an example setting in the prior art.

VGH/V	6
		VGL/V	-6
VGMP/VGSP	5/1.2V
		Vref/V	-3
Normal/AOD PVDD/PVEE	3.3/-3.3V
		HBM PVDD/PVEE	3.5/-3.5V

By adopting the arrangement in the prior art, when the pixel driving circuit is converted from the Normal mode to the AOD mode, the voltage value of the first node is unstable, particularly if high-potential electric leakage exists, the potential of the first node is raised to some extent, so that the picture display brightness of the related sub-pixels is reduced, and the problem of shaking of picture display occurs.

Therefore, it is desirable to provide a technical solution capable of avoiding the first node from being raised, so as to reduce the high-potential leakage, thereby solving the problem of frame shake in the AOD mode.

In view of the above, the present invention provides a driving method of a display panel, a display panel and a display device, which are used for improving the problems of large power consumption of the display device when the pixels of the display device are driven at low frequency and easy occurrence of picture shake when the display device is driven by saving power consumption.

Fig. 1 is a schematic diagram of a display panel according to the present application, fig. 2 is a waveform diagram illustrating an operation example of the display panel according to the present application, and fig. 3 is a schematic diagram of a pixel driving circuit according to the present application; it should be noted that, the wire frame in the lower right corner of the sub-pixel PX in fig. 1 is only used to illustrate one pixel driving circuit 10, and is not used to indicate that pvdd, pvee, vint is electrically connected together, and it is intended to express that three different signal receiving terminals, namely pvdd, pvee, vint, are included in the pixel driving circuit 10; pvdd, pvee, vint are electrically connected to different electrical signal transmission lines (not shown) to receive different electrical signals transmitted by a driving chip (not shown) in the display device.

Referring to fig. 1-3, the present application provides a driving method of a display panel 100, wherein the display panel 100 includes a pixel driving circuit 10, and the pixel driving circuit 10 includes a first power voltage signal terminal pvdd, a second power voltage signal terminal pvee and a reference voltage signal terminal Vint;

The display panel 100 includes a first display mode MD1 and a second display mode MD2, and a first transition period TP1 is included between the first display mode MD1 and the second display mode MD 2;

The driving method comprises the following steps:

In the first transition stage TP1, the first power supply voltage signal received by the first power supply voltage signal terminal pvdd generates a first change Δ1, where the first change Δ1 is converted from the first sub-first power supply voltage signal V31 to the second sub-first power supply voltage signal V32; and, the second power voltage signal received by the second power voltage signal terminal pvee generates a second change Δ2, where the second change Δ2 is converted from the first sub-second power voltage signal V41 to the second sub-second power voltage signal V42; and, the reference voltage signal received by the reference voltage signal terminal Vint generates a third change Δ3, where the third change Δ3 is converted from the first sub-reference voltage signal V51 to the second sub-reference voltage signal V52;

The starting moments (t 1, t2, t 3) of the first, second, and third changes Δ1, Δ2, Δ3 are different.

Specifically, the present application provides a display panel 100, and the display panel 100 may be an organic light emitting display panel or an inorganic light emitting display panel, which is not particularly limited in the present application; for example, the display panel 100 may be implemented as a liquid crystal display panel. The display panel 100 provided by the application comprises a display area 01 and a non-display area 02 surrounding the display area 01, wherein the display area 01 comprises a plurality of (two or more) sub-pixels PX, at least part of the sub-pixels PX are electrically connected with the pixel driving circuit 10, so as to realize the control on whether the corresponding sub-pixels PX are in a display state or not through the electric signals received by the pixel driving circuit 10.

The pixel driving circuit 10 provided by the application at least comprises a first power voltage signal terminal pvdd, a second power voltage signal terminal pvee and a reference voltage signal terminal Vint; the present application does not limit the specific limitation of other signal terminals and components that may be included in the pixel driving circuit 10, and a user may set the overall detailed structure of the pixel driving circuit 10 according to the actual use requirement, so as to realize the control of the sub-pixel PX in the display state and the off state.

It should be noted that the pixel driving circuit 10 includes a light emitting element D1, and the light emitting element may be electrically connected between a first power voltage signal terminal pvdd for supplying a first power voltage signal and a second power voltage signal terminal pvee for supplying a second power voltage signal, where the first power voltage signal and the second power voltage signal may be a high potential voltage and a low potential voltage required for driving the light emitting element D1, respectively; wherein the first power supply voltage signal may have a voltage level greater than a voltage level of the second power supply voltage signal. The light emitting element D1 may be an organic light emitting element or an inorganic light emitting element.

The display panel 100 provided by the present application may include at least two display states (modes), such as a first display mode MD1 and a second display mode MD2, where the first display mode MD1 and the second display mode MD2 may be in different display states, for example, the display panel 100 may be in a normal display state in the first display mode MD1, the display panel 100 may be in a power saving display state in the second display mode MD2, where the power saving display state may specifically be that only a small amount of information such as time, weather, date, and/or notification and related icons are displayed in the display panel 100, and a large area of the display panel 100 is in a screen-inactive state without displaying a screen. The second display mode MD2 herein may minimize power consumption by limiting the maximum brightness of the display panel 100 to a preset brightness or less. For example, the power saving mode may be a normally bright display ("AOD") mode in which simple display information is always displayed, a predetermined display mode in which a screen is displayed with ultra-low brightness in a dark environment, and the like. In which the pixels PX of the display panel 100 may display images at different driving frequencies in the first display mode MD1 and the second display mode MD2, as an example, in the first display mode MD1, the pixels PX may display normal images at a first driving frequency, and in the second display mode MD2, the pixels PX may display power saving images at a second driving frequency smaller than the first driving frequency; the first driving frequency may be equal to or greater than 20Hz (e.g., 60 Hz), and the second driving frequency may be less than 20Hz (e.g., 1 Hz). In the course of the display panel 100 changing from the first display mode MD1 to the second display mode MD2, there is a certain buffering phase for switching the two display states, which is specifically the first transition phase TP1 as shown in fig. 2.

In the first transition stage TP1, the first power voltage signal received by the first power voltage signal terminal pvdd in the pixel driving circuit 10 will have a first change Δ1, the second power voltage signal received by the second power voltage signal terminal pvee will have a second change Δ2, and the reference voltage signal received by the reference voltage signal terminal Vint will have a third change Δ3; the first change Δ1 is specifically that the first sub-first power voltage signal V31 is converted into the second sub-first power voltage signal V32, and the voltage value of the first sub-first power voltage signal V31 is different from the voltage value of the second sub-first power voltage signal V32; the second change Δ2 is specifically that the first sub-second power supply voltage signal V41 is converted into the second sub-second power supply voltage signal V42, and the voltage value of the first sub-second power supply voltage signal V41 is different from the voltage value of the second sub-second power supply voltage signal V42; the third variation Δ3 is specifically that the first sub-reference voltage signal V51 is converted into the second sub-reference voltage signal V52, and the voltage value of the first sub-reference voltage signal V51 is different from the voltage value of the second sub-reference voltage signal V52. The application proposes that the starting moments (t 1, t2, t 3) at which the first, second and third changes Δ1, Δ2, Δ3 occur are different.

The present application provides an alternative embodiment, in which the first display mode MD1 and the second display mode MD2 are displayed with a picture, that is, at least a part of the area in the first display mode MD1 and the second display mode MD2 is always displayed with a picture, and then the sub-pixels PX in the area are always in a display state. The application sets the initial time t1 when the first change delta 1 occurs earliest, that is, the voltage value corresponding to the first power supply voltage signal changes first in the first transition stage TP1, so that the first node N1 included in the corresponding pixel driving circuit 10 can still keep the original working state of the driving transistor M3 in the pixel driving circuit 10 through coupling, and the potential of the first node N1 is prevented from being raised, so that the light-emitting current flowing through the light-emitting element corresponding to the sub-pixel PX is more stable, and the sub-pixel PX can be in a relatively stable display state. In addition, if the second power voltage signal changes in voltage value earlier than the first power voltage signal in the first transition stage TP1, the driving transistor M3 is likely to enter the linear region, resulting in abrupt brightness change; therefore, the first power voltage signal is set to first change by Δ1 in the first transition stage TP1, so that the problem that the display screen has abrupt brightness change when the display panel 100 is switched from the first display mode MD1 to the second display mode MD2 can be avoided, thereby being beneficial to ensuring the display stability of the display panel 100.

Furthermore, if the reference voltage signal changes in voltage value before the second power voltage signal in the first transition stage TP1, the voltage value received by the light emitting element D1 in the pixel driving circuit 10 becomes larger in cross voltage, which easily causes the problem that the dark state is not dark enough and is relatively bright when the partial area of the display panel 100 is changed from the bright state to the dark state; therefore, the application is arranged in the first transition stage TP1, after the voltage value of the first power supply voltage signal changes, the voltage value of the second power supply voltage signal changes and the voltage value of the reference voltage signal changes in sequence, which is favorable for ensuring that the display effect of the picture can reach the display effect wanted by the user, avoiding the problems of dark state and excessive bright display of partial area, and thus being favorable for improving the display effect of the display panel 100.

In summary, when the pixel driving circuit 10 in the display panel 100 includes the first power voltage signal terminal pvdd, the second power voltage signal terminal pvee and the reference voltage signal terminal Vint, the start time t1 of the change of the voltage signal received by the first power voltage signal terminal pvdd in the first transition stage TP1 of the display panel 100 is regulated to be earliest, and the start time t2 of the change of the voltage signal received by the second power voltage signal terminal pvee is later than the start time t3 of the change of the voltage signal received by the reference voltage signal terminal Vint; in this way, by sequentially adjusting the starting moments of the voltage signal changes of the first power supply voltage signal, the second power supply voltage signal and the reference voltage signal in the pixel driving circuit 10 in the first transition stage TP1, that is, the starting moments (t 1, t2 and t 3) of the first change Δ1, the second change Δ2 and the third change Δ3, the problem that the luminance of the sub-pixel PX is suddenly changed can be avoided, the problem that the dark state display of the sub-pixel PX is not dark enough and is bright instead can be avoided, the stability of the picture display is improved, and the good display effect is ensured when the display panel 100 is converted from the first display mode MD1 to the second display mode MD 2.

With continued reference to fig. 1-3, the pixel driving circuit 10 further includes a light emitting element D1 and a driving transistor M3; the first power voltage signal terminal pvdd is electrically connected to the first terminal of the driving transistor M3, the second terminal of the driving transistor M3 is electrically connected to the first terminal of the light emitting element D1, the second terminal of the light emitting element D1 is electrically connected to the second power voltage signal terminal pvee, and the reference voltage signal terminal Vint is electrically connected to the control terminal of the driving transistor M3;

The absolute value of the voltage value of the first sub-first power supply voltage signal V31 is smaller than the absolute value of the voltage value of the second sub-first power supply voltage signal V32;

the absolute value of the voltage value of the first sub-second power supply voltage signal V41 is smaller than the absolute value of the voltage value of the second sub-second power supply voltage signal V42;

The absolute value of the voltage value of the first sub-reference voltage signal V51 is smaller than the absolute value of the voltage value of the second sub-reference voltage signal V52.

Specifically, the pixel driving circuit 10 provided by the present application further includes a light emitting element D1 and a driving transistor M3 in addition to the first power voltage signal terminal pvdd, the second power voltage signal terminal pvee and the reference voltage signal terminal Vint. Here, the specific structure of the pixel driving circuit 10 provided by the present application is that the first end of the driving transistor M3 is electrically connected to the first power voltage signal end pvdd, the second end of the driving transistor M3 is electrically connected to the first end of the light emitting element D1, the control end of the driving transistor M3 is electrically connected to the reference voltage signal end Vint, and the second end of the light emitting element D1 is electrically connected to the second power voltage signal end pvee; the reference voltage signal terminal Vint and the control terminal of the driving transistor M3 include a first node N1 therebetween.

In the driving method of the display panel 100 provided by the present application, in the first transition stage TP1, the proposed first power voltage signal generates a first change Δ1, and the first change Δ1 is specifically that the first sub-first power voltage signal V31 is converted into the second sub-first power voltage signal V32, where an embodiment is provided, in which an absolute value of a voltage value of the first sub-first power voltage signal V31 is set smaller than an absolute value of a voltage value of the second sub-first power voltage signal V32; the proposed second power supply voltage signal is subjected to a second change Δ2, the second change Δ2 is specifically converted from the first sub-second power supply voltage signal V41 to the second sub-second power supply voltage signal V42, and an embodiment is provided herein, in which the absolute value of the voltage value of the first sub-second power supply voltage signal V41 is set smaller than the absolute value of the voltage value of the second sub-second power supply voltage signal V42; the proposed reference voltage signal undergoes a third change Δ3, the third change Δ3 being in particular a conversion from the first sub-reference voltage signal V51 to the second sub-reference voltage signal V52, an embodiment being provided here in which the absolute value of the voltage value of the first sub-reference voltage signal V51 is set smaller than the absolute value of the voltage value of the second sub-reference voltage signal V52.

By the above driving method, in the second display mode MD2 (AOD mode), the Normal voltage setting is not used, but the first power voltage signal, the second power voltage signal, and the reference voltage signal higher than those of the first display mode MD1 (Normal mode) are used; the voltage of the first power voltage signal is adjusted to be higher than the Normal voltage, so that the potential of the first node N1 is raised under the same brightness of the sub-pixel PX, and the voltage difference between the high potential and the first node N1 is smaller than the setting of the AOD in the prior art, thereby reducing the high potential leakage problem, and being beneficial to solving the jitter problem existing in the AOD mode.

That is, the present application adopts the setting that the voltage of the first power voltage signal terminal pvdd in the AOD mode is higher than the voltage of the first power voltage signal terminal pvdd in the Normal mode by changing the conventional common mode (i.e. the common voltage) of the Normal mode and the AOD mode; an alternative arrangement is provided herein, in which the voltage of the first supply voltage signal terminal pvdd in the AOD mode is set to be the same as the voltage of the first supply voltage signal terminal pvdd in the highlight mode, so that the problem of screen shake can be improved, and the display effect of the display panel 100 can be improved.

With continued reference to fig. 1-3, optionally, the start time t2 of the second change Δ2 is between the start time t1 of the first change Δ1 and the start time t3 of the third change Δ3, and the start time t1 of the first change Δ1 is located before the start time t2 of the second change Δ2.

Specifically, the present application provides an alternative embodiment, in which the first display mode MD1 and the second display mode MD2 are displayed in a picture, that is, at least a part of the area in the first display mode MD1 and the second display mode MD2 is always displayed in a picture, and then the sub-pixels PX in the area are always in a display state. The application sets the initial time t1 when the first change delta 1 occurs earliest, that is, the voltage value corresponding to the first power supply voltage signal changes first in the first transition stage TP1, so that the first node N1 in the corresponding pixel driving circuit 10 can still keep the original working state of the driving transistor M3 in the pixel driving circuit 10 through coupling, and the potential of the first node N1 is prevented from being raised, so that the sub-pixel PX can be in a relatively stable display state. If the second power voltage signal changes in voltage value earlier than the first power voltage signal in the first transition stage TP1, the driving transistor M3 is likely to enter the linear region, resulting in abrupt brightness change; therefore, the first power voltage signal is set to first change by Δ1 in the first transition stage TP1, so that the problem that the display screen has abrupt brightness change when the display panel 100 is switched from the first display mode MD1 to the second display mode MD2 can be avoided, thereby being beneficial to ensuring the display stability of the display panel 100. Furthermore, if the reference voltage signal changes in voltage value before the second power voltage signal in the first transition stage TP1, the voltage value received by the light emitting element D1 in the pixel driving circuit 10 becomes larger in cross voltage, which easily causes the problem that the dark state is not dark enough and is relatively bright when the partial area of the display panel 100 is changed from the bright state to the dark state; therefore, the application is arranged in the first transition stage TP1, after the voltage value of the first power supply voltage signal changes, the voltage value of the second power supply voltage signal changes and the voltage value of the reference voltage signal changes in sequence, which is favorable for ensuring that the display effect of the picture can reach the display effect wanted by the user, avoiding the problems of dark state and excessive bright display of partial area, and thus being favorable for improving the display effect of the display panel 100.

That is, in the present application, when the pixel driving circuit 10 in the display panel 100 includes the first power voltage signal terminal pvdd, the second power voltage signal terminal pvee and the reference voltage signal terminal Vint, the starting time t1 of the change of the voltage signal received by the first power voltage signal terminal pvdd in the first transition stage TP1 of the display panel 100 is regulated to be earliest, and the starting time t2 of the change of the voltage signal received by the second power voltage signal terminal pvee is later than the starting time t3 of the change of the voltage signal received by the reference voltage signal terminal Vint; in this way, the first power voltage signal, the second power voltage signal and the reference voltage signal in the pixel driving circuit 10 are sequentially cured at the starting time when the voltage signal changes in the first transition stage TP1, so that the problem of abrupt brightness change of the sub-pixels PX can be avoided, the problem that dark state display of the sub-pixels PX is not dark enough and is bright instead can be avoided, the stability of picture display is improved, and when the display panel 100 is converted from the first display mode MD1 to the second display mode MD2, the good display effect is ensured, and the user experience is improved.

Fig. 4 is a waveform diagram illustrating another operation example of the display panel according to the present application, and referring to fig. 1 and fig. 3-4, optionally, a termination time t5 of the second change Δ2 is between a termination time t4 of the first change Δ1 and a termination time t6 of the third change Δ3, where the termination time t4 of the first change Δ1 is located before the termination time t5 of the second change Δ2.

Specifically, for the same pixel driving circuit 10, in the first transition period TP1 between the first display mode MD1 and the second display mode MD2, the duration W1 of the first change Δ1 of the first power supply voltage signal received by the first power supply voltage signal terminal pvdd and the duration W2 of the second change Δ2 of the second power supply voltage signal received by the second power supply voltage signal terminal pvee, and the duration W3 of the third change Δ3 of the reference voltage signal received by the reference voltage signal terminal Vint are substantially the same, or may be set to be completely the same. Since the first power voltage signal received by the first power voltage signal terminal pvdd generates the first change Δ1 before the second power voltage signal received by the second power voltage signal terminal pvee generates the second change Δ2, and then the second power voltage signal received by the second power voltage signal terminal pvee generates the second change Δ2 before the reference voltage signal received by the reference voltage signal terminal Vint generates the third change Δ3, correspondingly, the ending time t5 of the second change Δ2 may be set to occur after the ending time t4 of the first change Δ1, and the ending time t6 of the third change Δ3 may be set to occur after the ending time t5 of the second change Δ2. By the arrangement, the time length W1 of the first power voltage signal received by the first power voltage signal end pvdd when the first power voltage signal is subjected to the first change delta 1 is enough, the time length W2 of the second power voltage signal received by the second power voltage signal end pvee when the second power voltage signal is subjected to the second change delta 2 is enough, and the time length W3 of the reference voltage signal received by the reference voltage signal end Vint when the reference voltage signal is subjected to the third change delta 3 is enough, so that the pixel driving circuit 10 can have a normal driving process, the problem that the brightness mutation of the sub-pixels PX is easy to occur when the display panel 100 is converted from the first display mode MD1 to the second display mode MD2 is solved, the problems that the dark state display of the sub-pixels PX is not dark enough and is bright are avoided, the stability of the picture display is improved, and the good display effect of the display panel 100 is ensured.

Referring to fig. 2 and 4, optionally, at least one of the first change Δ1, the second change Δ2, and the third change Δ3 is a linear change.

Specifically, the present application provides an alternative embodiment, in which, in the first transition stage TP1 between the first display mode MD1 and the second display mode MD2, the first change Δ1 of the first power voltage signal received by the first power voltage signal terminal pvdd may be set to be a linear change, and/or the second change Δ2 of the second power voltage signal received by the second power voltage signal terminal pvee may be set to be a linear change, and/or the third change Δ3 of the reference voltage signal received by the reference voltage signal terminal Vint may be set to be a linear change.

The adjustment of the first power voltage signal, the second power voltage signal and the reference voltage signal is performed after one frame of the first display mode MD1 is finished and before one frame of the second display mode MD2 is started, at least one of the three signals is selected to be changed linearly, at least one of the three signals is changed slowly in the first transition stage TP1, the signal size is adjusted slowly, and the small change of the display brightness of the sub-pixel PX corresponding to the corresponding pixel driving circuit 10 is not recognized by eyes of a user, so that the good display effect of the display panel 100 can be improved.

Furthermore, the first power voltage signal, the second power voltage signal, and the reference voltage signal may be set to be gradually changed in the first transition stage TP1, so as to further facilitate stability of the display effect of the display panel 100.

Fig. 5 is another schematic diagram of the pixel driving circuit provided by the present application, please also combine with fig. 5, it should be added that, due to the process fluctuation, the capacitance included in the pixel driving circuit 10 is different, the parasitic capacitance between the first node N1 and the first power voltage signal terminal pvdd in the pixel driving circuit 10, the capacitance between the first node N1 and other nodes (the second node N2, the third node N3, and the fourth node N4) in the pixel driving circuit 10 are also different, if the first power voltage signal suddenly changes, the voltage difference of the driving transistor M3 is suddenly changed, and the position variation is different, so that the current variation passing through the driving transistor M3 is different (i.e. the brightness variation is different), the screen is flickering and is easily perceived by human eyes; the first change delta 1 adopts linear change to display the noninductive switching of the picture display state, and the slow rising of the voltage value of the first power supply voltage signal can avoid the problem of screen flicker.

Fig. 6 is a waveform diagram illustrating another operation example of the display panel according to the present application, referring to fig. 1,3, 5, and 6, optionally, at least one of the first variation Δ1, the second variation Δ2, and the third variation Δ3 is a step-like uniform variation.

Specifically, the present application provides an alternative embodiment that, in the first transition period TP1 between the first display mode MD1 and the second display mode MD2, the first change Δ1 of the first power voltage signal received by the first power voltage signal terminal pvdd may be set to be uniformly stepped, and/or the second change Δ2 of the second power voltage signal received by the second power voltage signal terminal pvee may be set to be uniformly stepped, and/or the third change Δ3 of the reference voltage signal received by the reference voltage signal terminal Vint may be set to be uniformly stepped.

The adjustment of the first power voltage signal, the second power voltage signal and the reference voltage signal is performed after one frame of the first display mode MD1 is finished and before one frame of the second display mode MD2 is started, at least one of the three signals is selected to be uniformly changed in a step manner, so that at least one of the three signals is gradually and uniformly adjusted in a rising manner in the first transition stage TP1, and the slight change of the display brightness of the sub-pixel PX corresponding to the corresponding pixel driving circuit 10 is not recognized by eyes of a user, thereby improving the good display effect of the display panel 100.

Furthermore, the first power voltage signal, the second power voltage signal, and the reference voltage signal may be selectively set to be gradually and uniformly adjusted in the first transition stage TP1, so as to further facilitate stability of the display effect of the display panel 100.

It should be added that the first change Δ1, the second change Δ2, and the third change Δ3 respectively correspond to the step-like uniform change, and specifically, the height of each step is the same, and the width of each step is the same, so that the adjustment speed of the electric signal is more uniform and stable.

Fig. 7 is a waveform diagram of another operation example of the display panel provided by the present application, referring to fig. 1, 3, 5, and 7, in addition, at least one of the first change Δ1, the second change Δ2, and the third change Δ3 may also be a direct transition, that is, the first power voltage signal may be directly converted from the first sub-first power voltage signal V31 to the second sub-first power voltage signal V32 at a certain time in the first transition stage TP 1; and/or the second supply voltage signal may be directly converted from the first sub-second supply voltage signal V41 to the second sub-second supply voltage signal V42 at a certain moment in the first transition stage TP 1; and/or the reference voltage signal may be directly converted from the first sub-reference voltage signal V51 to the second sub-reference voltage signal V52 at a certain moment in the first transition period TP 1. It should be added that the first change Δ1, the second change Δ2, and the third change Δ3 need to be guaranteed to be voltage signal changes in sequence, so as to avoid the problem of abrupt brightness change, and avoid the problem of insufficient darkness of local dark state, ensure the display effect of the display panel 100, and avoid the problem of screen shake.

It should be further added that, due to the process fluctuation, the capacitance included in the pixel driving circuit 10 may be different, the parasitic capacitance between the first node N1 and the first power voltage signal terminal pvdd in the pixel driving circuit 10, the capacitance between the first node N1 and other nodes in the pixel driving circuit 10 may also be different, if the first power voltage signal suddenly changes, the voltage difference of the driving transistor M3 may be suddenly changed, and the position of the driving transistor M3 may be different, so that the current change (i.e., the brightness change) through the driving transistor M3 may be different in a shorter time, and the screen may flicker and may be easily perceived by human eyes; the first change delta 1 adopts step-type uniform change to display the noninductive switching of the picture display state, and the problem of screen flicker can be avoided by slowly rising the voltage value of the first power supply voltage signal.

Fig. 8 is a waveform diagram illustrating another operation example of the display panel provided by the present application, referring to fig. 1,3, 5, and 8, optionally, the display panel 100 further includes at least one highlighting mode MD3;

The first display mode MD1 is a normal display mode MD1, and the second display mode MD2 is a power saving display mode MD2;

The normal display mode MD1 is included between the power saving display mode MD2 and the highlighting display mode MD 3.

Specifically, as mentioned above, the display panel 100 is in the first display mode MD1, may be specifically in the normal display mode MD1, and the display panel 100 is in the second display mode MD2, may be specifically in the power saving display mode MD2; in addition to these two real states, a highlighting mode MD3 may be further included.

The present application provides a possible embodiment, in which a need exists for the display panel 100 to jump from the power saving display mode MD2 to the high brightness display mode MD3, and the display panel 100 needs to be set to jump from the power saving display mode MD2 to the normal display mode MD1 and then from the normal display mode MD1 to the high brightness display mode MD3, so that the display brightness of the display panel 100 can be changed slowly, the irritation to eyes of a user caused by suddenly jumping from the power saving display mode MD2 to the high brightness display mode MD3 is avoided, and the damage problem of the display panel 100 caused by suddenly jumping from the power saving display mode MD2 to the high brightness display mode MD3 is avoided, thereby being beneficial to improving the display effect of the display panel 100 and prolonging the service life of the display panel 100.

Fig. 9 is a waveform diagram illustrating another operation example of the display panel according to the present application, referring to fig. 1,3, 5, and 9, optionally, the first display mode MD1 includes a plurality of continuous Frame periods, each Frame period including a Blank region V-Blank;

When the first display mode MD1 is changed to the second display mode MD2, the first change Δ1 includes a plurality of first sub-changes (Δ11/Δ12/Δ13/Δ14), which occur in each Blank region V-Blank and the first transition period TP1; the second variation Δ2 comprises a plurality of second sub-variations (Δ21/Δ22/Δ23/Δ24) which occur in each Blank region V-Blank and in the first transition phase TP1; the third variation Δ3 comprises a plurality of third sub-variations (Δ31/Δ32/Δ33/Δ34) which occur in each Blank region V-Blank and in the first transition stage TP1.

Specifically, the present application provides an alternative embodiment, in which the first display mode MD1 includes a plurality of consecutive Frame periods, instead of only one Frame period, where a Blank area V-Blank exists in each Frame period; it may be provided that when the first display mode MD1 is changed to the second display mode MD2, the first change Δ1 of the first power voltage signal received by the first power voltage signal terminal pvdd may include a plurality of first sub-changes (Δ11/Δ12/Δ13/Δ14), where one first sub-change (Δ14) occurs in the first transition period TP1, and the other first sub-changes (Δ11/Δ12/Δ13) occur in the Blank area V-Blank included in each Frame period Frame, respectively. Accordingly, the second variation Δ2 of the second power voltage signal received by the second power voltage signal terminal pvee may also include a plurality of second sub-variations (Δ21/Δ22/Δ23/Δ24), where one second sub-variation (Δ24) occurs in the first transition period TP1, and the other second sub-variations (Δ21/Δ22/Δ23) occur in the Blank region V-Blank included in each Frame period Frame, respectively. Correspondingly, a plurality of third sub-changes (Δ31/Δ32/Δ33/Δ34) of the third variation Δ3 of the reference voltage signal received by the reference voltage signal terminal Vint may be set, where one third sub-change (Δ34) occurs in the first transition period TP1, and the other third sub-changes (Δ31/Δ32/Δ33) occur in the Blank region V-Blank included in each Frame period Frame, respectively.

So configured, when the first display mode MD1 is shifted to the second display mode MD2, switching of the voltage signal magnitude is dispersed into a plurality of frames; for example, when the first power voltage signal needs to be adjusted from 1V to 3V, if the first power voltage signal includes 4 first sub-changes (Δ11/Δ12/Δ13/Δ14), the first power voltage signal may be adjusted from 1V to 1.4V at the end time of the 1 st first sub-change Δ11, the first power voltage signal may be adjusted from 1.4V to 1.9V at the end time of the 2 nd first sub-change Δ12, the first power voltage signal may be adjusted from 1.9V to 2.5V at the end time of the 3 rd first sub-change Δ13, and the first power voltage signal may be adjusted from 2.5V to 3V at the end time of the 4 th first sub-change Δ14, so as to enable the display screen to be slowly adjusted from the first display mode MD1 to the second display mode MD2, and enable the display effect of the display panel 100 in different display modes to be more smooth, thereby enabling the user to easily accept the display effect in different display modes.

Similarly, except that the first power voltage signal is changed according to the above embodiment, when the first display mode MD1 is changed to the second display mode MD2, the change of the voltage value of the second power voltage signal may be dispersed into multiple frames to be implemented, and the change of the voltage value of the reference voltage signal may be dispersed into multiple frames to be implemented, which is not described herein again.

It should be noted that, the number of continuous Frame periods frames included in the first display mode MD1 is not limited in the present application; when the first display mode MD1 is shifted to the second display mode MD2, the number of first sub-changes (Δ11/Δ12/Δ13/Δ14) included in the first change Δ1 may be the same as or less than the number of consecutive Frame periods Frame plus the first transition period TP1, which is not particularly limited in the present application. Accordingly, the number of the second sub-changes (Δ21/Δ22/Δ23/Δ24) included in the second change Δ2 and the number of the third sub-changes (Δ31/Δ32/Δ33/Δ34) included in the third change Δ3 are not limited, and the number of the first sub-changes (Δ11/Δ12/Δ13/Δ14) included in the first change Δ1, the number of the second sub-changes (Δ21/Δ22/Δ23/Δ24) included in the second change Δ2 and the number of the third sub-changes (Δ31/Δ32/Δ33/Δ34) included in the third change Δ3 may be adjusted according to the requirements in the specific design.

In addition, the present application is not specifically limited to the first sub-changes included in the first change Δ1 in which the Blank area V-Blank of the Frame period exists, and the user may make relevant adjustments according to specific design requirements. Accordingly, the second sub-variations Δ2 include a plurality of second sub-variations that exist in the Blank region V-Blank of the Frame of which Frame period, and that do not exist in the Blank region V-Blank of the Frame of which Frame period, and may be adjusted according to specific design requirements. Accordingly, the third sub-variations Δ3 include a plurality of third sub-variations that exist in the Blank region V-Blank of the Frame of which Frame period, and that do not exist in the Blank region V-Blank of the Frame of which Frame period, and may be adjusted according to specific design requirements.

The Blank area V-Blank is a period in which sub-pixels in a frame of picture display do not display images, and the voltage level of electric signals such as a first power supply voltage signal is quickly changed in the period, so that the brightness difference of the images in a display state caused by the reduction of the first power supply voltage signal can be prevented from being recognized by a user; the first transition stage TP1 is also a stage that is not used for image display, and in this period, the voltage level of the electrical signal such as the first power voltage signal is quickly changed, so that the brightness difference of the image can be prevented from being recognized by the user when the first display mode MD1 is converted into the second display mode MD2 due to the change of the electrical signal voltage.

Fig. 10 is a waveform diagram illustrating another operation example of the display panel according to the present application, and referring to fig. 1,3, 5, and 10, alternatively, the variation of each first sub-variation (Δ11/Δ12/Δ13/Δ14) is the same, the variation of each second sub-variation (Δ21/Δ22/Δ23/Δ24) is the same, and the variation of each third sub-variation (Δ31/Δ32/Δ33/Δ34) is the same.

Specifically, an alternative embodiment is provided in the present application, the amounts of change of each first sub-change (Δ11/Δ12/Δ13/Δ14) are the same, the amounts of change of each second sub-change (Δ21/Δ22/Δ23/Δ24) are the same, and the amounts of change of each third sub-change (Δ31/Δ32/Δ33/Δ34) are the same, so that when the first display mode MD1 is converted into the second display mode MD2, the first change Δ1, the second change Δ2, and the third change Δ3 all occur slowly in a little by little in consecutive different Frame periods Frame, so that the changes between different display modes of the display panel 100 are smoother and more uniform, and the display effect of the user in different display modes of the display panel 100 is more acceptable, and the use experience of the user is improved.

It should be further noted that the present application is not limited to the specific case at the starting time of the first sub-variation Δ11, the second sub-variation Δ21, and the third sub-variation Δ31; that is, the starting times of the first sub-change Δ11, the second sub-change Δ21, and the third sub-change Δ31 may be set to occur sequentially, or the starting times of the first sub-change Δ11, the second sub-change Δ21, and the third sub-change Δ31 may be set to occur simultaneously, as long as the starting times of the first sub-change Δ11, the second sub-change Δ21, and the third sub-change Δ31 in the first transition stage TP1 are ensured to occur sequentially.

With continued reference to fig. 1, 3, 5, 9, and 10, optionally, the first display mode MD1 includes a number of frames of consecutive frames K, where K is 3 and 6, and K is an integer.

Specifically, the present application provides an alternative embodiment, in which the number of frames of the plurality of consecutive Frame periods included in the first display mode MD1 is between 3 and 6 (including the origin value) to adjust the voltage signal through the time of 3 to 6 Frame periods. The first display mode MD1 described herein includes 3-6 Frame periods, and is not limited to the display panel 100 being capable of only 3-6 Frame periods when the first display mode MD1 is changed from the first display mode MD1 to the second display mode MD2, but the first display mode MD1 may include a Blank area V-Blank of 3-6 Frame periods for slow adjustment of the first, second and third changes Δ1, Δ2, Δ3, and the 3-6 Frame periods Frame are 3-6 Frame periods near one side of the second display mode MD 2.

Referring to fig. 1, fig. 2, and fig. 5, based on the same inventive concept, the present application further provides a display panel 100, including a pixel driving circuit 10, wherein the pixel driving circuit 10 includes a first power voltage signal terminal pvdd, a second power voltage signal terminal pvee, and a reference voltage signal terminal Vint; the display panel 100 includes a first display mode MD1 and a second display mode MD2, and a first transition period TP1 is included between the first display mode MD1 and the second display mode MD 2;

the pixel driving circuit 10 further includes a light emitting element D1, a driving transistor M3;

The first power voltage signal terminal pvdd is electrically connected to the first terminal of the driving transistor M3, the second terminal of the driving transistor M3 is electrically connected to the first terminal of the light emitting element D1, the second terminal of the light emitting element D1 is electrically connected to the second power voltage signal terminal pvee, and the reference voltage signal terminal Vint is electrically connected to the control terminal of the driving transistor M3.

Specifically, the present application provides a display panel 100, where the display panel 100 includes a display area 01 and a non-display area 02 surrounding the display area 01, the display area 01 includes two or more sub-pixels PX, at least some of the sub-pixels PX are electrically connected to a pixel driving circuit 10, so as to implement control on whether the corresponding sub-pixels PX are in a display state or not through an electrical signal received by the pixel driving circuit 10.

The pixel driving circuit 10 provided by the application at least comprises a first power voltage signal terminal pvdd, a second power voltage signal terminal pvee, a reference voltage signal terminal Vint, a light emitting element D1 and a driving transistor M3; the present application does not limit the specific limitation of other signal terminals and components that may be included in the pixel driving circuit 10, and a user may set the overall detailed structure of the pixel driving circuit 10 according to the actual use requirement, so as to realize the control of the sub-pixel PX in the display state and the off state.

The display panel 100 provided by the present application may include at least two display states, such as a first display mode MD1 and a second display mode MD2, where the first display mode MD1 and the second display mode MD2 may be in different display states, for example, the display panel 100 in the first display mode MD1 is in a normal display state, the display panel 100 in the second display mode MD2 is in a power saving display state, and the power saving display state may specifically be that only a small amount of information such as time and/or weather, date and/or notification and related icons are displayed in the display panel 100, and a large area of the display panel 100 is in a state of not displaying a picture. In the process of changing the display panel 100 from the first display mode MD1 to the second display mode MD2, there is a certain buffering stage, specifically, the first transition stage TP1.

In the pixel driving circuit 10 provided by the application, the first end of the driving transistor M3 is electrically connected to the first power voltage signal end pvdd, the second end of the driving transistor M3 is electrically connected to the first end of the light-emitting element D1, the control end of the driving transistor M3 is electrically connected to the reference voltage signal end Vint, and the second end of the light-emitting element D1 is electrically connected to the second power voltage signal end pvee; the reference voltage signal terminal Vint and the control terminal of the driving transistor M3 include a first node N1 therebetween.

Fig. 11 is a schematic diagram of a display device according to the present application, please refer to fig. 11 in conjunction with fig. 1-10, and based on the same inventive concept, a display device 200 is further provided, wherein the display device 200 includes a display panel 100, and the display panel 100 is any one of the display panels 100 according to the present application.

It should be noted that, in the embodiment of the display device 200 provided in the embodiment of the present application, reference may be made to the embodiment of the display panel 100 described above, and repeated description is omitted. The display device 200 provided by the present application may be: any products and components with display function such as mobile phones, tablet computers, televisions, displays, notebook computers, navigator and the like.

As can be seen from the above embodiments, the driving method of the display panel, the display panel and the display device provided by the invention at least realize the following beneficial effects:

The application provides a driving method of a display panel, a display panel and a display device, wherein a first transition stage is included between a first display mode and a second display mode of the display panel, in the first transition stage, a first power voltage signal received by a first power voltage signal end generates a first change, a second power voltage signal received by a second power voltage signal end generates a second change, and a reference voltage signal received by a reference voltage signal end generates a third change; when the display panel is in a display state, the first power supply voltage signal is firstly hopped in the first transition stage, so that the driving transistor in the pixel driving circuit can keep the original working state, the problem of abrupt change of brightness of a display picture is avoided, the subsequent step of hopping the second power supply voltage signal before the reference voltage signal is set, the problem that the dark state of the display picture is not dark enough due to the fact that the voltage of the light-emitting element in the pixel driving circuit is larger is avoided, the problem that the display picture is easy to shake when the display panel is hopped from a first display mode to a second display mode is avoided, and the picture display effect of the display panel is improved.

While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (11)

1. The driving method of the display panel is characterized in that the display panel comprises a pixel driving circuit, and the pixel driving circuit comprises a first power supply voltage signal end, a second power supply voltage signal end and a reference voltage signal end;

The display panel comprises a first display mode and a second display mode, and a first transition stage is arranged between the first display mode and the second display mode;

The driving method includes:

In the first transition stage, the first power supply voltage signal received by the first power supply voltage signal receives a first change, and the first change is converted from a first sub-first power supply voltage signal to a second sub-first power supply voltage signal; the second power supply voltage signal received by the second power supply voltage signal end generates a second change, and the second change is converted from a first sub-second power supply voltage signal to a second sub-second power supply voltage signal; and, the reference voltage signal received by the reference voltage signal terminal undergoes a third change, the third change being converted from a first sub-reference voltage signal to a second sub-reference voltage signal;

The starting moments of the first change, the second change and the third change are different;

The first display mode is a normal display mode, and the second display mode is a power-saving display mode;

The pixel driving circuit further comprises a light emitting element and a driving transistor; the first power supply voltage signal end is electrically connected with the first end of the driving transistor, the second end of the driving transistor is electrically connected with the first end of the light-emitting element, the second end of the light-emitting element is electrically connected with the second power supply voltage signal end, and the reference voltage signal end is electrically connected with the control end of the driving transistor;

the absolute value of the voltage value of the first sub-first power supply voltage signal is smaller than the absolute value of the voltage value of the second sub-first power supply voltage signal;

The absolute value of the voltage value of the first sub-second power supply voltage signal is smaller than the absolute value of the voltage value of the second sub-second power supply voltage signal;

The absolute value of the voltage value of the first sub-reference voltage signal is smaller than the absolute value of the voltage value of the second sub-reference voltage signal.

2. The method of driving a display panel according to claim 1,

The start time of the second change is between the start time of the first change and the start time of the third change, the start time of the first change being before the start time of the second change.

3. The driving method of the display panel according to claim 1, wherein the termination time of the second change is between the termination time of the first change and the termination time of the third change, the termination time of the first change being before the termination time of the second change.

4. The method according to claim 1, wherein at least one of the first change, the second change, and the third change is a linear change.

5. The method according to claim 1, wherein at least one of the first variation, the second variation, and the third variation is a stepwise uniform variation.

6. The driving method of a display panel according to claim 1, wherein the display panel further comprises at least one highlighting mode;

the power saving display mode transitions to include the normal display mode between the highlighting display modes.

7. The driving method of a display panel according to claim 1, wherein the first display mode includes a plurality of consecutive frame periods, each of the frame periods including a blank area;

when the first display mode is converted into the second display mode, the first change comprises a plurality of first sub-changes, the first sub-changes occur in each of the blank area and the first transition stage; the second variation includes a plurality of second sub-variations that occur at each of the blank region and the first transition stage; the third variation includes a plurality of third sub-variations that occur at each of the blank region and the first transition stage.

8. The method according to claim 7, wherein the amounts of change of the first sub-changes are the same, the amounts of change of the second sub-changes are the same, and the amounts of change of the third sub-changes are the same.

9. The driving method of a display panel according to claim 7, wherein the first display mode includes a plurality of consecutive frame periods of which the number is K, 3.ltoreq.k.ltoreq.6, and K is an integer.

10. A display panel driven by the driving method of the display panel according to any one of claims 1 to 9, comprising a pixel driving circuit including a first power supply voltage signal terminal, a second power supply voltage signal terminal, and a reference voltage signal terminal; the display panel comprises a first display mode and a second display mode, and a first transition stage is arranged between the first display mode and the second display mode;

the pixel driving circuit further comprises a light emitting element and a driving transistor;

The first power supply voltage signal end is electrically connected with the first end of the driving transistor, the second end of the driving transistor is electrically connected with the first end of the light emitting element, the second end of the light emitting element is electrically connected with the second power supply voltage signal end, and the reference voltage signal end is electrically connected with the control end of the driving transistor.

11. A display device comprising the display panel according to claim 10.