CN113903286B - Display panel, driving method and manufacturing method of display panel and display device - Google Patents

Display panel, driving method and manufacturing method of display panel and display device Download PDF

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Publication number
CN113903286B
CN113903286B CN202111164725.0A CN202111164725A CN113903286B CN 113903286 B CN113903286 B CN 113903286B CN 202111164725 A CN202111164725 A CN 202111164725A CN 113903286 B CN113903286 B CN 113903286B
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initialization
signal line
transistor
voltage
display
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CN113903286A (en
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上官修宁
王铁钢
姜海斌
刘法景
郑峰
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention discloses a display panel, a driving method and a manufacturing method of the display panel and a display device. The display panel comprises a pixel circuit and an initialization signal line connected with the pixel circuit; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; wherein the second initialization voltage is greater than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures. The technical scheme provided by the invention reduces the voltage leakage of the storage capacitor of the pixel circuit to the initialization signal line, reduces the anode leakage of the light-emitting element to the initialization signal line, reduces the black state voltage of the driving transistor, further reduces the drift of the threshold voltage, and improves the afterimage phenomenon of the display panel.

Description

Display panel, driving method and manufacturing method of display panel and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a driving method and a manufacturing method of the display panel and a display device.
Background
Along with the development of display technology and the improvement of living standard of people, the display effect of the display panel is required to be higher and higher. The problem of ghost shadow can appear in the current display panel at the display process, influences user experience.
Disclosure of Invention
The embodiment of the invention provides a display panel, a driving method and a manufacturing method of the display panel and a display device, which are used for solving the problem of ghost shadows when the existing display panel displays and improving the display effect.
In order to realize the technical problems, the invention adopts the following technical scheme:
in a first aspect, an embodiment of the present invention provides a display panel, including:
A pixel circuit and an initialization signal line connected to the pixel circuit; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; wherein the second initialization voltage is greater than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
Optionally, the pixel circuit includes: a first initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, a first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, a second electrode of the first initialization transistor is connected with an initialization signal line,
The initialization signal line is configured to transmit a first initialization voltage to a gate of the driving transistor in an active display period and transmit a second initialization voltage to a second pole of the first initialization transistor in an inactive display period.
Optionally, the display panel further includes: a light emitting element connected to the pixel circuit, the pixel circuit further including a second initialization transistor, a first electrode of the second initialization transistor being connected to an anode of the light emitting element, a second electrode of the second initialization transistor being connected to an initialization signal line;
The initialization signal line is configured to transmit a first initialization voltage to an anode of the light emitting element in an active display period and transmit a second initialization voltage to a second pole of the second initialization transistor in an inactive display period.
Optionally, the display panel further includes: a light emitting element connected to the pixel circuit,
The pixel circuit includes: a first initialization transistor, a second initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, the first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, the second electrode of the first initialization transistor is connected with an initialization signal line,
The initialization signal line is used as a first initialization signal line, and the first initialization signal line is configured to transmit a first initialization voltage to a gate electrode of the driving transistor in an effective display stage and transmit a second initialization voltage to a second electrode of the first initialization transistor in an ineffective display stage;
The display panel further includes a second initialization signal line; a first electrode of the second initializing transistor is connected with the anode of the light emitting element, and a second electrode of the second initializing transistor is connected with a second initializing signal line;
The second initialization signal line is configured to transmit a third initialization voltage to an anode of the light emitting element in an active display period and transmit a fourth initialization voltage to a second pole of the second initialization transistor in an inactive display period, wherein the fourth initialization voltage is greater than the third initialization voltage.
Optionally, the display panel further includes: a light emitting element connected to the pixel circuit,
The pixel circuit includes: a first initialization transistor, a second initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, the first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, the second electrode of the first initialization transistor is connected with an initialization signal line,
The first initialization signal line is used as a first initialization signal line, and the first initialization signal line is configured to transmit a first initialization voltage to a gate electrode of the driving transistor in an effective display stage;
The display panel further includes a second initialization signal line; a first electrode of the second initializing transistor is connected with the anode of the light emitting element, and a second electrode of the second initializing transistor is connected with a second initializing signal line;
At the first refresh frequency, the second initialization signal line is configured to transmit a fifth initialization voltage to the anode of the light emitting element in an active display period; at a second refresh frequency, the second initialization signal line is configured to transmit a sixth initialization voltage to the anode of the light emitting element in an active display period;
Wherein the first refresh frequency is greater than the second refresh frequency; the sixth initialization voltage is smaller than the fifth initialization voltage.
Optionally, the display panel further includes a data signal line;
The data signal line is configured to transmit a black state voltage at a first refresh frequency different from a black state voltage transmitted at a second refresh frequency.
In a second aspect, an embodiment of the present invention provides a driving method of a display panel, including:
The initialization signal line provides an initialization signal for the pixel circuit;
The initialization signal line transmits a first initialization voltage in an effective display stage and transmits a second initialization voltage in an ineffective display stage;
Wherein the second initialization voltage is greater than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
In a third aspect, an embodiment of the present invention provides a method for manufacturing a display panel, including:
Preparing a pixel circuit and an initialization signal line on a substrate;
Wherein, the pixel circuit is connected with the initialization signal line; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; the second initialization voltage is larger than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
Optionally, the pixel circuit includes a transistor; the transistor comprises a semiconductor layer, an insulating layer and a grid layer which are sequentially stacked;
the preparation method for forming the transistor in the pixel circuit comprises the following steps:
a semiconductor layer, an insulating layer and a grid layer are sequentially laminated on a substrate;
And annealing the semiconductor layer and the insulating layer, and bombarding the annealed semiconductor layer by adopting ozone ions.
In a fourth aspect, an embodiment of the present invention provides a display device, including: the display panel of any embodiment of the first aspect.
According to the display panel provided by the embodiment of the invention, the voltage transmitted by the initialization signal line is adjustable, the initialization signal line transmits the first initialization voltage in the effective display stage, so that the pixel circuits are reset in the effective display stage, the initial states of the pixel circuits are consistent after the effective display stage, and the pixel circuits can generate the same driving current when the pixel circuits are switched from different gray scales to the same gray scale, so that the luminous brightness of the luminous elements is basically consistent; by setting the second initialization voltage with larger transmission voltage of the initialization signal line in the invalid display stage, the voltage leakage of the storage capacitor included in the pixel circuit to the initialization signal line and the anode leakage of the light emitting element to the initialization signal line can be reduced, so that the grid voltage of the driving transistor is higher, the black state voltage of the driving transistor can be reduced, the drift of the threshold voltage of the driving transistor is reduced, and the afterimage phenomenon of the display panel is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly explain the drawings needed in the description of the embodiments of the present invention, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the contents of the embodiments of the present invention and these drawings without inventive effort for those skilled in the art.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
FIG. 3 is a timing diagram illustrating switching between an active display phase and an inactive display phase of a pixel circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 5 is a timing chart of a refresh rate of a display panel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of the number of display lines in the active display stage and the inactive display stage at different refresh frequencies of a display panel according to an embodiment of the present invention;
FIG. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
As mentioned in the background art, the problem of the existing display panel that the same frame is displayed for a long time has a ghost, which means that when the display panel switches to another frame after displaying one frame for a period of time, the previous frame remains and disappears after a period of time. The inventor finds that the threshold voltage of the driving transistor drifts due to the hysteresis effect of the driving transistor in the pixel circuit, so that the display panel has the afterimage phenomenon.
Based on the above technical problems, the present embodiment proposes the following solutions:
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention. Fig. 1 exemplarily shows a case where the display panel 100 is provided in the display device 200. Fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. Referring to fig. 1 and 2, the display panel 100 includes a plurality of light emitting units, and the light emitting units include light emitting elements D 1 and corresponding pixel circuits 1. The display panel 100 further includes a first power signal line ELVDD, a second power signal line ELVSS, and an initialization signal line Vref. Each pixel circuit 1 is connected to a first power signal line ELVDD, a second power signal line ELVSS, and an initialization signal line Vref, respectively. In each light emitting unit, the pixel circuit 1 includes a plurality of thin film transistors and a storage capacitor, and the thin film transistors may include a driving transistor T 1 and a switching transistor, and the driving transistor T 1 and the light emitting element D 1 are sequentially connected between the first power signal line ELVDD and the second power signal line ELVSS. The driving transistor T 1 can generate a driving current to drive the light emitting element D 1 connected to the pixel circuit 1 to emit light, and the switching transistor mainly plays a role of switching.
Referring to fig. 1, the display panel 100 may further include a plurality of Scan signal lines Scan 1-Scan n, a plurality of data signal lines Vdata 1-Vdata n, a plurality of light emission control signal lines EM 1-EM n, and a driving chip 300, wherein the pixel circuit 1 is disposed in a region defined by the Scan signal lines Scan and the data signal lines Vdata, the Scan signal is input to the corresponding pixel circuit 1 through the Scan signal lines Scan, the pixel circuit 1 is connected to the data signal lines Vdata corresponding to the Scan signal lines Scan, the driving chip 300 inputs the data signal to the corresponding pixel circuit 1 through the data signal lines Vdata, and the voltage of the data signal corresponds to the driving voltage to determine the light emission brightness of the light emitting element D 1, that is, the display gray scale of the light emitting element D 1. It should be noted that the driving transistor, the switching transistor, and the storage capacitor may form the pixel circuit 1 in various forms in various connection relations. The pixel circuit 1 shown in fig. 2 is only an example, and other forms of pixel circuits are also possible, such as a 3T1C pixel circuit, a 7T1C pixel circuit, an 8T2C pixel circuit, etc., where T represents a transistor and C represents a capacitor. Fig. 2 exemplarily shows a case of a 7T1C pixel circuit, and is not limited to the pixel circuit 1.
Referring to fig. 1 and 2, the first power signal line ELVDD may be used to transmit the first power signal and the second power signal line ELVSS may be used to transmit the second power signal. The voltage on the first power signal line ELVDD is generally a high level voltage, and the voltage on the second power signal line ELVSS is generally a low level voltage. In the light emitting stage, the first power signal on the first power signal line ELVDD is applied to the first pole of the driving transistor T 1, the second power signal on the second power signal line ELVSS is applied to the second pole, e.g., the second pole is the cathode, of the light emitting element D 1, and the first power signal and the second power signal serve as the power source for the driving transistor T 1 to generate the driving current, so that the driving transistor T 1 generates the driving current to drive the light emitting element D 1 to emit light. The first power supply signal line ELVDD may be a signal line directly connected to one pole (e.g., drain or source) of the driving transistor T 1 in the pixel circuit 1, or a signal line indirectly connected to one pole of the driving transistor T 1 in the pixel circuit 1 through a switching transistor (e.g., light emission control transistor), and the second power supply signal line ELVSS may be a signal line connected to the cathode of the light emitting element D 1. The initialization signal line Vref may be used to transmit an initialization signal to the pixel circuit 1, for example, the initialization signal line Vref may be connected to the gate electrode and the storage capacitor of the driving transistor T 1 through a switching transistor, the initialization signal is written into the gate electrode and the storage capacitor C st of the driving transistor T 1 through the initialization signal line Vref and the switching transistor connected thereto, and the gate electrode and the storage capacitor C st of the driving transistor T 1 are initialized to remove residual charges of the display screen of the previous frame, so as to avoid affecting the display screen of the next frame. The initialization signal line Vref may be connected to the anode of the light emitting element D 1 through a switching transistor, and the initialization signal is written into the anode of the light emitting element D 1 through the initialization signal line Vref and the switching transistor connected thereto, so as to initialize the potential of the anode of the light emitting element D 1, so as to remove the residual charge of the previous frame of display screen, and avoid affecting the next frame of display screen.
Referring to fig. 1 and 2, a display panel 100 according to an embodiment of the present invention includes a pixel circuit 1 and an initialization signal line Vref connected to the pixel circuit 1; the initialization signal line Vref is used for supplying an initialization signal to the pixel circuit 1; the initialization signal line Vref is configured to transmit a first initialization voltage during an active display period and a second initialization voltage during an inactive display period; wherein the second initialization voltage is greater than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
Specifically, the driving chip 300 may perform image scanning according to the image data, the display panel may perform image display according to the image scanning signal, the display panel includes a plurality of pixel rows, the driving chip 300 may scan the pixel rows included in the display panel, and the display panel may correspond to a display screen, that is, an effective display stage. The driving chip 300 may perform Blank scanning according to the preset refresh frequency after displaying the previous frame and before displaying the next frame to form a Blank section, i.e. an invalid display stage.
The display panel 100 may include a plurality of pixel circuits 1, the pixel circuits 1 for driving the light emitting elements D 1 to emit light, the pixel circuits 1 controlling the light emitting luminance of the light emitting elements D 1 by controlling the driving current flowing through the light emitting elements D 1. In one frame, in the active display period, the driving chip 300 scans the pixel rows included in the display panel, and the driving process of each pixel row includes an initialization period, a data writing period and a light emitting period. The initialization signal line Vref may provide an initialization signal for the pixel circuit 1, and in one frame, the initialization signal line Vref transmits a first initialization voltage to the pixel circuit 1 in an effective display stage, so that the pixel circuit 1 is reset in the initialization stage of the effective display stage, and the initial states of the pixel circuits 1 in the effective display stage are consistent, so that the reset of the pixel circuit 1 may be realized. Therefore, in the display panel including the plurality of pixel circuits 1, each pixel circuit 1 can be restored to the same state in the effective display stage. When the gray scale is switched in different frames, no matter whether the gray scale displayed in the previous frame is the same or not, the pixel circuit 1 is restored to the same initial state in the effective display stage of the frame, so that the pixel circuit 1 can generate the same driving current when the gray scale is switched from different gray scales to the same gray scale, and the light-emitting brightness of the light-emitting element D 1 is basically consistent, thereby further reducing the afterimage phenomenon.
In the initialization stage of the active display stage, since the first initialization transistor T 2 and the second initialization transistor T 3 of the pixel circuit 1 are turned on, the first initialization voltage transmitted by the initialization signal line Vref may reset the pixel circuit 1. In the data writing stage and the light emitting stage of the active display stage, since the first initialization transistor T 2 and the second initialization transistor T 3 are turned off, the potential of the initialization signal line Vref maintains the first initialization voltage.
Referring to fig. 2, a pixel circuit provided in an embodiment of the present invention may correspond to a specific circuit structure of the pixel circuit 1 in the display panel 100 shown in fig. 1, such as a 7T1C pixel circuit. Referring to fig. 1 and 2, the pixel circuit 1 includes a driving transistor T 1, a first initializing transistor T 2, a second initializing transistor T 3, a third transistor T 4, a fourth transistor T 5, a fifth transistor T 6, a sixth transistor T 7, and a storage capacitor C st. In the initialization stage, the Scan signal input by the first Scan signal line Scan1 may control the first initialization transistor T 2 to be turned on, so as to write the initialization signal input by the initialization signal line Vref into the storage capacitor C st and the gate of the driving transistor T 1. In the data writing stage, the Scan signal inputted from the second Scan signal line Scan2 may control the second initializing transistor T 3 to be turned on, so as to transmit the initializing signal inputted from the initializing signal line Vref to the anode of the light emitting element D1, so that the anode of the light emitting element D1 is initialized. The Scan signal inputted from the second Scan signal line Scan2 may control the third transistors T 4 and T 7 to be turned on, so as to write the data voltage signal inputted from the data voltage signal line Vdata into the gate of the driving transistor T 1 and charge the storage capacitor C st. In the light emitting stage, the light emission control signal inputted from the light emission control signal line EM may control the fourth transistor T 5 and the fifth transistor T 6 to be turned on, and the first power signal and the second power signal serve as power sources for generating the driving current by the driving transistor T 1, so that the driving transistor T 1 generates the driving current to drive the light emitting element D 1 to emit light.
In the operation process of the pixel circuit, there is a problem that the voltage of the storage capacitor C st leaks to the initialization signal line Vref through the first initialization transistor T 2, and the anode of the light emitting element D 1 leaks to the initialization signal line Vref through the second initialization transistor T 3.
Fig. 3 is a timing chart of switching between an active display stage and an inactive display stage of a pixel circuit according to an embodiment of the present invention. The tearing effect (TEARING EFFECT, TE) signal is a signal for preventing tearing problems at the time of screen refresh during image display, and for frame rate monitoring. Fig. 3 exemplarily shows a case where the voltage of the TE signal may be a low level voltage during an active display period and a high level voltage during an inactive display period of the display panel. A frame of display may include a column valid line number (Vact), a column forward interval (VFP), and a column backward interval (VBP). The effective display stage is a time period corresponding to Vact. The inactive display phase includes VFP and VBP. It should be noted that, the VBP may be located before the period corresponding to Vact of the one frame display, and the VFP may be located after the period corresponding to Vact of the one frame display.
In the inactive display phase, the light emitting element D 1 is switched from the bright state to the black state, and the light emitting element D 1 does not display a picture. In the inactive display period, the first initializing transistor T 2 and the second initializing transistor T 3 are turned off, and the initializing signal line Vref transmits the second initializing voltage with a larger voltage, for example, the voltage transmitted on the initializing signal line Vref is a high level voltage, so that the voltage of the storage capacitor C st of the pixel circuit 1 is reduced from leaking to the initializing signal line Vref through the first initializing transistor T 2, and the anode of the light emitting element D 1 is reduced from leaking to the initializing signal line Vref through the second initializing transistor T 3.
In the inactive display period, the voltage of the storage capacitor C st of the pixel circuit 1 is reduced to leak to the initialization signal line Vref through the first initialization transistor T 2, and the voltage fluctuation of the storage capacitor C st of the pixel circuit 1 causes the gate voltage of the driving transistor T 1 to change, so that the gate voltage of the driving transistor T 1 can be made higher by reducing the voltage of the storage capacitor C st of the pixel circuit 1 to leak to the initialization signal line Vref. According to the saturation region current formula: i d＝1/2*W/L*Cox(VGS-Vth)/(2), wherein I d is the output current of the driving transistor T 1, W and L are the width and length of the channel of the driving transistor T 1, respectively, C ox is the capacitance per unit area of the gate oxide layer, V GS is the gate-source voltage difference of the driving transistor T 1, and V th is the threshold voltage of the driving transistor T 1. If the storage capacitor C st is more leaked to the initialization signal line Vref through the first initialization transistor T 2, the gate voltage V G of the driving transistor T 1 is lower, the gate-source voltage difference V GS of the driving transistor T 1 is more negative, the |v GS | is larger, the output current I d of the driving transistor T 1 is larger according to the saturation region current formula, and the higher the brightness of the light emitting element D 1 is, the higher black state voltage is required to turn off the driving transistor T 1. The less the storage capacitor C st leaks to the initialization signal line Vref through the first initialization transistor T 2, the higher the voltage of the gate voltage V G of the driving transistor T 1, the smaller the voltage difference |v GS | between the gate and the source of the driving transistor T 1, the smaller the output current I d of the driving transistor T 1 according to the saturation region current formula, the lower the brightness of the light emitting element D 1, and the lower the black state voltage is required to turn off the driving transistor T 1.
Therefore, in the inactive display period, the leakage of the storage capacitor C st to the initialization signal line Vref through the turned-off first initialization transistor T 2 is reduced, so that the gate voltage of the driving transistor T 1 is higher, and the black state voltage of the driving transistor T 1 is reduced. The black state voltage of the driving transistor T 1 is reduced, so that the positive bias or the negative bias applied to the grid electrode of the driving transistor T 1 can be reduced, the capture or release of carriers between the semiconductor layer and the insulating layer is reduced, the probability of capturing the carriers is reduced, the drift of the threshold voltage of the driving transistor T 1 can be reduced, and the afterimage phenomenon of the display panel is improved.
In the inactive display period, the electric leakage from the anode of the light emitting element D 1 of the pixel circuit 1 to the initialization signal line Vref through the turned-off second initialization transistor T 3 is reduced, so that the potential of the anode of the light emitting element D 1 can be well maintained. The smaller the leakage current of the anode of the light emitting element D 1 to the initialization signal line Vref through the second initialization transistor T 3, the smaller the current required to be output by the driving transistor T 1, the smaller the output current of the driving transistor T 1, the lower the luminance of the light emitting element D 1, and the lower the black state voltage required to turn off the driving transistor T 1. The reduction of the black state voltage of the driving transistor T 1 can reduce the positive bias or the negative bias applied to the gate of the driving transistor T 1, thereby reducing the capture or release of carriers between the semiconductor layer and the insulating layer, reducing the probability of capturing carriers, reducing the drift of the threshold voltage of the driving transistor T 1, and further improving the ghost phenomenon of the display panel.
The display panel provided by the embodiment is adjustable by setting the voltage transmitted by the initialization signal line, the initialization signal line transmits the first initialization voltage in the effective display stage, so that the pixel circuits are reset, the initial states of the pixel circuits are consistent after the initialization stage, and when the pixel circuits are switched from different gray scales to the same gray scale, the pixel circuits can generate the same driving current, and the luminous brightness of the luminous elements is basically consistent; by setting the second initialization voltage with larger transmission voltage of the initialization signal line in the invalid display stage, the voltage leakage of the storage capacitor of the pixel circuit to the initialization signal line and the anode leakage of the light emitting element to the initialization signal line can be reduced, the grid voltage of the driving transistor is higher, the black state voltage of the driving transistor is reduced, and further the drift of the threshold voltage of the driving transistor is reduced, so that the afterimage phenomenon of the display panel is improved.
Alternatively, on the basis of the above-described embodiments, referring to fig. 1 to 3, the pixel circuit 1 of the display panel 100 according to the embodiment of the present invention may include a first initialization transistor T 2, a driving transistor T 1, and a storage capacitor C st, the storage capacitor C st is connected to the gate of the driving transistor T 1, a first pole of the first initialization transistor T 2 is connected to the gate of the driving transistor T 1, a second pole of the first initialization transistor T 2 is connected to the initialization signal line Vref, and the initialization signal line Vref is configured to transmit a first initialization voltage to the gate of the driving transistor T 1 in an active display period and a second initialization voltage to the second pole of the first initialization transistor T 2 in an inactive display period.
Specifically, the pixel circuit 1 may include a driving transistor T 1 that drives the light emitting element D 1 to emit light, and the driving transistor T 1 controls the light emitting luminance of the light emitting element D 1 by controlling the driving current flowing through the light emitting element D 1. The magnitude of the driving current generated by the driving transistor T 1 is related to the gate-source voltage difference of the driving transistor T 1, and the magnitude of the gate-source voltage difference of the driving transistor T 1 is different under different display gray scales. The initialization signal line Vref may supply an initialization signal to the pixel circuit 1.
In the effective display stage, the initialization signal line Vref transmits the first initialization voltage to the gate of the driving transistor T 1 through the first initialization transistor T 2, so that in the effective display stage, the gate of the driving transistor T 1 is reset, and further, the gate-source voltage difference of the driving transistor T 1 in each pixel circuit 1 is equal after the effective display stage, so that the initial states of the driving transistors T 1 in each pixel circuit 1 are consistent, the reset of the driving transistor T 1 can be realized, the driving transistor T 1 can be restored to the same initial state, further, the capturing and releasing degrees of carriers in the driving transistor T 1, at the interface of the active layer and the insulating layer tend to be consistent in the gray scale switching process, and when the driving transistor T 1 is switched to the same gray scale from different gray scales, the light emitting brightness of the light emitting element D 1 is basically consistent, and further, the afterimage phenomenon is reduced.
Since the voltage of the storage capacitor C st will leak to the initialization signal line Vref through the turned-off first initialization transistor T 2 during the operation of the pixel circuit, the initialization signal line Vref transmits the second initialization voltage with a larger voltage to the second electrode of the first initialization transistor T 2 during the inactive display period, and the first initialization transistor T 2 is turned off, so that the second electrode of the first initialization transistor T 2 has a higher voltage. Since the larger the leakage of the storage capacitor C st through the second polarity initializing signal line Vref of the first initializing transistor T 2, the lower the voltage of the gate voltage V G of the driving transistor T 1, the more negative the voltage difference V GS between the gate and the source of the driving transistor T 1, the larger the |v GS | is, and the higher the output current I d of the driving transistor T 1 is, the higher the brightness of the light emitting element D 1 is, and the higher the black state voltage is required for the driving transistor T 1 to turn off. The smaller the leakage of the storage capacitor C st through the second polarity initializing signal line Vref of the first initializing transistor T 2, the higher the voltage of the gate voltage V G of the driving transistor T 1, the smaller the voltage difference |v GS | between the gate and the source of the driving transistor T 1, the smaller the output current I d of the driving transistor T 1, the lower the brightness of the light emitting element D 1, and the lower the black state voltage required for the driving transistor T 1 can be turned off according to the saturation region current formula. Accordingly, the black state voltage of the driving transistor T 1 can be reduced by reducing the leakage of the storage capacitor C st to the initialization signal line Vref through the second pole of the first initialization transistor T 2. The reduction of the black state voltage of the driving transistor T 1 can reduce the positive bias or the negative bias applied to the gate of the driving transistor T 1, thereby reducing the probability of capturing or releasing carriers between the semiconductor layer and the insulating layer, reducing the drift of the threshold voltage of the driving transistor T 1, and further improving the ghost phenomenon of the display panel.
Optionally, on the basis of the above embodiment, referring to fig. 1 to 3, the display panel provided in the embodiment of the present invention may further include a light emitting element D 1 connected to the pixel circuit 1, the pixel circuit 1 further includes a second initialization transistor T 3, a first electrode of the second initialization transistor T 3 is connected to an anode of the light emitting element D 1, and a second electrode of the second initialization transistor T 3 is connected to an initialization signal line Vref; ; the initialization signal line Vref is configured to transmit a first initialization voltage to the anode of the light emitting element D 1 in an active display period and to transmit a second initialization voltage to the second pole of the second initialization transistor T 3 in an inactive display period.
Specifically, in the effective display stage, the initialization signal line Vref transmits the first initialization voltage to the anode of the light emitting element D 1 through the second initialization transistor T 3, so that in the effective display stage, the anode of the light emitting element D 1 is reset, and then the anode voltages of the light emitting elements D 1 in the pixel circuits 1 are equal after the effective display stage, so that the initial states of the anodes of the light emitting elements D 1 in the pixel circuits 1 are consistent, the reset of the anode of the light emitting element D 1 can be realized, the anode of the light emitting element D 1 is restored to the same initial state, and when the light emitting elements D 1 are switched from different gray scales to the same gray scale, the light emitting brightness of the light emitting element D 1 is substantially consistent, and the ghost phenomenon is further reduced.
Since the anode of the light emitting element D 1 leaks to the initialization signal line Vref through the second initialization transistor T 3 during the operation of the pixel circuit. In the inactive display period, the second initialization voltage with a larger voltage is transmitted to the second electrode of the second initialization transistor T 3, so that the leakage of the anode of the light-emitting element D 1 from the second initialization transistor T 3 to the initialization signal line Vref can be reduced. The smaller the leakage current of the anode of the light emitting element D 1 to the initialization signal line Vref through the second initialization transistor T 3, the smaller the current that the driving transistor T 1 needs to output. The smaller the output current of the driving transistor T 1, the lower the luminance of the light-emitting element D 1, and the lower the black state voltage is required to turn off the driving transistor T 1. Since the black state voltage of the driving transistor T 1 is reduced, the positive bias or the negative bias applied to the gate of the driving transistor T 1 can be reduced, and then the capturing or releasing of carriers between the semiconductor layer and the insulating layer can be reduced, so that the probability of capturing carriers is reduced, the drift of the threshold voltage of the driving transistor T 1 is reduced, and the afterimage phenomenon of the display panel is further improved.
Optionally, fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention. On the basis of the above-described embodiments, referring to fig. 1,3 and 4, the display panel 100 provided by the embodiment of the present invention may further include a light emitting element D 1 connected to the pixel circuit 1, the pixel circuit 1 includes a first initialization transistor T 2, a second initialization transistor T 3, a driving transistor T 1 and a storage capacitor C st, the storage capacitor C st is connected to the gate of the driving transistor T 1, a first pole of the first initialization transistor T 2 is connected to the gate of the driving transistor T 1, a second pole of the first initialization transistor T 2 is connected to an initialization signal line Vref, the initialization signal line Vref is used as a first initialization signal line Vref 1, and the first initialization signal line Vref 1 is configured to transmit a first initialization voltage to the gate of the driving transistor T 1 in an active display period and a second initialization voltage to the second pole of the first initialization transistor T 2 in an inactive display period; the display panel 100 further includes a second initialization signal line Vref 2; a first electrode of the second initializing transistor T 3 is connected to the anode of the light emitting element D 1, and a second electrode of the second initializing transistor T 3 is connected to the second initializing signal line Vref 2; the second initialization signal line Vref 2 is configured to transmit a third initialization voltage to the anode of the light emitting element D 1 in an active display period and to transmit a fourth initialization voltage to the second pole of the second initialization transistor T 3 in an inactive display period, wherein the fourth initialization voltage is greater than the third initialization voltage.
Specifically, in the effective display stage, the first initializing signal line Vref 1 transmits the first initializing voltage to the gate of the driving transistor T 1 through the first initializing transistor T 2, the second initializing signal line Vref 2 transmits the third initializing voltage to the anode of the light emitting element D 1 through the second initializing transistor T 3, so that in the effective display stage, both the gate of the driving transistor T 1 and the anode of the light emitting element D 1 are reset, and further, the gate-source voltage difference of the driving transistor T 1 in each pixel circuit 1 is equal after the effective display stage, so that the initial states of the driving transistors T 1 in each pixel circuit 1 are consistent, the reset of the driving transistors T 1 can be realized, the driving transistors T 1 can recover to the same initial state, and when the driving transistors T 1 are switched from different gray scales to the same gray scale, the light emitting brightness of the light emitting element D 1 is substantially consistent, and the afterimage phenomenon is further reduced. The first initialization voltage and the third initialization voltage may be set to be equal or unequal as required, and are not limited herein.
In the inactive display period, the first initialization signal line Vref 1 transmits the second initialization voltage with a larger voltage to the second pole of the first initialization transistor T 2, and since the first initialization transistor T 2 is turned off, the second pole of the first initialization transistor T 2 is higher, so that the voltage of the storage capacitor C st can be reduced from leaking to the first initialization signal line Vref 1 through the first initialization transistor T 2. Since the smaller the drain of the storage capacitor C st to the first initializing signal line Vref 1 through the first initializing transistor T 2, the higher the gate voltage of the driving transistor T 1, the smaller the gate-source voltage difference of the driving transistor T 1, the smaller the output current of the driving transistor T 1, the lower the luminance of the light emitting element D 1, and the lower the black voltage is required to turn off the driving transistor T 1 according to the saturation region current formula. Therefore, the gate voltage of the driving transistor T 1 can be increased by decreasing the leakage of the storage capacitor C st to the first initializing signal line Vref 1 through the first initializing transistor T 2, the output current of the driving transistor T 1 can be decreased, and the black state voltage of the driving transistor T 1 can be decreased.
In the inactive display period, by setting the fourth initialization voltage, at which the second initialization signal line Vref 2 transmits a larger voltage to the second electrode of the second initialization transistor T 3, leakage of the anode of the light emitting element D 1 through the second initialization transistor T 3 to the second initialization signal line Vref 2 can be reduced. Since the smaller the leakage of the anode of the light emitting element D 1 to the second initialization signal line Vref 2 through the second initialization transistor T 3, the smaller the current to be output from the driving transistor T 1, the lower the luminance of the light emitting element D 1, and the lower the black state voltage is required, the driving transistor T 1 can be turned off. Accordingly, the current output from the driving transistor T 1 can be reduced by reducing the leakage of the anode of the light emitting element D 1 through the second initialization transistor T 3 to the second initialization signal line Vref 2, thereby reducing the black state voltage of the driving transistor T 1.
In the inactive display stage, the second initialization signal line Vref 1 is set to transmit a second initialization voltage with a larger voltage to the second electrode of the first initialization transistor T 2, and the fourth initialization signal line Vref 2 is set to transmit a fourth initialization voltage with a larger voltage to the second electrode of the second initialization transistor T 3, so that the second electrode of the first initialization transistor T 2 is higher, the leakage of the storage capacitor C st to the first initialization signal line Vref 1 through the first initialization transistor T 2 can be reduced, the second electrode of the second initialization transistor T 3 is higher, the leakage of the anode of the light emitting element D 1 to the second initialization signal line Vref 2 through the second initialization transistor T 3 is reduced, the output current of the driving transistor T 1 is reduced, the black state voltage of the driving transistor T 1 is reduced, the drift of the threshold voltage of the driving transistor T 1 is reduced, and the residual image phenomenon of the display panel is further improved. It should be noted that the first initialization voltage and the third initialization voltage may be set to be equal or unequal as required; the second initialization voltage and the fourth initialization voltage may be set equal or unequal as needed, which is not limited herein.
Optionally, fig. 5 is a timing chart of a refresh frequency of a display panel according to an embodiment of the present invention. Based on the above embodiments, with reference to fig. 1,2 and 5, the first refresh rate 10 is greater than the second refresh rate 20; at the second refresh frequency 20, the initialization signal line Vref is configured to transmit a first initialization voltage during an active display period and transmit a second initialization voltage during an inactive display period; wherein the second initialization voltage is greater than the first initialization voltage.
Specifically, fig. 6 is a schematic diagram of display line numbers of an effective display stage and an ineffective display stage of a display panel at different refresh frequencies according to an embodiment of the present invention. Referring to fig. 1 to 3, fig. 5 and 6, the voltage of the TE signal is low in the active display stage of the display panel, corresponding to the active display stage of fig. 6. In the inactive display phase, the voltage of the TE signal is high voltage, corresponding to VFP and VBP in fig. 6. The inactive display stage of the TE signal includes VFP and VBP, and the inactive display stage may be calculated as a virtual line number according to a time corresponding to each pixel line of the active display stage, and the line number corresponding to the inactive display stage of the TE signal includes a sum of the line number of VFP and the line number of VBP. Referring to fig. 6, at different refresh frequencies, the number of lines in the effective display stage is the same, and at the ineffective display stage, the number of lines in the ineffective display stage corresponding to the second refresh frequency 20 with a lower refresh frequency is greater than the number of lines in the ineffective display stage corresponding to the first refresh frequency 10. For example, the number of lines in the active display stage of the display device may be 2340 lines, the number of lines in the inactive display stage corresponding to the first refresh frequency 10 may be 60 lines, where the sum of the number of lines in VBP and the number of lines in VFP is 60 lines, and the sum of the number of lines in the inactive display stage corresponding to the first refresh frequency 10 and the number of lines in the active display stage is 2400 lines. The number of rows of the invalid display stage corresponding to the second refresh rate 20 may be 1260 rows, where the sum of the number of rows of VBP and the number of rows of VFP is 1260 rows, and the sum of the number of rows of the invalid display stage corresponding to the second refresh rate 20 and the number of rows of the valid display stage is 3600 rows.
For example, the first refresh frequency 10 may be 90H Z and the second refresh frequency 20 may be 60H Z, thus, each row time is: 1/60/3600=1/90/2400=4.63 us. Since the number of lines in the inactive display period of the second refresh frequency 20 with a lower frequency is larger, the voltage of the storage capacitor C st and the leakage time of the anode of the light-emitting element D 1 to the initialization signal line Vref are longer in the inactive display period of the second refresh frequency 20 with a lower frequency. At the second refresh frequency 20 with a lower refresh frequency, since the longer the leakage time, the lower the gate voltage of the driving transistor T 1, the lower the gate voltage of the driving transistor T 1, the larger the output current of the driving transistor T 1, the higher the luminance of the light emitting element D 1, and if the driving transistor T 1 needs to be turned off, the larger the black state voltage is needed to make the light emitting element D 1 reach the black state, as known from the saturation region current formula.
Therefore, at the second refresh frequency 20 with a lower refresh frequency, the initialization signal line Vref transmits the second initialization voltage with a larger voltage in the inactive display phase, so that the voltage of the storage capacitor C st can be reduced by the leakage of the first initialization transistor T 2 and the leakage of the anode of the light emitting element D 1 through the second initialization transistor T 3 at the second refresh frequency 20 with a lower frequency, so that the voltage of the gate of the driving transistor T 1 is higher, the output current of the driving transistor T 1 can be smaller at the low refresh frequency, the brightness of the light emitting element D 1 is lower, and if the driving transistor T 1 needs to be turned off, a smaller black state voltage is needed, so that the black state voltage of the driving transistor T 1 is reduced. The lower black state voltage of the driving transistor T 1 can reduce the positive bias or the negative bias applied to the gate of the driving transistor T 1, so as to reduce the capturing or releasing of carriers between the semiconductor layer and the insulating layer, reduce the probability of capturing the carriers, reduce the drift of the threshold voltage of the driving transistor, and further improve the ghost phenomenon of the display panel under the low refresh frequency.
Optionally, on the basis of the above embodiment, referring to fig. 1, 2 and 5, at the first refresh frequency 10, the second initialization signal line Vref 2 is configured to transmit the fifth initialization voltage to the anode of the light-emitting element D1 in the active display phase; at the second refresh frequency 20, the second initialization signal line Vref 2 is configured to transmit a sixth initialization voltage to the anode of the light-emitting element D1 in the active display phase; wherein the first refresh frequency 10 is greater than the second refresh frequency 20; the sixth initialization voltage is smaller than the fifth initialization voltage.
Specifically, under the same display brightness, the currents flowing through the light emitting element D 1 at different refresh rates are the same, and when a black screen is displayed, the anode of the light emitting element D 1 leaks to the initialization signal line Vref through the second initialization transistor T 3. In the inactive display phase, since the branch in which the second initialization transistor T 3 is located is branched more at the first refresh frequency 10 having a higher refresh frequency, the branch in which the second initialization transistor T 3 is located is branched less at the second refresh frequency 20 having a lower refresh frequency. The second Scan signal line Scan2 transmits a voltage signal to the control terminal of the second initialization transistor T 3, and the initialization signal line Vref is connected to the second pole of the second initialization transistor T 3. Under the second refresh frequency 20 with lower refresh frequency, the initializing signal line Vref transmits a sixth initializing voltage with lower voltage to the second pole of the second initializing transistor T 3, so that the electric leakage of the anode of the light emitting element D 1 to the initializing signal line Vref through the second initializing transistor T 3 can be increased, the current flowing through the Vref is ensured to be larger, the current of the first power signal line ELVDD is increased, and the turn-off voltage of the driving transistor T 1 is further reduced, thereby improving the ghost phenomenon of the display panel when the refresh rate is lower.
Optionally, in addition to the above embodiments, referring to fig. 1, fig. 4 and fig. 5, the display panel 100 provided in the embodiment of the present invention may further include a light emitting element D 1 connected to the pixel circuit 1, where the pixel circuit 1 includes a first initialization transistor T 2, a second initialization transistor T 3, a driving transistor T 1 and a storage capacitor C st, the storage capacitor C st is connected to the gate of the driving transistor T 1, a first pole of the first initialization transistor T 2 is connected to the gate of the driving transistor T 1, a second pole of the first initialization transistor T 2 is connected to an initialization signal line Vref, the initialization signal line Vref is used as a first initialization signal line Vref 1, and the first initialization signal line Vref 1 is configured to transmit a first initialization voltage to the gate of the driving transistor T 1 in an active display stage; the display panel 100 further includes a second initialization signal line Vref 2; a first electrode of the second initializing transistor T 3 is connected to the anode of the light emitting element D 1, and a second electrode of the second initializing transistor T 3 is connected to the second initializing signal line Vref 2; at the first refresh frequency 10, the second initialization signal line Vref2 is configured to transmit a fifth initialization voltage to the anode of the light emitting element D1 in an effective display period; at the second refresh frequency 20, the second initialization signal line Vref2 is configured to transmit a sixth initialization voltage to the anode of the light emitting element D1 in the active display period; wherein the first refresh frequency 10 is greater than the second refresh frequency 20; the sixth initialization voltage is smaller than the fifth initialization voltage.
Specifically, since the anode of the light emitting element D 1 leaks to the second initialization signal line Vref 2 through the second initialization transistor T 3 when a black screen is displayed. At the first refresh frequency 10 with a higher refresh frequency, the branch where the second initialization transistor T 3 is located is split more, and at the second refresh frequency 20 with a lower refresh frequency, the branch where the second initialization transistor T 3 is located is split less. The second Scan signal line Scan2 transmits a voltage signal to the control terminal of the second initialization transistor T 3, the second initialization signal line Vref 2 is connected to the source of the second initialization transistor T 3, and the initialization voltage signal transmitted by the first initialization signal line Vref 1 may be kept unchanged by setting the sixth initialization voltage, which is lower in voltage, of the second initialization signal line Vref 2 at the second refresh frequency 20, which is lower in refresh frequency. At the second refresh frequency 20 with a lower refresh frequency, the second initialization signal line Vref 2 transmits a sixth initialization voltage with a lower voltage to the second pole of the second initialization transistor T 3, so that the leakage of the anode of the light emitting element D 1 to the second initialization signal line Vref 2 through the second initialization transistor T 3 can be increased, the current of the first power signal line ELVDD is increased, the turn-off voltage of the driving transistor T 1 is reduced, and the ghost phenomenon of the display panel is further improved.
On the other hand, at the second refresh frequency 20 with a lower refresh frequency, when the sixth initialization voltage with a lower voltage is transmitted to the branch where the second initialization transistor T 3 is located through the second initialization signal line Vref 2, the second initialization voltage signal transmitted by the first initialization signal line Vref 1 in the inactive display phase may remain unchanged, so as to ensure that the leakage of the voltage of the storage capacitor C st from the first initialization transistor T 2 to the first initialization signal line Vref 1 is smaller, thereby further improving the display effect of the display panel.
Optionally, with continued reference to fig. 4, the display panel provided in the embodiment of the present invention further includes a data signal line Vdata; the data signal line Vdata is configured to transmit a black state voltage at the first refresh frequency 10 different from a black state voltage transmitted at the second refresh frequency 20.
Specifically, since the leakage time is shorter and the required black state voltage is lower at the first refresh frequency 10 with a higher refresh frequency, the arrangement is such that the black state voltage transmitted by the data signal line Vdata is lower at the first refresh frequency 10 with a higher refresh frequency, thereby avoiding unnecessary display effect waste. Because the second refresh frequency 20 with lower refresh frequency has longer leakage time, the required black state voltage is higher, and the black state voltage transmitted by the data signal line Vdata is higher at the second refresh frequency 20 with lower refresh frequency, thereby improving the display effect of the display panel. The black state voltage transmitted by the data signal line Vdata can be adjusted according to the refresh frequency of the display panel, so that the display effect of the display panel is improved. Since the first refresh rate 10 is greater than the second refresh rate 20, the leakage current at the first refresh rate 10 is less than the leakage current at the second refresh rate 20, and the data signal line Vdata may be configured such that the black state voltage transmitted at the first refresh rate 10 having a higher refresh rate is less than the black state voltage transmitted at the second refresh rate 20 having a lower refresh rate, thereby further improving the ghost phenomenon of the display panel.
Optionally, fig. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the invention. On the basis of the above embodiments, referring to fig. 7, the display panel provided in the embodiment of the present invention includes a substrate 701, a semiconductor layer 702 located on the substrate 701, an insulating layer 703, and a gate layer 704; the semiconductor layer 702, the insulating layer 703, the gate layer 704, and a source/drain electrode layer (not shown) form transistors in the pixel circuit 1; the semiconductor layer 702 and the insulating layer 703 are annealed, and the annealed semiconductor layer is bombarded by ozone ions, so that the surface of the semiconductor layer 702, which is attached to the insulating layer 703, is good in compactness, and the flatness of the surface of the semiconductor layer 702, which is attached to the insulating layer 703, is improved.
Specifically, by providing such a structure, defects on the surface of the semiconductor layer 702 to be bonded to the insulating layer 703 can be reduced, and since the hysteresis voltage Δv hysteresis＝ΔQ/Ci of the transistor is Δq which is a trapped charge and C i is a capacitance of the insulating layer 703, it can be seen that decreasing Δq and increasing C i can reduce a hysteresis effect of the transistor, and by improving defects on the surface of the semiconductor layer 702 to be in contact with the insulating layer 703, the trapped charge Δq can be reduced, thereby reducing the hysteresis effect and improving a ghost phenomenon. The semiconductor layer 702 may include a channel region 71, a source region 72, and a drain region 73.
Optionally, on the basis of the foregoing embodiment, the driving method of the display panel provided by the embodiment of the present invention includes:
Step one, an initialization signal line provides an initialization signal for a pixel circuit, and transmits a first initialization voltage in an effective display stage and a second initialization voltage in an ineffective display stage; wherein the second initialization voltage is greater than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
According to the driving method of the display panel, the initializing signal line is used for providing the initializing signal for the pixel circuit, and the voltage transmitted by the initializing signal line is adjustable, so that the initializing signal line transmits the first initializing voltage in the effective display stage, the pixel circuit is reset, the initial states of the pixel circuits are consistent after the initializing stage, and when the pixel circuits are switched from different gray scales to the same gray scale, the pixel circuits can generate the same driving current, and the luminous brightness of the luminous element is basically consistent; by setting the second initialization voltage with larger transmission voltage of the initialization signal line in the invalid display stage, the voltage leakage of the storage capacitor of the pixel circuit to the initialization signal line and the anode leakage of the light emitting element to the initialization signal line can be reduced, the grid voltage of the driving transistor is higher, the black state voltage of the driving transistor is reduced, and further the drift of the threshold voltage of the driving transistor is reduced, so that the afterimage phenomenon of the display panel is improved.
The embodiment of the invention provides a preparation method of a display panel. On the basis of the above embodiments, the method for manufacturing a display panel provided by the embodiment of the present invention includes:
step one, preparing a pixel circuit and an initialization signal line on a substrate;
Wherein, the pixel circuit is connected with the initialization signal line; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; the second initialization voltage is larger than the first initialization voltage; the active display phase includes a period of time for displaying pictures and the inactive display phase includes an interval period of time between adjacent display pictures.
The method for manufacturing the display panel provided by the embodiment comprises the steps of manufacturing a pixel circuit and an initialization signal line on a substrate, and connecting the pixel circuit with the initialization signal line through setting the pixel circuit; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; the pixel circuits are reset in the effective display stage, so that the initial states of the pixel circuits are consistent after the effective display stage, and the pixel circuits can generate the same driving current when the pixel circuits are switched from different gray scales to the same gray scale, so that the luminous brightness of the luminous elements is basically consistent; by setting the second initialization voltage with larger transmission voltage of the initialization signal line in the invalid display stage, the voltage leakage of the storage capacitor of the pixel circuit to the initialization signal line and the anode leakage of the light emitting element to the initialization signal line can be reduced, the grid voltage of the driving transistor is higher, the black state voltage of the driving transistor is reduced, and further the drift of the threshold voltage of the driving transistor is reduced, so that the afterimage phenomenon of the display panel is improved.
Alternatively, the pixel circuit may include a transistor; the transistor may include a semiconductor layer, an insulating layer, and a gate layer which are stacked in this order;
the preparation method for forming the transistor in the pixel circuit comprises the following steps:
Step one, a semiconductor layer, an insulating layer and a grid layer are sequentially laminated on a substrate;
and secondly, annealing the semiconductor layer and the insulating layer, and bombarding the annealed semiconductor layer by adopting ozone ions.
Specifically, as the magnitude of the trapped charges delta Q is reduced along with the rise of the annealing temperature, the annealing treatment is carried out on the semiconductor layer and the insulating layer, so that oxygen vacancies can be reduced by the annealing at the temperature of more than 250 ℃, the quality of the semiconductor layer and the interface where the semiconductor layer and the insulating layer are attached can be improved, the defects of the insulating layer are reduced, and the insulating layer is more densely combined with the semiconductor layer; in addition, after the semiconductor layer is sputtered to form a film, ozone ion bombardment is carried out, so that the semiconductor layer is smoother, the combination of the semiconductor layer and the insulating layer is denser, defects between contact surfaces of the semiconductor layer and the insulating layer are reduced, capture and release of carriers in an active layer, an insulating layer and an interface of the active layer and the insulating layer in the transistor are easy, positive pressure or negative pressure is prevented from being applied for a long time, threshold voltage positive bias or negative bias is caused, threshold voltage drift of the transistor is reduced, and then the afterimage phenomenon is reduced.
Note that the transistors in the pixel circuit may include one or more of the driving transistor T 1, the first initializing transistor T 2, the second initializing transistor T 3, the third transistor T 4, the fourth transistor T 5, the fifth transistor T 6, and the sixth transistor T 7, which are not limited herein.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention. On the basis of the foregoing embodiments, referring to fig. 8, the display device 200 provided in the embodiment of the present invention includes the display panel 100 provided in any of the foregoing embodiments, and has the beneficial effects of the display panel 100 provided in the foregoing embodiments, which are not described herein again. The display device 200 may include a mobile terminal such as a mobile phone, a tablet computer, and a wearable device.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims (9)

1. A display panel, comprising:
A pixel circuit and an initialization signal line connected to the pixel circuit; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; wherein the second initialization voltage is greater than the first initialization voltage; the effective display stage comprises a time period of display pictures, and the ineffective display stage comprises an interval time period between adjacent display pictures;
The display panel further includes: a light emitting element connected to the pixel circuit,
The pixel circuit includes: a first initialization transistor, a second initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, a first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, a second electrode of the first initialization transistor is connected with the initialization signal line,
The initialization signal line serves as a first initialization signal line configured to transmit a first initialization voltage to a gate electrode of the driving transistor in an active display period;
the display panel further includes a second initialization signal line; a first electrode of the second initializing transistor is connected with an anode of the light emitting element, and a second electrode of the second initializing transistor is connected with the second initializing signal line;
At a first refresh frequency, the second initialization signal line is configured to transmit a fifth initialization voltage to an anode of the light emitting element in an active display period; at a second refresh frequency, the second initialization signal line is configured to transmit a sixth initialization voltage to an anode of the light emitting element in an active display phase; wherein the first refresh frequency is greater than the second refresh frequency; the sixth initialization voltage is smaller than the fifth initialization voltage.
2. The display panel of claim 1, wherein the pixel circuit comprises: a first initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, a first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, a second electrode of the first initialization transistor is connected with the initialization signal line,
The initialization signal line is configured to transmit a first initialization voltage to a gate of the driving transistor in an active display period and transmit a second initialization voltage to the second pole of the first initialization transistor in an inactive display period.
3. The display panel of claim 1, wherein the display panel further comprises: a light emitting element connected to the pixel circuit, the pixel circuit further including a second initialization transistor, a first electrode of the second initialization transistor being connected to an anode of the light emitting element, a second electrode of the second initialization transistor being connected to the initialization signal line;
The initialization signal line is configured to transmit a first initialization voltage to an anode of the light emitting element in an active display period and transmit a second initialization voltage to the second pole of the second initialization transistor in an inactive display period.
4. The display panel of claim 1, wherein the display panel further comprises: a light emitting element connected to the pixel circuit,
The pixel circuit includes: a first initialization transistor, a second initialization transistor, a driving transistor and a storage capacitor, wherein the storage capacitor is connected with the grid electrode of the driving transistor, a first electrode of the first initialization transistor is connected with the grid electrode of the driving transistor, a second electrode of the first initialization transistor is connected with the initialization signal line,
The initialization signal line serves as a first initialization signal line configured to transmit a first initialization voltage to a gate of the driving transistor in an active display period and transmit a second initialization voltage to the second pole of the first initialization transistor in an inactive display period;
the display panel further includes a second initialization signal line; a first electrode of the second initializing transistor is connected with an anode of the light emitting element, and a second electrode of the second initializing transistor is connected with the second initializing signal line;
the second initialization signal line is configured to transmit a third initialization voltage to an anode of the light emitting element in an active display period and transmit a fourth initialization voltage to the second electrode of the second initialization transistor in an inactive display period, wherein the fourth initialization voltage is greater than the third initialization voltage.
5. The display panel of claim 1, further comprising a data signal line;
the data signal line is configured to transmit a black state voltage at the first refresh frequency different from a black state voltage transmitted at the second refresh frequency.
6. A driving method of a display panel, comprising:
The initialization signal line provides an initialization signal for the pixel circuit;
The initialization signal line transmits a first initialization voltage in an effective display stage and transmits a second initialization voltage in an ineffective display stage;
Wherein the second initialization voltage is greater than the first initialization voltage; the effective display stage comprises a time period of display pictures, and the ineffective display stage comprises an interval time period between adjacent display pictures; the initialization signal line comprises a first initialization signal line and a second initialization signal line;
The first initialization signal line transmits a first initialization voltage to a gate electrode of the driving transistor in an effective display stage;
At the first refresh frequency, the second initialization signal line transmits a fifth initialization voltage to the anode of the light emitting element in an effective display stage; at a second refresh frequency, the second initialization signal line transmits a sixth initialization voltage to an anode of the light emitting element in an effective display period; the first refresh frequency is greater than the second refresh frequency; the sixth initialization voltage is smaller than the fifth initialization voltage.
7. A method for manufacturing a display panel, comprising:
Preparing a pixel circuit and an initialization signal line on a substrate;
wherein the pixel circuit is connected with the initialization signal line; the initialization signal line is used for providing an initialization signal for the pixel circuit; the initialization signal line is configured to transmit a first initialization voltage in an active display period and transmit a second initialization voltage in an inactive display period; the second initialization voltage is greater than the first initialization voltage; the effective display stage comprises a time period of display pictures, and the ineffective display stage comprises an interval time period between adjacent display pictures; the initialization signal line comprises a first initialization signal line and a second initialization signal line; the first initialization signal line is configured to transmit a first initialization voltage to a gate electrode of the driving transistor in an active display period; at a first refresh frequency, the second initialization signal line is configured to transmit a fifth initialization voltage to an anode of the light emitting element in an active display period; at a second refresh frequency, the second initialization signal line is configured to transmit a sixth initialization voltage to an anode of the light emitting element in an active display phase; the first refresh frequency is greater than the second refresh frequency; the sixth initialization voltage is smaller than the fifth initialization voltage.
8. The method for manufacturing a display panel according to claim 7, wherein,
The pixel circuit includes a transistor; the transistor comprises a semiconductor layer, an insulating layer and a grid layer which are sequentially stacked;
the preparation method for forming the transistor in the pixel circuit comprises the following steps:
a semiconductor layer, an insulating layer and a gate layer are sequentially laminated on the substrate;
And annealing the semiconductor layer and the insulating layer, and bombarding the annealed semiconductor layer by adopting ozone ions.
9. A display device, comprising: the display panel of any one of claims 1-5.
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