CN112530884A - 半导体装置以及半导体装置的制造方法 - Google Patents
半导体装置以及半导体装置的制造方法 Download PDFInfo
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- CN112530884A CN112530884A CN202010977265.2A CN202010977265A CN112530884A CN 112530884 A CN112530884 A CN 112530884A CN 202010977265 A CN202010977265 A CN 202010977265A CN 112530884 A CN112530884 A CN 112530884A
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Abstract
本发明实现安装有在背面侧具有电极的半导体元件的半导体装置的小型化、薄型化。半导体装置具备:第一半导体元件,其在主面侧具有第一电极,并在背面侧具有第二电极;基材,其设有与第一电极连接的连接导体;密封树脂,其设置在基材上,将第一半导体元件进行密封;以及第一过孔,其设于密封树脂,并与第一半导体元件的第二电极电连接。
Description
技术领域
本发明涉及一种半导体装置以及半导体装置的制造方法。
背景技术
半导体封装件利用树脂来密封半导体元件,该半导体封装件作为适于薄型化、小型化的半导体装置,例如广泛应用于电力转换装置等。作为半导体封装件的构造,已知有以下构造:将半导体元件管芯焊接于基板上,利用接合引线将半导体元件的各电极与设于基板的连接导体进行连接。但是,在该结构中,需要可承受引线接合时的加热的玻璃环氧树脂等昂贵的基板,因而无法实现低成本化。并且,在该构造中,由于与半导体元件的电极接合的接合引线在半导体元件上突出,所以半导体装置的厚度变厚。
因此,还研究了以下半导体装置:在半导体元件的与主面侧相反一侧的背面设有电极,将主面侧的电极与基板进行连接,并使用引线板之类的金属板将基板与背面侧的电极进行连接。在该结构中,金属板与半导体元件的背面侧的电极之间的接合以及金属板与基板的连接焊盘之间的接合使用焊锡等金属接合材料来进行(例如参照专利文献1)。
现有技术文献
专利文献
专利文献1:日本特开2002-76245号公报
发明内容
发明所要解决的课题
在专利文献1所记载的半导体装置中,半导体元件的背面侧的电极与金属板是利用焊锡等金属接合材料来接合的结构,接合部的厚度为金属板的厚度与金属接合材料的厚度相加,因而无法实现充分的薄型化。并且,金属板不能像连接布线那样高精细,因而小型化也存在极限。
用于解决课题的方案
本发明的第一方式的半导体装置具备:第一半导体元件,其在主面侧具有第一电极,并在背面侧具有第二电极;基材,其设有与上述第一电极连接的连接导体;密封树脂,其设置在上述基材上,将上述第一半导体元件进行密封;以及第一过孔,其设于上述密封树脂,并与上述第一半导体元件的上述第二电极电连接。
本发明的第二方式的半导体装置具备:基材;第一半导体元件,其设置在上述基材上,在与上述基材面对面的主面侧具有第一电极及第三电极,并在背面侧具有第二电极;第二半导体元件,其设置在上述基材上,在与上述基材面对面的主面侧具有第一电极及第二电极;第一连接导体,其设置在上述基材上,将上述第一半导体元件的上述第一电极与上述第二半导体元件的上述第一电极进行连接;第二连接导体,其设置在上述基材上,并与上述第二半导体元件的上述第二电极连接;密封树脂,其设置在上述基材上,将上述第一半导体元件及上述第二半导体元件进行密封;第一过孔,其设于上述密封树脂,并与上述第一半导体元件的上述第二电极电连接;以及第二过孔,其设于上述密封树脂,并与上述第二连接导体连接。
本发明的第三方式的半导体装置的制造方法包含:准备在主面侧具有第一电极并在背面侧具有第二电极的第一半导体元件的工序;将上述第一半导体元件的上述第一电极与设于基材的第一连接导体进行连接的工序;利用密封树脂将设置在上述基材上的上述第一半导体元件进行密封的工序;以及在上述密封树脂设置与上述第一半导体元件的上述第二电极电连接的第一过孔的工序。
根据本发明,能够实现安装有在背面侧具有电极的半导体元件的半导体装置的小型化、薄型化。
附图说明
图1示出本发明的第一实施方式的半导体装置,并且是从半导体装置的上方透视密封树脂而得到的布局图。
图2是图1所示的半导体装置的II-II线剖视图。
图3是图1所示的半导体装置的III-III线剖视图。
图4是用于说明图2所示的半导体装置的制造方法的图,并且是示出最初的工序的剖视图。
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图25是示出图3的变形例的剖视图。
图26是本发明的第二实施方式的半导体装置的剖视图。
图27是用于说明图26所示的半导体装置的制造方法的图,并且是示出最初的工序的剖视图。
图28是示出图27之后的工序的剖视图。
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图39是本发明的第三实施方式的半导体装置的剖视图。
图40是用于说明图39所示的半导体装置的制造方法的图,并且是示出最初的工序的剖视图。
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图62是示出图61之后的工序的剖视图。
图63是示出图62之后的工序的剖视图。
图64是示出图63之后的工序的剖视图。
图65是示出图64之后的工序的剖视图。
图66是示出图65之后的工序的剖视图。
符号的说明
100、100A、200—半导体装置,110A—第一半导体元件,110B—第三半导体元件,111—电极(第一电极),112—电极(第三电极),113—电极(第二电极),114—背面导体,120—第二半导体元件,121—电极(第一电极),122—电极(第二电极),140、150—半导体元件,151、152—电极,201—基材,210—连接导体,211—连接导体(第一连接导体),212—连接导体(第二连接导体),213—连接导体,214—(第三连接导体),215—(第四连接导体),216、217—连接导体,218、219—背面侧连接导体,251—过孔(第二过孔),252—过孔(第一过孔),253—过孔(第三过孔),254—过孔(第四过孔),251a~259a—通孔,256—中间连接部,257~259—过孔(第五过孔)。
具体实施方式
以下,参照附图来说明本发明的各实施方式。其中,在以下所示的附图中,对于各部件的形状、长度、宽度、厚度等尺寸以及长度、宽度、厚度的比率,为了明确发明的结构,适当地以与实际不同的形状、尺寸以及比率来示出。因此,图示的各部件的形状、尺寸以及长度、宽度、厚度的比率不应该与同一部件的同一要素、其它部件的同一要素对比来考虑。
-第一实施方式-
以下,参照图1至图25来说明本发明的第一实施方式。
图1示出本发明的第一实施方式的半导体装置100,并且是从半导体装置100的上方(图1中纸面跟前的位置)透视密封树脂而得到的布局图。
半导体装置100具有设置在基材201上的第一半导体元件110A、第二半导体元件120、第三半导体元件110B这三个半导体元件。第一半导体元件110A、第三半导体元件110B例如是MOS FET(Metal Oxide Semiconductor Field Effect Transistor:金属氧化物半导体场效应晶体管)。第二半导体元件120例如是具有驱动第一半导体元件110A、第三半导体元件110B的驱动电路的控制用的半导体元件。第二半导体元件120也可以包括控制驱动电路的控制电路。
在基材201的上表面201a(参照图2)上,设有图1中虚线所示的连接导体210。连接导体210包含:将第一半导体元件110A及第三半导体元件110B与第二半导体元件120连接的连接导体211;将第二半导体元件120与外部的控制装置连接的多个连接导体212;与第三半导体元件110B连接的连接导体213;以及作为将第一半导体元件110A与第三半导体元件110B连接的导体的一部分的连接导体214。
在从半导体装置100的上方(图1中纸面近前的位置)观察的俯视图中,形成在基材201上的连接导体211~214延伸至第一~第三半导体元件110A、120、110B的外侧。因此,半导体装置100是扇出型面板级封装。
第一半导体元件110A、第三半导体元件110B以及第二半导体元件120由密封树脂310密封,该密封树脂310设置为覆盖基材201的上表面201a的整个面。在密封树脂310设有五个过孔251~255。过孔251与连接导体212连接,过孔253与连接导体214连接,过孔255与连接导体213连接。过孔252与第一半导体元件110A连接,过孔254与第三半导体元件110B连接。过孔251、253、255形成为贯通密封树脂310的大致整个厚度,并且与连接导体210连接。过孔252、254设置至密封树脂310的厚度的中间程度,并且分别与设于第一半导体元件110A、第三半导体元件110B的背面侧的背面导体114(参照图2)连接。半导体装置100例如具有长度(1.5~2.0mm)×宽度(1.0~1.6mm)×厚度(0.2~0.3mm)左右的尺寸。
参照图2、图3来说明半导体装置100的详细构造。
图2是图1所示的半导体装置100的II-II线剖视图,图3是图1所示的半导体装置100的III-III线剖视图。
如图3所示,第一半导体元件110A、第三半导体元件110B具有相同构造。如图2、图3所示,第一半导体元件110A、第三半导体元件110B在主面侧即在与基材201面对面的一侧,具有绝缘膜131以及从设于绝缘膜131的开口露出的连接焊盘132。绝缘膜131由氧化硅、氮化硅等无机材料形成,连接焊盘132由铝等形成。在第一半导体元件110A、第三半导体元件110B的连接焊盘132上,设有柱状的电极111及电极112。电极111及电极112例如由铜系金属形成,并形成为几十μm的高度。并且,第一半导体元件110A、第三半导体元件110B在作为与主面侧相反一侧的背面侧具有电极113。在第一半导体元件110A、第三半导体元件110B是MOS FET的情况下,电极111是栅电极,电极112是源电极,电极113是漏电极。在电极113上层叠有背面导体114。电极113是由半导体元件制造商形成的电极,通常由铝等形成,并形成为1μm以下的厚度。背面导体114使用镍、镍/铜、或者铜并通过溅射或电镀形成为几μm左右的厚度。
基材201例如是以环氧系材料为主剂的厚度几十μm左右的绝缘片。在基材201的上表面201a上设有连接导体211、212、214(参照图2)以及连接导体213(参照图3)。连接导体211~214例如由铜系金属形成。基材201是仅在上表面201a侧具有连接导体211~214的单面布线基板。因此,与双面布线基板相比,能够实现薄型化,并且能够变得便宜。
在基材201与连接导体211~214之间,设有在通过电镀来形成连接导体211、212、214时成为电流路径的基底金属261。第一半导体元件110A及第三半导体元件110B的电极111与连接导体211连接。第一半导体元件110A的电极112与连接导体214连接,第三半导体元件110B的电极112与连接导体213连接。第一半导体元件110A及第三半导体元件110B的电极111与连接导体211、第一半导体元件110A的电极112与连接导体214、以及第三半导体元件110B的电极112与连接导体213分别利用焊锡、或者利用通过加热而成为烧结金属的烧结用金属浆料等接合材料271来接合。
如图2、图3所示,第二半导体元件120在主面侧即在与基材201面对面的一侧具有绝缘膜133以及从设于绝缘膜133的开口露出的连接焊盘134。绝缘膜133由氧化硅、氮化硅等无机材料形成,并且连接焊盘134由铝等形成。在第二半导体元件120的连接焊盘134上设有柱状的电极121、122。电极121及电极122例如由铜系金属形成,并形成为几十μm的高度。电极121与连接导体211、电极122与连接导体212分别利用焊锡、或者利用通过加热而成为烧结金属的烧结用金属浆料等接合材料271来接合。第二半导体元件120与第一半导体元件110A、第三半导体元件110B不同,在背面侧不具有电极。
此外,第一半导体元件110A及第三半导体元件110B的电极111、112以及第二半导体元件120的电极121、122示出呈柱状的例子,但例如也可以是圆顶状等柱状以外的构造,总之,只要是能够实现倒装芯片的突起电极即可。
以覆盖基材201的接合有第一~第三半导体元件110A、120、110B的上表面201a并且覆盖第一~第三半导体元件110A、120、110B各自的整个表面的方式设有密封树脂310。密封树脂310例如由环氧树脂形成。
如上所述,在密封树脂310设有五个过孔251~255。即、过孔251、253、255分别与连接导体212、214、213连接。过孔252与层叠于第一半导体元件110A的电极113的背面导体114连接。过孔254与层叠于第三半导体元件110B的电极113的背面导体114连接。
如图3所示,过孔253与过孔254由形成在密封树脂310的上表面310a上的中间连接部256连接。由此,第一半导体元件110A的电极112经由连接导体214、过孔253、中间连接部256以及过孔254而与层叠于第三半导体元件110B的背面侧的电极113的背面导体114电连接。
在密封树脂310与各过孔251~255之间,形成有在通过电镀来形成过孔251~255时成为电流路径的基底金属262。过孔251~255以及基底金属262例如使用铜系金属的电镀液来形成。
在从密封树脂310的上表面310a露出的各过孔251~255的上表面,设有焊锡或烧结合金等接合材料272。
虽未图示,但过孔251与外部的控制装置连接。过孔252与直流正极电源连接,过孔255与直流负极电源连接。第一半导体元件110A、第三半导体元件110B分别根据来自第二半导体元件120的控制信号来进行开关动作。第一半导体元件110A作为上臂电路部进行动作,第三半导体元件110B作为下臂电路部进行动作。第一半导体元件110A和第三半导体元件110B构成上下臂串联电路,将直流(DC)电转换成交流(AC)电。也就是说,从将过孔253与过孔254连接的中间连接部256输出交流电。因此,能够将半导体装置100作为马达等交流驱动装置的驱动源。
接下来,说明图1~图3所示的半导体装置100的制造方法。
图4~图24是按工序顺序来示出制造半导体装置100时的各工序的剖视图。
对于半导体装置100而言,通常在一个支撑基材上同时形成多个半导体装置100,在完成后,在边界部切断各半导体装置100而分离成各个半导体装置100。但在以下的说明中,根据制作一个半导体装置100的工序剖视图来说明其制造方法。
首先,准备支撑基材510。如图4所示,支撑基材510由以下部件构成:由玻璃等平板部件形成的基底层501;形成在基底层501上的剥离层502;以及在剥离层502上由铜系金属等形成的导电薄膜503。导电薄膜503的厚度例如为1~12μm左右。
剥离层502例如能够使用由镍合金层和碳层构成的双层结构。镍合金的与铜的蚀刻选择性优异,并且从碳层的剥离性也良好。即使碳层经由形成在碳层上的铜层而受到高温的冲压加工,也阻止与铜层的金属结合,维持容易进行基底层501的剥离除去的状态。不过,剥离层502不限定于由镍合金层和碳层构成的结构。
接下来,如图5所示,在支撑基材510的导电薄膜503上,利用绝缘材料来形成基材201。基材201例如利用层压装置将由以环氧系材料为主剂的堆积用基板材料形成的绝缘膜进行层压来形成。
接下来,如图6所示,在基材201上的整个面形成基底金属261。基底金属261例如利用化学镀使铜系金属形成为0.1~1.0mm的厚度来获得。
接下来,如图7所示,在基底金属261上的整个面形成光致抗蚀剂281。光致抗蚀剂281利用层压装置对干膜类型的光敏抗蚀膜进行层压来形成。光致抗蚀剂281可以是正型也可以是负型。在本实施方式中,示出正型的情况。
然后,如图8所示,在光致抗蚀剂281上配置光掩模282并利用曝光装置进行曝光。光掩模282具有连接导体211~214的图案形状的透明部分282a,通过曝光,正型的光致抗蚀剂281的与光掩模282的透明部分282a对应的部分281a曝光。接下来,除去光掩模282。
之后,进行光致抗蚀剂281的显影处理,使光致抗蚀剂281的被曝光的部分281a开口。
接下来,如图9所示,进行将基底金属261作为电流路径的电镀,在基底金属261上形成连接导体211~214(连接导体213在图9中未图示)。电镀例如使用铜系金属的电镀液进行。然后,除去光致抗蚀剂281(参照图10),接下来,通过蚀刻除去从连接导体211~214(以下,有时也称为连接导体210)露出的基底金属261。由此,形成图11所示的中间体。
接下来,如图12所示,将第一~第三半导体元件110A、120、110B(第三半导体元件110B在图12中未图示)的电极111、112、121、122接合于连接导体210。另外,在第一半导体元件110A、第三半导体元件110B的背面侧的电极113上预先形成背面导体114。
在进行接合之前,在各电极111、112、121、122的下端面涂敷焊锡等接合材料271,在连接导体210的分别接合电极111、112、121、122的接合部涂敷助焊剂。接下来,在倒装芯片贴装机中,各拾取一个第一~第三半导体元件110A、120、110B,并将第一~第三半导体元件110A、120、110B的各电极111、112、121、122搭载于连接导体210的规定的位置。然后,将图12所示的半导体装置100的中间体搬入回流焊装置内。通过在回流焊装置内进行加热,接合材料271熔融,第一~第三半导体元件110A、120、110B的各电极111、112、121、122分别与对应的连接导体210的规定的接合部接合。
接下来,如图13所示,利用密封树脂310将图12所示的中间体的基材201的上表面201a上的整个面密封。利用密封树脂310的密封例如使用环氧树脂,通过压模法进行。密封是覆盖基材201的整个上表面201a,以覆盖各第一~第三半导体元件110A、120、110B的整个面的方式进行。
然后,在密封树脂310中形成过孔251至255。过孔251~255的形成方法参照图14~图20进行说明。但是,在图14~图24中,仅图示了过孔251、252。
首先,如图14所示,在密封树脂310形成用于形成过孔251、252的通孔251a、252a。通孔251a、252a的形成优选为对密封树脂310照射激光而形成的方法。激光的照射若使用激光钻孔装置,则能够高效且高密度且高精度地形成通孔251a、252a,因此更优选。通孔251a从密封树脂310的上表面310a到达连接导体212。通孔252a从密封树脂310的上表面310a到达层叠于第一半导体元件110A的电极113的背面导体114。在第一半导体元件110A的背面侧形成的电极113是由半导体元件制造商形成为厚度1.0μm以下的薄层。因此,若使用激光钻孔装置形成通孔252a,则电极113可能会损伤。在本实施方式中,在第一半导体元件110A的电极113上形成厚度数μm的背面导体114。由此,能够在通孔252a的形成中使用准确且高效的激光钻孔装置。
用于形成过孔253、255的深的通孔253a、255a(未图示)的形成与深通孔251a同样地形成。用于形成过孔254的浅的通孔254a(未图示)的形成与浅的通孔252a同样地形成。
在形成通孔251a、252a之后,进行除污处理而除去密封树脂310的残膜。作为除污处理,优选为等离子体除污处理。
通孔251a~255a的形成能够使用同一激光钻孔装置在同一工序中进行。通孔251a~255a的形成例如可以与通孔的深度无关地按照通孔251a~255a的配置位置的顺序形成。或者,也可以分开形成较深的通孔251a、253a、255a和较浅的通孔252a、254a。即,也可以在深的通孔251a、253a、255a的形成完成之后,形成较浅的通孔252a、254a,或者相反地,在较浅的通孔252a、254a的形成完成之后,形成较深的通孔251a、253a、255a。在形成较深的通孔251a、253a、255a和较浅的通孔252a、254a时的激光钻孔装置的输出可以相同,也可以不同。
连续地进行通孔251a~255a的形成,只要在通孔251a~255a的形成中不进行其它工序,则为相同的工序。换言之,在形成通孔251a~255a的一部分的状态下,进行通孔形成工序以外的工序,之后,在进行剩余的通孔251a~255a的形成的情况下,不是相同的工序。
接下来,如图15所示,在密封树脂310的上表面310a整个面及通孔251a~255a的内表面整个面形成基底金属262。基底金属262例如通过利用化学镀将铜系金属形成为0.1~1.0μm的厚度而得到。也可以通过溅射来代替非电解电镀而形成。
接下来,如图16所示,在基底金属262上的整个面上形成光致抗蚀剂283。光致抗蚀剂283利用层压装置将干膜类型的光敏抗蚀膜进行层压而形成。光致抗蚀剂283可以是正型,也可以是负型。在本实施方式中,例示为正型的情况。
然后,如图17所示,在光致抗蚀剂283上配置光掩模284并利用曝光装置进行曝光。光掩模284具有与通孔251a、252a及其周缘部对应的透明部分284a,通过曝光,正型的光致抗蚀剂283与光掩模284的透明部分284a对应的部分283a被曝光。接下来,除去光掩模284。然后,进行光致抗蚀剂283的显影处理,使光致抗蚀剂283的被曝光的部分283a开口。
接下来,如图18所示,进行使基底金属262为电流路径的电镀,利用导电金属填充通孔251a、252a内而形成过孔251、252。电镀例如使用铜系金属的电镀液进行。
另外,虽未图示,但将图3所示的过孔253、254、255、以及过孔253与过孔254连接的中间连接部256也以与通孔251a、252a相同的工序形成。
然后,除去光致抗蚀剂283(参照图19),接下来,通过蚀刻除去从过孔251、252露出的基底金属262。由此,形成图20所示的中间体。
如参照图14至图20所说明的那样,与第一、第二半导体元件110A、110B的背面导体114连接的浅的过孔252、254和与连接导体210连接的深的过孔251、253、255由相同的工序形成。因此,能够提高半导体装置100的生产率。
接下来,如图21所示,在从密封树脂310的上表面310a露出的过孔251~255(253~255未图示)的上表面形成接合材料272。为了形成接合材料272,例如,在各过孔251~255上通过印刷形成焊锡膏、烧结用金属浆料等,在该状态下,进行回流焊处理,将接合材料272熔融,之后,冷却并凝固。
接下来,如图22所示,将支撑基材510的基底层501从导电薄膜503剥离。对剥离层502施加物理性的外力而在剥离层502中加入龟裂,一边使龟裂进展一边破坏剥离层502,将基底层501剥离。
接下来,如图23所示,通过蚀刻处理除去导电薄膜503。
然后,如图24中虚线所示,在预定的位置Dc将密封树脂310和基材201进行切割。由此,得到图1、图2所示的半导体装置100。
(变形例)
图25是示出图3的变形例的剖视图。
图3所示的半导体装置100是第一半导体元件110A的电极112经由连接导体214、过孔253、中间连接部256以及过孔254与层叠于第三半导体元件110B的背面侧的电极113的背面导体114电连接的构造。
与此相对,图25所示的半导体装置100具有如下构造:第一半导体元件110A的电极112和第三半导体元件110B的电极112由在基材201上形成的连接导体215连接。即,在本变形例中,不具有将第一实施方式的图3所图示那样的过孔253、254、以及连接过孔253与过孔254的中间连接部256。
根据本发明的第一实施方式,起到下述效果。
(1)半导体装置100具备:第一半导体元件110A,在主面侧具有电极111,在背面侧具有电极113;基材201,设有与电极111连接的连接导体210;密封树脂310,设于基材201上,将第一半导体元件110A进行密封;以及过孔252,设于密封树脂310,与第一半导体元件110A的电极113电连接。
另外,半导体装置100的制造方法包含:准备在主面侧具有电极111、在背面侧具有电极113的第一半导体元件110A;将第一半导体元件110A的电极111与设于基材201的第一连接导体211连接;利用密封树脂310将设于基材201上的第一半导体元件110A密封;以及在密封树脂310设置与第一半导体元件110A的电极113电连接的过孔252。
在第一实施方式的半导体装置100以及半导体装置100的制造方法中,在第一半导体元件110A的背面侧的电极113上连接有形成于密封树脂310的过孔252。在利用焊锡等接合材料将金属板接合于第一半导体元件110A的背面侧的电极113的以往的构造中,接合部的厚度是金属板的厚度和接合材料的厚度相加的厚度,因此无法实现充分的薄型化。另外,由于金属板不能像连接布线那样高精细,所以无法实现充分的小型化。与此相对,在基于过孔252的连接中,不需要接合材料,过孔252的长度(深度)能够远远短于金属板的厚度加上接合材料的厚度的厚度。另外,形成于密封树脂310的过孔252与形成于电路基板的通孔相同,因此能够高精细地形成。因此,能够实现半导体装置100的薄型化及小型化。另外,由于过孔252的长度变短,因此能够减小连接电阻。
(2)半导体装置100还具备层叠于第一半导体元件110A的电极113的背面导体114。背面导体114即使被照射激光也不会破损,因此能够对密封树脂310照射激光而形成在密封树脂310形成的通孔252a。由此,能够高效且高精度地形成通孔252a。
(3)半导体装置100还具备具有电极121以及电极122的第二半导体元件120,连接导体210包含将第二半导体元件120的电极121与第一半导体元件110A的电极111进行电连接的第一连接导体211。
在如以往那样将金属板的一端连接于第一半导体元件110A的背面侧的电极113的构造中,需要将金属板的另一端连接于连接配线。但是,金属板不像形成于电路基板的连接布线那样是高精细部件,因此基材201的面积大型化。与此相对,在本实施方式中,能够经由第一连接导体211高密度地连接第二半导体元件120的电极121和第一半导体元件110A的电极111,因此能够实现半导体装置100的小型化。
(4)在上述(3)中,连接导体210包含与第二半导体元件120的电极122连接的连接导体212,并且在密封树脂310还设有与连接导体212连接的过孔251。这样,能够还设置连接导体212以及与连接导体212连接的通路251,从而能够应用于需要更复杂的布线的半导体装置,并且能够实现薄型化及小型化。
(5)还具备在主面侧具有电极121及电极122的第二半导体元件120,连接导体210包含与第二半导体元件的电极122连接的连接导体212,在密封树脂310还设有与连接导体212连接的过孔251。由于经由设于密封树脂310的过孔251将设于基材201的连接导体212引绕至密封树脂310的上表面310a侧,所以形成于基材201的连接导体210的引绕变得简单。因此,能够使基材201成为例如单面布线基板等简单的构造,从而能够使基材201变便宜。
-第二实施方式-
图26是本发明的第二实施方式的半导体装置的剖视图。
第二实施方式的半导体装置100具有一个半导体元件140。
半导体元件140的构造与图3所示的半导体元件110A、110B的构造相同,具有绝缘膜131、连接焊盘132、柱状的电极111、112、背面侧的电极113以及背面导体114。
在基材201上设有连接导体212、213。在基材201与连接导体212、213之间未设置图3所示的基底金属261。半导体元件140的电极111、112分别与连接导体212、213接合。电极111、112与连接导体212、213分别利用焊锡或烧结用金属浆料等接合材料271来接合。
半导体元件140由设置为覆盖基材201的上表面201a的密封树脂310密封。在密封树脂310设有过孔252、257、258。过孔252与层叠于半导体元件140的背面侧的电极113的背面导体114连接。过孔257、258分别与连接导体212、213连接。即,过孔257经由连接导体212而与半导体元件140的电极111连接,并且过孔258经由连接导体213而与半导体元件140的电极112连接。在各过孔252、257、258与密封树脂310的通孔252a、257a、258a(参照图30)之间,设有在通过电镀来形成过孔252、257、258时成为电流路径的基底金属262。
在过孔252、257、258各自的从密封树脂310的上表面310a露出的上表面设有焊锡或烧结金属等接合材料272。
接下来,说明图26所示的半导体装置100的制造方法。
图27~图38是按工序顺序来示出制造半导体装置100时的各工序的剖视图。
在以下的说明中,示出同时制作两个具有半导体元件140的半导体装置100的方法的例子。第二实施方式的制造方法也包含与第一实施方式相同的制造方法,并且适当地省略与第一实施方式相同的制造方法的说明。
首先,准备具有制作两个具有半导体元件140的半导体装置100的足够面积的基材201。作为基材201的材料,能够使用环氧树脂、玻璃环氧树脂等树脂或者陶瓷等。
如图27所示,使用形成通常的单面布线基板的方法的技术在基材201的上表面201a上来形成两对连接导体212、213。
此外,制作两个半导体装置100的工序同时并行地进行,为了容易理解说明,以下,说明制作一个半导体装置100的方法。
接下来,如图28所示,将半导体元件140的电极111、112分别接合于连接导体212、213。在半导体元件140的背面侧的电极113上预先形成有背面导体114。
在进行接合前,预先在各电极111、112的下端面涂敷有焊锡等接合材料271,并且预先在连接导体212、213的分别接合电极111、112的接合部涂敷有助熔剂。然后,在倒装芯片接合器中,各一个地拾取半导体元件140,并将半导体元件140的各电极111、112搭载于连接导体212、213的预定位置。在该状态下,将图28所示的半导体装置100的中间体搬入到回流焊装置内。通过在回流焊装置内进行加热,使接合材料271熔融,将半导体元件140的各电极111、112分别与对应的连接导体212、213的预定接合部接合。
接下来,如图29所示,利用密封树脂310将图28所示的中间体的基材201的上表面201a的整个面进行密封。密封树脂310的密封例如使用环氧树脂并通过压模法来进行。以覆盖基材201的上表面201a的整个面并且覆盖半导体元件140的整个面的方式进行密封。
接下来,在密封树脂310形成过孔252、257、258。参照图30~图36来说明过孔252、257、258的形成方法。
首先,如图30所示,形成用于形成过孔252、257、258的通孔252a、257a、258a。通孔252a、257a、258a的形成优选为使用激光钻孔装置来形成的方法。通孔257a、258a从密封树脂310的上表面310a到达连接导体212、213。通孔252a从密封树脂310的上表面310a到达层叠于半导体元件140的电极113的背面导体114。
通孔257a、258a比通孔252a深。但是,通孔252a、257a、258a的形成能够使用同一激光钻孔装置并在同一工序中进行。也就是说,通孔252a、257a、258a的形成也可以与通孔的深度无关地按照通孔252a、257a、258a的配置位置的顺序来形成,并且也可以分开形成较深的通孔257a、258a和较浅的通孔252a。
在形成通孔252a、257a、258a之后,进行除污处理来除去密封树脂310的残膜。作为除污处理,优选为等离子体除污处理。
接下来,如图31所示,在密封树脂310的上表面310a的整个面以及通孔252a、257a、258a的内表面的整个面形成基底金属262。基底金属262例如利用化学镀使铜系金属形成为0.1~1.0μm的厚度来获得。
接下来,如图32所示,在基底金属262上的整个面形成光致抗蚀剂283。光致抗蚀剂283利用层压装置对干膜类型的光敏抗蚀膜进行层压来形成。光致抗蚀剂283可以是正型也可以是负型。在本实施方式中,示出正型的情况。
然后,如图33所示,在光致抗蚀剂283上配置光掩模284并利用曝光装置进行曝光。光掩模284具有与通孔252a、257a、258a及其周缘部对应的透明部分284a,通过曝光,正型的光致抗蚀剂283的与光掩模284的透明部分284a对应的部分283a曝光。接下来,除去光掩模284。之后,进行光致抗蚀剂283的显影处理,使光致抗蚀剂281的被曝光的部分283a开口。
接下来,如图34所示,进行将基底金属262作为电流路径的电镀,用导电金属填充通孔252a、257a、258a内来形成过孔252、257、258。电镀例如使用铜系金属的电镀液来进行。
然后,除去光致抗蚀剂283(参照图35),接着,通过蚀刻来除去从过孔252、257、258露出的基底金属262。由此,形成图36所示的中间体。
接下来,如图37所示,在从密封树脂310的上表面310a露出的过孔252、257、258的上表面形成接合材料272。为了形成接合材料272,例如,通过印刷在各过孔252、257、258上形成焊膏、烧结用金属浆料等,在该状态下进行回流焊处理,将接合材料272熔融,之后冷却并凝固。由此,在基材201上相邻地形成两个半导体装置100。
然后,如图38所示,在边界部处将相邻配置的两个半导体装置100的密封树脂310及基材201进行切割。由此,得到图26所示的半导体装置100。
在第二实施方式中,半导体装置100也具有:半导体元件140,其在主面侧具有电极111,并在背面侧具有电极113;基材201,其设有与电极111连接的连接导体212;密封树脂310,其设置在基材201上,将半导体元件140进行密封;以及过孔252,其设于密封树脂310,并与半导体元件140的电极113电连接。因此,在第二实施方式中,也起到与第一实施方式的效果(1)相同的效果。
并且,在第二实施方式中,半导体装置100也具有层叠于半导体元件140的电极113的背面导体114。因此,在第二实施方式中,也起到与第一实施方式的效果(2)相同的效果。
在第二实施方式中,在密封树脂310还设有与连接导体210连接的过孔257。由于经由设于密封树脂310的过孔257将设于基材201的连接导体210引绕至密封树脂310的上表面310a侧,所以形成于基材201的连接导体210的引绕变得简单。因此,在第二实施方式中,也起到与第一实施方式的效果(3)、(4)相同的效果。
-第三实施方式-
图39是本发明的第三实施方式的半导体装置的剖视图。
第三实施方式的半导体装置200具备半导体装置100A和半导体元件150。
半导体装置100A具有半导体元件140、过孔252、257、259、形成有表面侧的连接导体212、216、217及背面侧连接导体218、219的基材201、密封树脂310、以及接合材料272。
半导体装置100A中的基材201是形成有表面侧的连接导体212、216、217及背面侧连接导体218、219的双面布线基板。并且,半导体装置100A中的半导体元件140的电极112与连接导体216连接,形成于密封树脂的过孔259与连接导体217连接。除此之外,半导体装置100A与第二实施方式的半导体装置100大致相同。
半导体元件150与形成于基材201的背面侧连接导体218、219连接。
以下,更详细地说明半导体装置200的结构。
与图26所示的构造相同,半导体元件140的构造具有绝缘膜131、连接焊盘132、柱状的电极111、112、背面侧的电极113以及背面导体114。
在基材201中,在上表面201a侧形成有连接导体212、216、217,并且在下表面201b侧形成有背面侧连接导体218、219。连接导体216经由过孔216a与背面侧连接导体218连接。连接导体217经由过孔217a而与背面侧连接导体219连接。
半导体元件150在与基材201面对面的一侧具有绝缘膜135以及从设于绝缘膜135的开口露出的连接焊盘136。在半导体元件150的主面侧设有与连接焊盘136接合的柱状的电极151、152。电极151由接合材料271而与背面侧连接导体218连接。电极152由接合材料271而与背面侧连接导体219连接。
半导体元件140的电极111由接合材料271而与连接导体212接合。过孔257与连接导体212连接。因此,过孔257经由连接导体212而与半导体元件140的电极111连接。
半导体元件140的电极112由接合材料271而与连接导体216接合。过孔216a与背面侧连接导体218接合。因此,半导体元件140的电极112经由连接导体216、过孔216a、背面侧连接导体218而与半导体元件150的电极151连接。
过孔259与连接导体217连接。过孔217a与背面侧连接导体219接合。因此,过孔259经由连接导体217、过孔217a、背面侧连接导体219而与半导体元件150的电极152连接。
此外,半导体装置100A具有在通过电镀来形成过孔252、257、259时成为电流路径的基底金属262、以及在通过电镀来形成连接导体212、216、217时成为电流路径的基底金属263。
接下来,说明图39所示的半导体装置200的制造方法。
图40~图66是按工序顺序来示出制造半导体装置100A时的各工序的剖视图。
在以下的说明中,示出同时制作两个半导体装置200的方法的例子,该半导体装置200具有半导体装置100A以及半导体元件150。并且,第三实施方式的制造方法也包含与第一实施方式相同的制造方法,并且适当地省略与第一实施方式相同的制造方法的说明。
首先,准备具有制作两个具有半导体元件140的半导体装置100A的足够的面积的支撑基材510。如图40所示,支撑基材510由以下部件构成:由玻璃等平板部件形成的基底层501;形成在基底层501上的剥离层502;以及在剥离层502上由铜系金属等形成的导电薄膜503。导电薄膜503的厚度例如为1~12μm左右。
接下来,如图41所示,在支撑基材510的导电薄膜503上形成光致抗蚀剂285。光致抗蚀剂285利用层压装置对干膜类型的光敏抗蚀膜进行层压来形成。光致抗蚀剂285可以是正型也可以是负型。在本实施方式中,示出正型的情况。
然后,如图42所示,在光致抗蚀剂285上配置光掩模286并利用曝光装置进行曝光。光掩模286具有连接导体218、219的图案形状的透明部分286a,通过曝光,正型的光致抗蚀剂285的与光掩模286的透明部分286a对应的部分285a曝光。接下来,除去光掩模286。
之后,进行光致抗蚀剂285的显影处理,使光致抗蚀剂285的被曝光的部分285a开口。
接下来,如图43所示,进行将支撑基材510的导电薄膜503作为电流路径的电解,在导电薄膜503上形成连接导体218、219。电镀例如使用铜系金属的电镀液来进行。
然后,如图44所示,除去光致抗蚀剂285。
接下来,如图45所示,在导电薄膜503及连接导体218、219上形成由绝缘材料形成的基材201。基材201例如利用层压装置将由以环氧系材料为主剂的堆积用基板材料形成的绝缘膜进行层压来形成。
接下来,如图46所示,在基材201上形成贯通基材201的通孔216c、217c。通孔216c、217c的形成优选为使用激光钻孔装置来形成的方法。在形成通孔216c、217c之后,进行除污处理来除去216c、217c的残膜。作为除污处理,优选为等离子体除污处理。
接下来,如图47所示,在基材201的上表面201a上的整个面以及通孔216c、217c的内表面的整个面形成基底金属263。基底金属263例如利用化学镀使铜系金属形成为0.1~1.0μm的厚度来获得。
接下来,如图48所示,在基底金属263上的整个面形成光致抗蚀剂287。光致抗蚀剂287利用层压装置将干膜类型的光敏抗蚀膜进行层压来形成。光致抗蚀剂287可以是正型也可以是负型。在本实施方式中,示出正型的情况。
然后,如图49所示,在光致抗蚀剂287上配置光掩模288并利用曝光装置进行曝光。光掩模288具有与连接导体212、216、217对应的透明部分288a,通过曝光,正型的光致抗蚀剂287的与光掩模288的透明部分288a对应的部分287a曝光。接下来,除去光掩模288。之后,进行光致抗蚀剂287的显影处理,使光致抗蚀剂287的被曝光的部分287a开口。
接下来,如图50所示,进行将基底金属263作为电流路径的电镀,用导电金属填充在通孔216c、217c内来形成过孔216a、217a,并且在光致抗蚀剂287的开口部内形成导电金属来形成连接导体212、216、217。电镀例如使用铜系金属的电镀液来进行。
然后,除去光致抗蚀剂287(参照图51),接着,通过蚀刻来除去从连接导体212、216、217露出的基底金属263。由此,形成图52所示的中间体。
接下来,如图53所示,将半导体元件140的电极111、112分别接合于连接导体212、216。并且,预先在半导体元件140的背面侧的电极113上形成有背面导体114。
在进行接合之前,预先在各电极111、112的下端面涂敷有焊锡等接合材料271,并且预先在连接导体212、216的分别接合电极111、112的接合部涂敷有助熔剂。然后,在倒装芯片接合器中,各一个地拾取半导体元件140,并将半导体元件140的各电极111、112搭载于连接导体212、216的预定位置。在该状态下,将图53所示的半导体装置200的中间体搬入到回流焊装置内。通过在回流焊装置内进行加热,将接合材料271熔融,来将半导体元件140的各电极111、112分别与对应的连接导体212、216的预定接合部接合。
接下来,如图54所示,利用密封树脂310将图53所示的中间体的基材201的上表面201a上的整个面进行密封。密封树脂310的密封例如使用环氧树脂并通过压模法来进行。以覆盖基材201的上表面201a的整个面并且覆盖半导体元件140的整个面的方式进行密封。
接下来,在密封树脂310形成过孔252、257、259。参照图55~图60来说明过孔252、257、259的形成方法。
首先,如图55所示,形成用于形成过孔252、257、259的通孔252a、257a、259a。通孔252a、257a、259a的形成优选为使用激光钻孔装置来形成的方法。通孔257a、259a从密封树脂310的上表面310a到达连接导体212、217。通孔252a从密封树脂310的上表面310a到达层叠于半导体元件140的电极113的背面导体114。
通孔257a、259a比通孔252a深。但是,通孔252a、257a、259a的形成能够使用同一激光钻孔装置并在同一工序中进行。也就是说,通孔252a、257a、259a的形成也可以与通孔的深度无关地按照所配置的位置的顺序来形成,并且也可以分开形成较深的通孔257a、259a和较浅的通孔252a。
在形成通孔252a、257a、259a之后,进行除污处理来除去密封树脂310的残膜。作为除污处理,优选为等离子体除污处理。
接下来,如图56所示,在密封树脂310的上表面310a的整个面以及通孔252a、257a、259a的内表面的整个面形成基底金属262。基底金属262例如利用化学镀使铜系金属形成为0.1~1.0μm的厚度来获得。
接下来,如图57所示,在上表面310a上的基底金属262上的整个面形成光致抗蚀剂283。光致抗蚀剂283利用层压装置将干膜类型的光敏抗蚀膜进行层压来形成。光致抗蚀剂283可以是正型也可以是负型。在本实施方式中,示出正型的情况。
然后,如图58所示,在光致抗蚀剂283上配置光掩模284并利用曝光装置进行曝光。光掩模284具有与通路252a、257a、259a及其周缘部对应的透明部分284a,通过曝光,正型的光致抗蚀剂283的与光掩模284的透明部分284a对应的部分283a曝光。接下来,除去光掩模284。之后,进行光致抗蚀剂283的显影处理,使光致抗蚀剂283的被曝光的部分283a开口。
接下来,如图59所示,进行将基底金属262作为电流路径的电镀,用导电金属填充通孔252a、257a、259a内来形成过孔252、257、259。电镀例如使用铜系金属的电镀液来进行。
然后,除去光致抗蚀剂283(参照图60),接着,通过蚀刻来除去从过孔252、257、259露出的基底金属262。由此,形成图61所示的中间体。
接下来,如图62所示,在从密封树脂310的上表面310a露出的过孔252、257、259的上表面形成接合材料272。为了形成接合材料272,例如,通过印刷在各过孔252、257、259上形成焊膏、烧结用金属浆料等,在该状态下进行回流焊处理,将接合材料272熔融,之后冷却并凝固。由此,在基材201上相邻地形成两个半导体装置100A。
接下来,如图63所示,从导电薄膜503剥离支撑基材510的基底层501。对剥离层502施加物理性的外力来使剥离层502产生裂纹,使裂纹增加来破坏剥离层502,之后剥离基底层501。
接下来,如图64所示,通过蚀刻处理来除去导电薄膜503。
然后,将半导体元件150的电极151、152分别以面朝下的方式接合于连接导体218、219。图65中,示出半导体元件150配置于基材201的下方的情况,但实际上在进行接合时,将图65所示的半导体装置200的中间体上下反转,并在将半导体元件150配置于基材201的上方的状态下进行接合。
在进行接合前,预先在各电极151、152的下端面涂敷有焊锡等接合材料271,并且预先在连接导体218、219的分别接合电极151、152的接合部涂敷有助熔剂。然后,在倒装芯片接合器中,各一个地拾取半导体元件150,并将半导体元件150的各电极151、152搭载于连接导体218、219的预定位置。在该状态下,将图65所示的半导体装置200的中间体搬入到回流焊装置内。通过在回流焊装置内进行加热,将接合材料271熔融,来将半导体元件150的各电极151、152分别与对应的连接导体218、219的预定接合部接合。
然后,如图66所示,在边界部处将相邻配置的两个半导体装置100A的密封树脂310及基材201进行切割。由此,得到图39所示的半导体装置200。
在第三实施方式中,半导体装置100A也具有:半导体元件140,其在主面侧具有电极(第一电极)111,并在背面侧具有电极(第二电极)113;基材201,其设有与电极111连接的连接导体212;密封树脂310,其设置在基材201上,将半导体元件140进行密封;以及过孔(第一过孔)252,其设于密封树脂310,并与半导体元件140的电极113电连接。因此,在第三实施方式中,也起到与第一实施方式的效果(1)相同的效果。
并且,在第三实施方式中,半导体装置100A也具有层叠于半导体元件140的电极113的背面导体114。因此,在第三实施方式中,也起到与第一实施方式的效果(2)相同的效果。
在第三实施方式中,在密封树脂310还设有与连接导体210连接的过孔(第五过孔)257。由于经由设于密封树脂310的过孔257将设于基材201的连接导体210引绕至密封树脂310的上表面310a侧,所以形成于基材201的连接导体210的引绕变得简单。因此,在第三实施方式中,也起到与第一实施方式的效果(3)、(4)相同的效果。
此外,在上述各实施方式中,示出了例如使用激光钻孔装置等照射激光来形成在密封树脂310形成的通孔251a~259a的方法。但是,形成于密封树脂310的通孔251a~259a也能够通过蚀刻来形成。在由激光钻孔装置等形成通孔251a~259a的情况下,需要在第一半导体元件110A、第三半导体元件110B以及半导体元件140的背面侧的电极113上设置背面导体114,但在通过蚀刻来形成通孔251a~259a的情况下,也可以不在电极113上设置背面导体114。
在上述第一实施方式中,示出了将第一半导体元件110A、第三半导体元件110B设为MOS FET的例子,但也可以代替MOS FET而使用IGBT(Insulated Gate BipolarTransistor:绝缘栅双极型晶体管)等其它晶体管、其它有源元件。在IGBT的情况下,将MOSFET的漏极、栅极、源极分别置换成集电极、栅极、发射极即可。
在上述各实施方式中,也可以采用使过孔252、254兼有作为散热部件的功能、或者将散热部件与过孔252、254连接的构造。
综上所述,对各种实施方式及变形例进行了说明,但本发明并不限定于上述内容。在本发明的技术思想的范围内考虑的其它方式也包括在本发明的范围内。
Claims (14)
1.一种半导体装置,其特征在于,具备:
第一半导体元件,其在主面侧具有第一电极,并在背面侧具有第二电极;
基材,其设有与上述第一电极连接的连接导体;
密封树脂,其设置在上述基材上,并将上述第一半导体元件进行密封;以及
第一过孔,其设于上述密封树脂,并与上述第一半导体元件的上述第二电极电连接。
2.根据权利要求1所述的半导体装置,其特征在于,
还具备层叠于上述第一半导体元件的上述第二电极的背面导体。
3.根据权利要求1所述的半导体装置,其特征在于,
还具备在主面侧具有第一电极及第二电极的第二半导体元件,
上述连接导体包含将上述第二半导体元件的上述第一电极与上述第一半导体元件的上述第一电极电连接的第一连接导体。
4.根据权利要求3所述的半导体装置,其特征在于,
上述连接导体包含与上述第二半导体元件的上述第二电极连接的第二连接导体,
在上述密封树脂还设有与上述第二连接导体连接的第二过孔。
5.根据权利要求1所述的半导体装置,其特征在于,
还具备在主面侧具有第一电极和第三电极并在背面侧具有第二电极的第三半导体元件,
上述第一半导体元件在主面侧还具有第三电极,
上述连接导体包含与上述第一半导体元件的第三电极连接的第三连接导体,
在上述密封树脂设有与上述第三连接导体连接的第三过孔以及与上述第三半导体元件的上述第二电极连接的第四过孔,
在上述密封树脂上设有与上述第三过孔及上述第四过孔连接的中间连接部。
6.根据权利要求1所述的半导体装置,其特征在于,
还具备在主面侧具有第一电极和第三电极并在背面侧具有第二电极的第三半导体元件,
上述第一半导体元件在主面侧还具有第三电极,
上述连接导体包含将上述第一半导体元件的上述第三电极与上述第三半导体元件的上述第三电极连接的第四连接导体。
7.根据权利要求1所述的半导体装置,其特征在于,
在上述密封树脂还设有与上述连接导体连接的第五过孔。
8.一种半导体装置,其特征在于,具备:
基材;
第一半导体元件,其设置在上述基材上,在与上述基材面对面的主面侧具有第一电极及第三电极,并在背面侧具有第二电极;
第二半导体元件,其设置在上述基材上,在与上述基材面对面的主面侧具有第一电极及第二电极;
第一连接导体,其设置在上述基材上,将上述第一半导体元件的上述第一电极与上述第二半导体元件的上述第一电极进行连接;
第二连接导体,其设置在上述基材上,并与上述第二半导体元件的上述第二电极连接;
密封树脂,其设置在上述基材上,将上述第一半导体元件及上述第二半导体元件进行密封;
第一过孔,其设于上述密封树脂,并与上述第一半导体元件的上述第二电极电连接;以及
第二过孔,其设于上述密封树脂,并与上述第二连接导体连接。
9.根据权利要求8所述的半导体装置,其特征在于,
上述第一半导体元件还具有层叠于上述第一半导体元件的上述第二电极的背面导体。
10.一种半导体装置的制造方法,其特征在于,包含:
准备在主面侧具有第一电极并在背面侧具有第二电极的第一半导体元件的工序;
将上述第一半导体元件的上述第一电极与设于基材的第一连接导体连接的工序;
利用密封树脂将设置在上述基材上的上述第一半导体元件进行密封的工序;以及
在上述密封树脂设置与上述第一半导体元件的上述第二电极电连接的第一过孔的工序。
11.根据权利要求10所述的半导体装置的制造方法,其特征在于,
准备上述第一半导体元件的工序包含在上述第一半导体元件的上述第二电极上设置背面导体的工序。
12.根据权利要求11所述的半导体装置的制造方法,其特征在于,还包含:
准备在主面侧具有第一电极及第二电极的第二半导体元件的工序;
将上述第二半导体元件的上述第一电极与上述第一连接导体连接的工序;以及
将上述第二半导体元件的上述第二电极与设置在上述基材上的第二连接导体连接的工序,
利用密封树脂将上述第一半导体元件进行密封的工序还包含利用上述密封树脂将上述第二半导体元件进行密封的工序,
在上述密封树脂设置与上述第二连接导体连接的第二通孔。
13.根据权利要求12所述的半导体装置的制造方法,其特征在于,
在上述密封树脂设置上述第一过孔及上述第二过孔的工序包含以下工序:向上述密封树脂照射激光,来形成从上述密封树脂的表面到达设置在上述第一半导体元件的上述第二电极上的上述背面导体的第一通孔、以及从上述密封树脂的上述表面到达上述第二连接导体的第二通孔。
14.根据权利要求13所述的半导体装置的制造方法,其特征在于,
上述第一通孔及上述第二通孔使用同一激光装置并在同一工序中形成。
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JP2001332866A (ja) * | 2000-05-24 | 2001-11-30 | Matsushita Electric Ind Co Ltd | 回路基板及びその製造方法 |
US20090230535A1 (en) * | 2008-03-12 | 2009-09-17 | Infineon Technologies Ag | Semiconductor module |
US20090230541A1 (en) * | 2008-03-13 | 2009-09-17 | Renesas Technology Corp. | Semiconductor device and manufacturing method of the same |
JP2011222554A (ja) * | 2010-04-02 | 2011-11-04 | Denso Corp | 半導体チップ内蔵配線基板 |
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CN116581099A (zh) * | 2023-05-19 | 2023-08-11 | 深圳市芯友微电子科技有限公司 | 一种mos芯片的板级封装结构 |
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US20210082820A1 (en) | 2021-03-18 |
JP7157028B2 (ja) | 2022-10-19 |
JP2021048183A (ja) | 2021-03-25 |
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