CN112385016A - 半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜 - Google Patents

半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜 Download PDF

Info

Publication number
CN112385016A
CN112385016A CN201980045678.2A CN201980045678A CN112385016A CN 112385016 A CN112385016 A CN 112385016A CN 201980045678 A CN201980045678 A CN 201980045678A CN 112385016 A CN112385016 A CN 112385016A
Authority
CN
China
Prior art keywords
thermosetting resin
resin composition
adhesive
die
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201980045678.2A
Other languages
English (en)
Inventor
山本和弘
国土由衣
藤尾俊介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Original Assignee
Showa Denko KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK filed Critical Showa Denko KK
Publication of CN112385016A publication Critical patent/CN112385016A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35—Heat-activated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02—Non-macromolecular additives
    • C09J11/04—Non-macromolecular additives inorganic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/10—Adhesives in the form of films or foils without carriers
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/40—Adhesives in the form of films or foils characterised by release liners
    • C09J7/403—Adhesives in the form of films or foils characterised by release liners characterised by the structure of the release feature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00—Additional features of adhesives in the form of films or foils
    • C09J2301/20—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive itself
    • C09J2301/208—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive itself the adhesive layer being constituted by at least two or more adjacent or superposed adhesive layers, e.g. multilayer adhesive
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00—Additional features of adhesives in the form of films or foils
    • C09J2301/30—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/304—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier the adhesive being heat-activatable, i.e. not tacky at temperatures inferior to 30°C
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00—Additional features of adhesives in the form of films or foils
    • C09J2301/30—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/312—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier parameters being the characterizing feature
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2433/00—Presence of (meth)acrylic polymer
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2461/00—Presence of condensation polymers of aldehydes or ketones
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2463/00—Presence of epoxy resin
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2467/00—Presence of polyester
    • C09J2467/006—Presence of polyester in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053—Bonding environment
    • H01L2224/83095—Temperature settings
    • H01L2224/83096—Transient conditions
    • H01L2224/83097—Heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06506—Wire or wire-like electrical connections between devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06565—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having the same size and there being no auxiliary carrier between the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06575—Auxiliary carrier between devices, the carrier having no electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Die Bonding (AREA)

Abstract

本发明的一方面所涉及的半导体装置的制造方法包括：准备切晶粘晶一体型膜的工序，所述切晶粘晶一体型膜具备黏合层、压敏胶黏层及基材膜，所述黏合层由120℃下的熔融粘度为3100Pa·s以上的热固性树脂组合物形成；将切晶粘晶一体型膜的黏合层侧的面与半导体晶圆贴合的工序；切割半导体晶圆的工序；通过扩张基材膜而获得带黏合剂的半导体元件的工序；自压敏胶黏层拾取带黏合剂的半导体元件的工序；将该半导体元件经由所述黏合剂而层叠于其他半导体元件的工序；以及使所述黏合剂热固化的工序。

Description

半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体 型膜
技术领域
本发明涉及一种半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜。
背景技术
半导体装置是经过以下的工序而制造的。首先，利用切割用压敏胶片(pressure-sensitive adhesive sheet)固定半导体晶圆，在该状态下将半导体晶圆单片化为半导体芯片。其后，实施扩张(expand)工序、拾取(pickup)工序、粘晶(die bonding)工序、回流(reflow)工序及粘晶(die bonding)工序等。
作为半导体装置所要求的重要特性之一，可列举连接可靠性。为了提高连接可靠性，正在进行考虑到耐热性、耐湿性及耐回流性等特性的粘晶用膜状黏合剂(adhesive)的开发。例如，专利文献1中公开一种含有树脂及填料的胶黏片，所述树脂包含高分子量成分、及以环氧树脂为主成分的热固性成分。
以往技术文献
专利文献
专利文献1：日本专利特开2016-190964号公报
发明内容
发明要解决的技术课题
本发明人等正在进行在通过将半导体元件层叠成多段而高容量化的半导体装置(例如三维NAND型存储器)的制造工艺中使用的热固性黏合剂的开发。三维NAND用晶圆由于包含复杂的电路层及较薄的半导体层(例如15μm～25μm左右)，因此具有将其单片化而得的半导体元件容易发生翘曲的课题。
图5(a)是示意性表示半导体装置的制造过程中的结构体的剖视图。图5(a)所示的结构体30具备：基板10及层叠于基板10上的四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4。为了与形成于基板10的表面的电极(未图示)连接，四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4在横向(与层叠方向正交的方向)上相互错开的位置层叠(参考图1)。半导体元件S1通过黏合剂而胶黏于基板10，在三个半导体元件S2、半导体元件S3、半导体元件S4之间也存在黏合剂。
根据本发明人等的研究，在半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4分别具有复杂的电路层(上表面侧)及较薄的半导体层(下表面侧)的情况下，如图5(b)所示，在第一段的半导体元件S1与第二段的半导体元件S2之间容易产生剥离。关于其原因，本发明人等推测如下。
·如上所述，由于复杂的電路层及薄的半导体层，半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4具有容易翘曲的性质(翘曲应力)。
·通过将多个半导体元件在横向上错开位置进行层叠，而形成有悬突部H。
·已确认在安装第二段的半导体元件S2的階段不会发生剥离，因此通过安装第三段的半导体元件S3及第四段的半导体元件S4，在第二段的半导体元件S2的悬突部H中，向上的力(在与第一段的半导体元件S1之间剥离的方向上的翘曲应力)增加。
本发明是鉴于上述课题而成的，提供一种半导体装置的制造方法，其中半导体装置是层叠有多个半导体元件的方式的半导体装置，且难以产生相邻的半导体元件之间的剥离。并且，本发明还提供一种能够适用于该制造方法中的热固性树脂组合物及切晶粘晶一体型膜。
用于解决技术课题的手段
本发明的一方面提供一种层叠有多个半导体元件的方式的半导体装置(例如，三维NAND型存储器)的制造方法。该制造方法包括：准备切晶粘晶一体型膜的工序，所述切晶粘晶一体型膜依次具备黏合层、压敏胶黏层(pressure-sensitive adhesive layer)及基材膜，所述黏合层由120℃下的熔融粘度为3100Pa·s以上的热固性树脂组合物形成；将切晶粘晶一体型膜的黏合层侧的面与半导体晶圆贴合的工序；切割半导体晶圆的工序；通过扩张基材膜而获得将半导体晶圆及黏合层单片化而成的带黏合剂的半导体元件的工序；自压敏胶黏层拾取带黏合剂的半导体元件的工序；将带黏合剂的半导体元件，经由该带黏合剂的半导体元件的黏合剂而层叠于其他半导体元件的工序；以及使膜状黏合剂热固化的工序。
作为热固性树脂组合物，通过采用120℃下的熔融粘度为3100Pa·s以上的组合物，即便应胶黏的半导体元件具有较强的翘曲应力，也能够实现可耐受所述翘曲应力的界面胶接力。由此，即便层叠多个半导体元件，也能够充分抑制相邻的半导体元件之间的剥离。
如三维NAND用半导体晶圆，为了将较薄的半导体晶圆单片化而获得半导体元件，就高成品率等观点而言，优选在对半导体晶圆进行隐形切割(stealth dicing)或刀片切割(blade dicing)之后，在冷却条件下(例如，-15℃～0℃)进行扩张。
本发明的一方面提供一种热固性树脂组合物，其用于半导体装置的制造工艺中，所述热固性树脂组合物的120℃下的熔融粘度为3100Pa·s以上。该热固性树脂组合物能够适用于上述半导体装置的制造方法中。
热固性树脂组合物含有热固性树脂、分子量为10万～100万的高分子量成分(例如丙烯酸树脂)及填料，以热固性树脂组合物的总质量为基准，高分子量成分的含量优选为15质量％～50质量％，填料的含量优选为25质量％～45质量％。通过将高分子量成分及填料的含量设为上述范围，能够在对半导体晶圆进行隐形切割或刀片切割之后，通过在冷却条件下进行扩张及拾取，而更有效率且稳定地制作带黏合剂的半导体元件。
本发明提供一种切晶粘晶一体型膜，其具备：压敏胶黏层；以及由上述热固性树脂组合物形成的黏合层。该一体型膜能够适用于上述半导体装置的制造方法中。就成本及胶黏强度的观点而言，黏合层的厚度例如为3μm～40μm。
发明效果
根据本发明，可提供一种半导体装置的制造方法，其中半导体装置是层叠有多个半导体元件的方式的半导体装置，且不易产生相邻的半导体元件之间的剥离。并且，根据本发明，还可提供一种能够适用于上述制造方法中的热固性树脂组合物及切晶粘晶一体型膜。
附图说明
图1是示意性表示半导体装置的一例的剖视图。
图2是示意性表示包含膜状黏合剂及半导体元件的带黏合剂的半导体元件的一例的剖视图。
图3(a)～图3(f)是示意性表示制造带黏合剂的半导体元件的过程的剖视图。
图4是示意性表示制造图1所示的半导体装置的过程的剖视图。
图5(a)是示意性表示制造图1所示的半导体装置的过程的剖视图，图5(b)是表示在第一段的半导体元件与第二段的半导体元件之间产生剥离的结构体的剖视图。
图6是示意性表示制造图1所示的半导体装置的过程的剖视图。
图7是示意性表示半导体装置的另一例的剖视图。
具体实施方式
以下，参考图式来对本发明的实施方式进行详细说明。在以下的说明中，对相同或相当部分标注相同符号，并省略重复的说明。并且，上下左右等位置关系只要无特别说明，则是指基于图式所示的位置关系。而且，图式的尺寸比率并不限于图示的比率。另外，本说明书中“(甲基)丙烯酸”的记载是指“丙烯酸”及与其相对应的“甲基丙烯酸”。
＜半导体装置＞
图1是示意性表示本实施方式所涉及的半导体装置的剖视图。该图所示的半导体装置100具备：基板10；层叠于基板10的表面上的四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4；将基板10的表面上的电极(未图示)与四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4电连接的导线W1、导线W2、导线W3、导线W4；以及密封这些的密封层50。
基板10例如为有机基板，也可为引线框架等金属基板。关于基板10，就抑制半导体装置100的翘曲的观点而言，基板10的厚度例如为90μm～180μm，也可为90μm～140μm。
四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4经由膜状黏合剂3P(参考图2)的固化物3而层叠。俯视时半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4的形状例如为矩形(正方形或长方形)。半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4的一边的长度例如为5mm以下，也可为2mm～4mm或1mm～4mm。半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4的厚度例如为10μm～170μm，也可为10μm～30μm。另外，四个半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4的一边的长度可相同，也可相互不同，关于厚度也同样。
＜带黏合剂的半导体元件＞
图2是示意性表示带黏合剂的半导体元件的一例的剖视图。图2所示的带黏合剂的半导体元件20包含膜状黏合剂3P及半导体元件S1。如图2所示，膜状黏合剂3P与半导体元件S1实质上为相同尺寸。关于膜状黏合剂3P与半导体元件S2、半导体元件S3、半导体元件S4，也同样如此。如以下说明，带黏合剂的半导体元件20是通过切割(dicing)工序及拾取工序而制作。
参考图3(a)～图3(f)，对图2所示的带黏合剂的半导体元件20(膜状黏合剂3P与半导体元件S1的层叠体)的制作方法的一例进行说明。首先，准备切晶粘晶一体型膜8(以下视情况称为“膜8”)，将其配置于规定的装置(未图标)。膜8依次具备基材膜1、压敏胶黏层2及黏合层3A。基材膜1例如为聚对苯二甲酸乙二醇酯膜(PET膜)。半导体晶圆W例如为厚度10μm～100μm的薄型半导体晶圆。半导体晶圆W可为单晶硅，也可为多晶硅、各种陶瓷、砷化镓等化合物半导体。
如后述，黏合层3A由热固性树脂组合物形成。就成本及固化物的胶黏强度的观点而言，黏合层3A的厚度例如为3μm～40μm，也可为3μm～30μm或3μm～25μm。
如图3(a)及图3(b)所示，以黏合层3A与半导体晶圆W的一个面接触的方式贴附膜8。该工序优选在50℃～100℃、更优选在60℃～80℃的温度条件下实施。若温度为50℃以上，则能够获得半导体晶圆W与黏合层3A的良好的密合性，若为100℃以下，则可在该工序中抑制黏合层3A过度流动。
如图3(c)所示，通过沿着半导体晶圆W的切割预定线照射激光，在半导体晶圆W形成改性区域R(隐形切割)。也可代替隐形切割，通过刀片切割而在半导体晶圆形成切口。另外，也可在对半导体晶圆W进行激光照射或刀片切割之前，通过对半导体晶圆W进行磨削而薄膜化。
如图3(d)所示，通过在常温或冷却条件下使基材膜1扩张而在改性区域R使半导体晶圆W分割。由此，将半导体晶圆W单片化为多个半导体元件S1，并且将黏合层3A单片化为膜状黏合剂3P。如图3(e)所示，在压敏胶黏层2例如为UV固化型的情况下，在通过扩张而使带黏合剂的半导体元件20相互分离的状态下，通过对压敏胶黏层2照射紫外线而使压敏胶黏层2固化，从而使压敏胶黏层2与黏合层3A之间的黏合力(bond force)降低。紫外线照射之后，通过利用针42将其顶起而使带黏合剂的半导体元件20自压敏胶黏层2剥离，并且利用吸引夹头44吸引并拾取带黏合剂的半导体元件20(参考图3(f))。以该方式获得图2所示的带黏合剂的半导体元件20。
就适当地分割黏合层3A而获得规定的形状及尺寸的膜状黏合剂3P的观点而言，基材膜1的扩张优选在冷却条件下进行。该温度条件例如可为-15℃～0℃。
＜半导体装置的制造方法＞
参考图4～图6，对半导体装置100的制造方法进行说明。首先，如图4所示，在基板10的表面上压接第一段的半导体元件S1。即，经由带黏合剂的半导体元件20的膜状黏合剂3P而将半导体元件S1压接于基板10的规定位置。该压接处理例如优选在80℃～180℃、0.01MPa～0.50MPa的条件下，历时0.5秒～3.0秒来实施。其次，通过加热而使膜状黏合剂3P固化。该固化处理例如优选在60℃～175℃、0.01MPa～1.0MPa的条件下历时5分钟以上来实施。由此，膜状黏合剂3P固化而成为固化物3。就减少空隙的观点而言，膜状黏合剂3P的固化处理也可在加压环境下实施。
与半导体元件S1相对于基板10的安装同样地，在半导体元件S1的表面上安装第二段的半导体元件S2。进而，通过安装第三段的半导体元件S3及第四段的半导体元件S4，而制作图5(a)所示的结构体30。在利用导线W1、导线W2、导线W3、导线W4将半导体元件S1、半导体元件S2、半导体元件S3、半导体元件S4与基板10电连接之后(参考图5)，通过密封层50而将半导体元件及导线密封，由此制成图1所示的半导体装置100。
＜热固性树脂组合物＞
对构成膜状黏合剂3P的热固性树脂组合物进行说明。另外，膜状黏合剂3P为将黏合层3A单片化而得的膜状黏合剂，两者由相同的热固性树脂组合物形成。该热固性树脂组合物例如可以经过半固化(B阶段)状态，且通过其后的固化处理而成为完全固化物(C阶段)状态。
热固性树脂组合物的120℃下的熔融粘度为3100Pa·s以上。通过使用热固性树脂组合物，即便应胶黏的半导体元件具有较强的翘曲应力，也能够达成可耐受所述翘曲应力的界面胶接力。由此，即便层叠多个半导体元件，也能够充分抑制相邻的半导体元件之间的剥离。热固性树脂组合物的120℃下的熔融粘度可为3100Pa·s～40000Pa·s，也可为5000Pa·s～35000Pa·s。该熔融粘度的下限值可为13000Pa·s，也可为14000Pa·s。另外，熔融粘度是指以下情况下的测定值：使用ARES(TAInstruments制造)，一边对成形为膜状的热固性树脂组合物赋予5％的应变，一边以5℃/分钟的升温速度升温，并一边进行测定。
关于热固性树脂组合物(固化处理前)，例如35℃下的储能模量为70MPa以上。通过使用该热固性树脂组合物，即便应胶黏的半导体元件具有较强的翘曲应力，也能够达成可耐受所述翘曲应力的凝聚力。由此，即便层叠多个半导体元件，也能够充分抑制相邻的半导体元件之间的剥离。热固性树脂组合物的35℃下的储能模量可为70MPa～1000MPa，也可为80MPa～900MPa。另外，储能模量是指通过基于以下的装置及条件的测定而获得的值。
·动态黏弹性测定装置：Rheogel E-4000(UBM股份有限公司制造)
·测定对象：成形为膜状的热固性树脂组合物
·升温速度：3℃/分钟
·频率：10Hz
热固性树脂组合物优选包含以下成分。
(a)热固性树脂(以下，有时简称为“(a)成分”)
(b)高分子量成分(以下，有时简称为“(b)成分”)
(c)填料(以下，有时简称为“(c)成分”)
本实施方式中，在(a)热固性树脂包含环氧树脂(以下，有时简称为“(a1)成分”)的情况下，(a)热固性树脂优选包含可作为环氧树脂的固化剂的酚醛树脂(以下，有时简称为“(a2)成分”)。另外，在(b)高分子量成分具有与酚醛树脂进行热固化的官能团(缩水甘油基等)的情况下，作为(a)热固性树脂，也可不另外使用环氧树脂。
热固性树脂组合物还可包含以下成分。
(d)偶联剂(以下，有时简称为“(d)成分”)
(e)固化促进剂(以下，有时简称为“(e)成分”)
以热固性树脂组合物的总质量为基准，(a)成分的含量例如为30质量％以下，也可为5质量％～30质量％。以热固性树脂组合物的总质量为基准，(b)成分的含量例如为15质量％～66质量％，也可为15质量％～50质量％。以热固性树脂组合物的总质量为基准，(c)成分的含量例如为25质量％～50质量％，也可为25质量％～45质量％。通过将(b)成分及(c)成分的含量设为上述范围，能够在对半导体晶圆进行隐形切割或刀片切割之后，通过在冷却条件下进行扩张及拾取，而更有效率且稳定地制作带黏合剂的半导体元件。
具体而言，通过(b)成分的含量为66质量％以下，当在冷却条件下进行扩张时，趋于获得优异的分割性(参考图3(d))。另外，通过(b)成分的含量为15质量％以上且(c)成分的含量为50质量％以下，冷却条件下的整体强度(bulk intensity)足够高，容易通过扩张而分割为规定的形状及尺寸。另外，为了将热固性树脂组合物的120℃下的熔融粘度设为上述范围内，适当调整(a)热固性树脂、(b)高分子量成分及(c)填料的量即可。
就连接可靠性的观点而言，热固性树脂组合物的固化物(C阶段)的150℃下的储能模量优选为10MPa以上，更优选为25MPa以上，也可为50MPa以上或100MPa以上。另外，储能模量的上限值例如为600MPa，也可为500MPa。热固性树脂组合物的固化物的150℃下的储能模量可将使热固性树脂组合物在175℃的温度条件下固化而成的物质作为试样，并使用动态黏弹性装置进行测定。
以下，对热固性树脂组合物所含的各成分进行说明。
·(a)热固性树脂
(a1)成分只要为分子内具有环氧基的成分，则能够无特别限制地使用。作为(a1)成分，例如可列举：双酚A型环氧树脂、双酚F型环氧树脂、双酚S型环氧树脂、苯酚酚醛清漆型环氧树脂、甲酚酚醛清漆型环氧树脂、双酚A酚醛清漆型环氧树脂、双酚F酚醛清漆型环氧树脂、含二环戊二烯骨架的环氧树脂、芪型环氧树脂、含三嗪骨架的环氧树脂、含芴骨架的环氧树脂、三酚甲烷型环氧树脂、联苯型环氧树脂、二甲苯型环氧树脂、联苯芳烷基型环氧树脂、萘型环氧树脂、多官能酚类、蒽等多环芳香族类的二缩水甘油醚化合物等。这些可单独使用一种或将两种以上组合使用。这些之中，就耐热性的观点而言，(a1)成分可为甲酚酚醛清漆型环氧树脂、双酚F型环氧树脂或双酚A型环氧树脂。
(a1)成分的环氧当量可为90g/eq～300g/eq、110g/eq～290g/eq、或130g/eq～280g/eq。若(a1)成分的环氧当量为这种范围，则趋于维持膜状黏合剂的整体强度的同时确保流动性。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(a1)成分的含量可为50质量份以下、5质量份～50质量份、10质量份～40质量份、或20质量份～30质量份。若(a1)成分的含量为5质量份以上，则趋于膜状黏合剂的埋入性更良好。若(a1)成分的含量为50质量份以下，则趋于能够进一步抑制渗出的发生。
(a2)成分只要为分子内具有酚性羟基的成分，则能够无特别限制地使用。作为(a2)成分，例如可列举：使苯酚、甲酚、间苯二酚(resorcin)、邻苯二酚、双酚A、双酚F、苯基苯酚、氨基苯酚等酚类和/或α-萘酚、β-萘酚、二羟基萘等萘酚类与甲醛等具有醛基的化合物在酸性催化剂下缩合或共缩合而获得的酚醛清漆型酚醛树脂；由烯丙基化双酚A、烯丙基化双酚F、烯丙基化萘二醇、苯酚酚醛清漆、苯酚等酚类和/或萘酚类与二甲氧基对二甲苯或双(甲氧基甲基)联苯合成的苯酚芳烷基树脂、萘酚芳烷基树脂等。这些可单独使用一种或将两种以上组合使用。这些之中，就吸湿性及耐热性的观点而言，(a2)成分可为苯酚芳烷基树脂、萘酚芳烷基树脂或酚醛清漆型酚醛树脂。
(a2)成分的羟基当量可为80g/eq～250g/eq、90g/eq～200g/eq、或100g/eq～180g/eq。若(a2)成分的羟基当量为这种范围，则趋于保持膜状黏合剂的流动性的同时更高地维持胶接力。
(a2)成分的软化点可为50℃～140℃、55℃～120℃、或60℃～100℃。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(a2)成分的含量可为5质量份～50质量份、10质量份～40质量份、或20质量份～30质量份。若(a2)成分的含量为5质量份以上，则趋于获得更良好的固化性。若(a2)成分的含量为50质量份以下，则趋于膜状黏合剂的埋入性更良好。
就固化性的观点而言，(a1)成分的环氧当量与(a2)成分的羟基当量之比((a1)成分的环氧当量/(a2)成分的羟基当量)可为0.30/0.70～0.70/0.30、0.35/0.65～0.65/0.35、0.40/0.60～0.60/0.40、或0.45/0.55～0.55/0.45。若该当量比为0.30/0.70以上，则趋于获得更充分的固化性。若该当量比为0.70/0.30以下，则能够防止粘度变得过高，能够获得更充分的流动性。
·(b)高分子量成分
(b)成分优选为玻璃化转变温度(Tg)为50℃以下的成分。作为(b)成分，例如可列举：丙烯酸树脂、聚酯树脂、聚酰胺树脂、聚酰亚胺树脂、硅树脂、丁二烯树脂、丙烯腈树脂及它们的改性体等。
就流动性的观点而言，(b)成分可包含丙烯酸树脂。在此，所谓丙烯酸树脂，是指包含源自(甲基)丙烯酸酯的结构单元的聚合物。丙烯酸树脂优选包含源自具有环氧基、醇性或酚性羟基、羧基等交联性官能团的(甲基)丙烯酸酯的结构单元作为结构单元的聚合物。并且，丙烯酸树脂也可为(甲基)丙烯酸酯与丙烯腈的共聚物等丙烯酸橡胶。
丙烯酸树脂的玻璃化转变温度(Tg)可为-50℃～50℃或-30℃～30℃。若丙烯酸树脂的Tg为-50℃以上，则趋于能够防止黏合剂组合物的柔软性变得过高。由此，在晶圆切割时容易将膜状黏合剂切割，而能够防止毛边(burr)的产生。若丙烯酸树脂的Tg为50℃以下，则趋于能够抑制黏合剂组合物的柔软性下降。由此，当将膜状黏合剂贴附于晶圆时，趋于容易将空隙充分埋入的倾向。并且，能够防止由晶圆的密合性的下降所导致的切割时的碎裂(chipping)。在此，玻璃化转变温度(Tg)是指使用DSC(差示扫描量热仪(例如，RigakuCorporation制造“Thermo Plus 2”)所测定出的值。
丙烯酸树脂的重均分子量(Mw)例如为10万～300万，且可为10万～100万、10万～80万、或30万～200万。若丙烯酸树脂的Mw为这种范围，则能够适当地控制膜形成性、膜状时的强度、可挠性、黏性等，并且回流性优异，能够提高埋入性。在此，Mw是指通过凝胶渗透色谱法(GPC)进行测定，并使用基于标准聚苯乙烯的校准曲线进行换算而得的值。
作为丙烯酸树脂的市售品，例如可列举：SG-70L、SG-708-6、WS-023 EK30、SG-P3、SG-280EK23、HTR-860P-3CSP、HTR-860P-3CSP-3DB(均为Nagase ChemteX Corporation制造)。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(b)成分的含量可为5质量份～70质量份、10质量份～50质量份、或15质量份～30质量份。若(b)成分的含量为5质量份以上，则能够使成形时的流动性的控制及高温下的操作性更进一步良好。若(b)成分的含量为70质量份以下，则能够使埋入性更进一步良好。
·(c)填料
作为(c)成分，例如可列举：氢氧化铝、氢氧化镁、碳酸钙、碳酸镁、硅酸钙、硅酸镁、氧化钙、氧化镁、氧化铝、氮化铝、硼酸铝晶须、氮化硼、二氧化硅等无机填料。这些可单独使用一种或将两种以上组合使用。这些之中，就与树脂的相容性的观点而言，(c)成分可为二氧化硅。
就提高黏合性(adhesiveness)的观点而言，(c)成分的平均粒径可为0.005μm～1μm或0.05μm～0.5μm。在此，平均粒径是指通过根据BET比表面积进行换算而求出的值。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(c)成分的含量可为5质量份～50质量份、15质量份～45质量份、或25质量份～40质量份。若(c)成分的含量为5质量份以上，则趋于膜状黏合剂的流动性进一步提升。若(c)成分的含量为50质量份以下，则趋于膜状黏合剂的切割性更良好。
·(d)偶联剂
(d)成分可为硅烷偶联剂。作为硅烷偶联剂，例如可列举：γ-脲基丙基三乙氧基硅烷、γ-巯基丙基三甲氧基硅烷、3-苯基氨基丙基三甲氧基硅烷、3-(2-氨基乙基)氨基丙基三甲氧基硅烷等。这些可单独使用一种或将两种以上组合使用。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(d)成分的含量可为0.01质量份～5质量份。
·(e)固化促进剂
(e)成分并无特别限定，可使用通常所使用的成分。作为(e)成分，例如可列举：咪唑类及其衍生物、有机磷系化合物、仲胺类、叔胺类、季铵盐等。这些可单独使用一种或将两种以上组合使用。这些之中，就反应性的观点而言，(e)成分可为咪唑类及其衍生物。
作为咪唑类，例如可列举：2-甲基咪唑、1-苄基-2-甲基咪唑、1-氰基乙基-2-苯基咪唑、1-氰基乙基-2-甲基咪唑等。这些可单独使用一种或将两种以上组合使用。
相对于(a)成分、(b)成分及(c)成分的总质量100质量份，(e)成分的含量可为0.01质量份～1质量份。
＜切晶粘晶一体型膜及其制造方法＞
对图3(a)所示的切晶粘晶一体型膜8及其制造方法进行说明。膜8的制造方法包括：将含有溶剂的黏合剂组合物的清漆涂布于黏合层用的基材膜(未图示)上的工序；以及通过在50℃～150℃下对所涂布的清漆进行加热干燥而形成黏合层3A的工序。
黏合剂组合物的清漆例如能够通过将(a)成分～(c)成分，根据需要，将(d)成分及(e)成分在溶剂中进行混合或混炼而制备。混合或混炼可使用通常的搅拌机、擂溃机、三辊磨机(three-rod roll mill)、球磨机(ball mill)等分散机，将它们适当组合而进行。
用于制作清漆的溶剂只要为可将上述各成分均匀地溶解、混炼或分散的溶剂则能够无限制地使用以往公知的溶剂。作为这种溶剂，例如可列举：丙酮、甲基乙基酮、甲基异丁基酮、环己酮等酮系溶媒，二甲基甲酰胺、二甲基乙酰胺、N-甲基吡咯啶烷酮、甲苯、二甲苯等。就干燥速度快、且价格低的方面而言，优选使用甲基乙基酮、环己酮等。
作为黏合层用的基材膜，并无特别限制，例如可列举：聚酯膜、聚丙烯膜(OPP膜等)、聚对苯二甲酸乙二醇酯膜、聚酰亚胺膜、聚醚酰亚胺膜、聚醚萘二甲酸酯膜、甲基戊烯膜等。
作为将清漆涂布于基材膜的方法，能够使用公知的方法，例如可列举：刮涂法、辊涂法、喷涂法、凹版涂布法、棒涂法、帘涂法等。加热干燥的条件只要为所使用的溶剂充分挥发的条件则无特别限制，例如能够在50℃～150℃下加热1分钟～30分钟来进行。加热干燥可以以50℃～150℃的范围内的温度阶段性地升温来进行。通过加热干燥而使清漆中所含的溶剂挥发，由此能够获得基材膜与黏合层20A的层叠膜。
通过将以上述方式获得的层叠膜与切割膜(基材膜1与压敏胶黏层2的层叠体)贴合，能够获得膜8。作为基材膜1，例如可列举：聚四氟乙烯膜、聚对苯二甲酸乙二醇酯膜、聚乙烯膜、聚丙烯膜、聚甲基戊烯膜、聚酰亚胺膜等塑料膜等。并且，基材膜1根据需要可进行底涂涂布、UV处理、电晕放电处理、研磨处理、蚀刻处理等表面处理。压敏胶黏层2可为UV固化型，也可为压敏型。膜8可还具备包覆压敏胶黏层2的保护膜(未图示)。
以上，对本发明的实施方式进行了详细说明，但本发明并不限定于上述实施方式。例如，在上述实施方式中，例示出层叠四个半导体元件的方式的封装体，但所层叠的半导体元件的个数并不限定于此。另外，在上述实施方式中，例示出在与半导体元件的层叠方向正交的方向上错开位置而层叠多个半导体元件的方式，但也可如图7所示，不错开位置地层叠半导体元件。
实施例
以下，列举实施例对本发明进行更具体的说明。但本发明并不限定于以下实施例。
(实施例1～实施例12及比较例1～比较例5)
以如下方式制备了包含表1～表4所示的成分的清漆(共计17种)。即，在包含作为热固性树脂的环氧树脂及酚醛树脂、以及填料的组合物中添加环己酮，进行搅拌。在其中添加作为高分子量成分的丙烯酸橡胶并进行搅拌之后，进一步添加偶联剂及固化促进剂来进行搅拌，直至各成分充分变均匀，由此获得清漆。
表1～表4中所记载的成分如下所述。
(环氧树脂)
·YDCN-700-10：甲酚酚醛清漆型环氧树脂，NIPPON STEEL Chemical&MaterialCo.,Ltd.制造，环氧当量为210，软化点为75℃～85℃
·EXA-830CRP(商品名)：双酚F型环氧树脂，DIC Corporation制造，环氧当量为162，常温下为液体
·YDF-8170C：双酚F型环氧树脂，NIPPON STEEL Chemical&Material Co.,Ltd.制造，环氧当量为159，常温下为液体
(酚醛树脂)
·Mirex XLC-LL(“Mirex”为注册商标)：Mitsui Chemicals,Inc.制造，羟基当量为175，软化点为77℃
·Phenolite LF-4871(“Phenolite”为注册商标)：DIC Corporation制造，羟基当量为118，软化点为130℃
(高分子量成分)
·HTR-860P：Nagase ChemteX Corporation制造，丙烯酸橡胶，重均分子量为80万，Tg为-7℃
(填料)
·SC-2050-HLG：Admatechs制造，二氧化硅填料分散液，平均粒径为0.50μm，最大粒径为1.0μm以下
·Aerosil R972(“Aerosil”为注册商标)：NIPPON AEROSIL CO.,LTD.制造，二氧化硅粒子，平均粒径为0.016μm，最大粒径为1.0μm以下
(偶联剂)
·A-189：γ-巯基丙基三甲氧基硅烷，Momentive Performance Materials Inc.制造
·A-1160：γ-脲基丙基三乙氧基硅烷，Momentive Performance Materials Inc.制造
(固化促进剂)
·Curezol 2PZ-CN(“Curezol”为注册商标)：1-氰基乙基-2-苯基咪唑，SHIKOKUCHEMICALS CORPORATION.制造
利用500目(mesh)的过滤器过滤清漆，并进行真空消泡。将真空消泡后的清漆涂布于已实施脱模处理的聚对苯二甲酸乙二醇酯(PET)膜(厚度38μm)上。以90℃下5分钟、继而140℃下5分钟的两阶段对所涂布的清漆进行加热干燥。如此获得了在作为基材膜的PET膜上具备处于B阶段状态的膜状黏合剂(厚度7μm)的胶黏膜。
(膜状黏合剂的熔融粘度的测定)
膜状黏合剂的120℃下的熔融粘度通过以下方法进行测定。即，通过将厚度为7μm的膜状黏合剂层叠多层而使厚度为约300μm，并将其冲裁成10mm×10mm的尺寸，由此获得了测定用的试样。在动态黏弹性装置ARES(TA Instruments制造)上安装直径为8mm的圆形铝板夹具，进而在此处安装上述试样。其后，一边以35℃赋予5％的应变，一边以5℃/分钟的升温速度升温至130℃而进行测定，并记录了120℃时的熔融粘度的值。将结果示于表1～表4中。
(膜状黏合剂的储能模量的测定)
使用UBM股份有限公司制造的动态黏弹性测定装置(Rheogel E-4000)测定了膜状黏合剂的35℃下的储能模量。即，通过将厚度为7μm的膜状黏合剂层叠多层而使厚度为约170μm，并将其设为宽度4mm×长度33mm的尺寸，由此获得了测定用的试样。将试样安装于动态黏弹性测定装置(产品名：Rheogel E-4000，UMB股份有限公司制造)并施加拉伸载荷，以频率10Hz、升温速度3℃/分钟进行测定，测定了35℃下的储能模量。将结果示于表1～表4中。
[膜状黏合剂的分割性评价]
通过将实施例及比较例所涉及的各膜状黏合剂(厚度120μm)与切割用压敏胶黏剂膜(pressure-sensitive adhesive film)(Maxell,Ltd.制造)贴合而制作了切晶粘晶一体型膜。
如下所述，在通过对半导体晶圆照射激光而形成改性区域之后，在低温条件下实施扩张工序，由此评价了膜状黏合剂的分割性。即，准备了半导体晶圆(硅晶圆，厚度为50μm，外径为12英寸)。为了使膜状黏合剂密合于半导体晶圆的一个面，而对半导体晶圆贴合了切晶粘晶一体型膜。使用激光切割装置(TOKYO SEIMITSU CO.,LTD.制造，MAHOHDICINGMACHINE)，对包含半导体晶圆的层叠体(半导体晶圆/膜状黏合剂/压敏胶黏剂层/基材层)进行了隐形切割。条件如下所述。
·激光光源：半导体激光激发Nd(YAG激光)
波长：1064nm
激光点截面积：3.14×10-8cm2
振荡方式：Q开关脉冲
重复频率：100kHz
脉冲宽度：30ns
输出：20μJ/脉冲
激光品质：TEM00
偏振特性：线性偏振
·聚光用透镜倍率：50倍
·NA：0.55
·对激光波长的透射率：60％
·载置半导体晶圆的工作台的移动速度：100mm/秒
将包含改性区域形成后的半导体晶圆的层叠体(半导体晶圆/黏合剂层/压敏胶黏剂层/基材层)固定于扩张装置。接着，通过在以下条件下使切割膜(压敏胶黏剂层/基材层)扩张，而将膜状黏合剂及半导体晶圆进行了分割。由此，获得了带黏合剂的半导体元件。
装置：Disco Corporation制造的DDS2300(Fully Automatic Die Separator)
冷扩张条件：
温度：-15℃、高度(Height)：9mm、冷却时间：60秒
速度：300mm/秒、待机时间(Waiting time)：0秒
对于扩张工序后的压敏胶黏剂层，自基材层侧，以照度70mW/cm2历时3秒照射了紫外线。使用Renesas Eastern Japan Semiconductor制造的可挠性粘晶机(flexible diebonder)DB-730(商品名)，对带黏合剂的半导体元件的拾取性进行了评价。拾取用夹头使用了Micromechanics Co.，Ltd.制造的RUBBER TIP 13-087E-33(商品名，尺寸：5mm×5mm)。上顶销使用了Micromechanics Co.，Ltd.制造的EJECTOR NEEDLE SEN2-83-05(商品名，直径：0.7mm，前端形状：直径350μm的半圆)。上顶销以销中心间隔4.2mm配置了5根。拾取的条件如下所述。
·销的顶起速度：10mm/秒
·顶起高度：200μm
在隐形切割工序之后目视观察有无未分割的带黏合剂的半导体元件，按照以下基准进行了评价。将结果示于表1～表4中。
A：无未分割的带黏合剂的半导体元件。
B：未分割的带黏合剂的半导体元件为一个以上。
[四段层叠后的剥离的有无]
使用膜状黏合剂被适当地分割的试样(带黏合剂的半导体元件)，对实施例或比较例，制作了与图5(a)所示的结构体相同结构的结构体。在层叠第四段的半导体元件之后，目视观察第一段与第二段之间是否产生了剥离，按照以下基准进行了评价。将结果示于表1～表4中。
A：所有试样中未产生剥离。
B：产生了剥离的试样为一个以上。
[耐回流性的评价]
在为了评价有无剥离而制作的试样中，使用未产生剥离的试样，通过以下方法进行了耐回流性的评价。即，利用制模用密封材料(Showa Denko Materials Co.,Ltd.制造，商品名“CEL-9750ZHF10”)密封层叠成四段的半导体元件，由此获得了评价用的封装体。另外，树脂密封的条件设为175℃/6.7MPa/90秒，固化的条件设为175℃、5小时。
准备20个上述封装体，将这些暴露于由JEDEC规定的环境下(等级3、30℃、60RH％、192小时)而进行了吸湿。接着，使吸湿后的封装体在IR回流炉(260℃、最高温度265℃)中通过了三次。按照以下基准进行了评价。将结果示于表1～表4中。
A：20个封装体中没有一个观察到封装体的破损、厚度的变化、膜状黏合剂与半导体元件的界面处的剥离等。
B：20个封装体中至少有一个观察到封装体的破损、厚度的变化、膜状黏合剂与半导体元件的界面处的剥离等。
[表1]
Figure BDA0002886875160000171
[表2]
Figure BDA0002886875160000181
[表3]
Figure BDA0002886875160000182
[表4]
Figure BDA0002886875160000191
产业上的可利用性
根据本发明，可提供一种半导体装置的制造方法，其中半导体装置是层叠有多个半导体元件的方式的半导体装置，且不易产生相邻的半导体元件之间的剥离。并且，根据本发明，还可提供一种能够适用于上述制造方法中的热固性树脂组合物及切晶粘晶一体型膜。
符号说明
1-基材膜，2-压敏胶黏层，3-膜状黏合剂的固化物，3A-黏合层，3P-膜状黏合剂，8-切晶粘晶一体型膜，20-带黏合剂的半导体组件，100-半导体装置，W-半导体晶圆。

Claims (13)

1.一种半导体装置的制造方法，其包括：
准备切晶粘晶一体型膜的工序，所述切晶粘晶一体型膜依次具备黏合层、压敏胶黏层及基材膜，所述黏合层由120℃下的熔融粘度为3100Pa·s以上的热固性树脂组合物形成；
将所述切晶粘晶一体型膜的所述黏合层侧的面与半导体晶圆贴合的工序；
切割所述半导体晶圆的工序；
通过扩张所述基材膜而获得将所述半导体晶圆及所述黏合层单片化而成的带黏合剂的半导体元件的工序；
自所述压敏胶黏层拾取所述带黏合剂的半导体元件的工序；
将所述带黏合剂的半导体元件，经由该带黏合剂的半导体元件的黏合剂而层叠于其他半导体元件的工序；以及
使所述黏合剂热固化的工序。
2.根据权利要求1所述的半导体装置的制造方法，其中，
所述黏合层的35℃下的储能模量为70MPa以上。
3.根据权利要求1或2所述的半导体装置的制造方法，其中，
通过隐形切割及刀片切割中的一种而将所述半导体晶圆单片化，并且在冷却条件下扩张所述基材膜。
4.根据权利要求1至3中任一项所述的半导体装置的制造方法，其中，
所述热固性树脂组合物含有热固性树脂、分子量为10万～100万的高分子量成分及填料，
且以所述热固性树脂组合物的总质量为基准，所述高分子量成分的含量为15质量％～66质量％。
5.根据权利要求4所述的半导体装置的制造方法，其中，
以所述热固性树脂组合物的总质量为基准，所述填料的含量为25质量％～45质量％。
6.根据权利要求1至5中任一项所述的半导体装置的制造方法，其为制造三维NAND型存储器的方法。
7.一种热固性树脂组合物，其用于半导体装置的制造工艺中，
所述热固性树脂组合物的120℃下的熔融粘度为3100Pa·s以上。
8.根据权利要求7所述的热固性树脂组合物，其35℃下的储能模量为70MPa以上。
9.根据权利要求7或8所述的热固性树脂组合物，其含有热固性树脂、分子量为10万～100万的高分子量成分及填料，
且以该热固性树脂组合物的总质量为基准，所述高分子量成分的含量为15质量％～66质量％。
10.根据权利要求9所述的热固性树脂组合物，其中，
以该热固性树脂组合物的总质量为基准，所述填料的含量为25质量％～45质量％。
11.根据权利要求7至10中任一项所述的热固性树脂组合物，其用于三维NAND型存储器的制造工艺中。
12.一种切晶粘晶一体型膜，其具备：
压敏胶黏层；以及
由含权利要求7至11中任一项所述的热固性树脂组合物形成的黏合层。
13.根据权利要求12所述的切晶粘晶一体型膜，其中，
所述黏合层的厚度为3μm～40μm。
CN201980045678.2A 2018-07-11 2019-07-10 半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜 Pending CN112385016A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2018131431 2018-07-11
JP2018-131431 2018-07-11
PCT/JP2019/027416 WO2020013250A1 (ja) 2018-07-11 2019-07-10 半導体装置の製造方法、熱硬化性樹脂組成物及びダイシング・ダイボンディング一体型フィルム

Publications (1)

Publication Number Publication Date
CN112385016A true CN112385016A (zh) 2021-02-19

Family

ID=69141564

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980045678.2A Pending CN112385016A (zh) 2018-07-11 2019-07-10 半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜

Country Status (7)

Country Link
US (1) US11634614B2 (zh)
JP (2) JP7298613B2 (zh)
KR (2) KR20210030931A (zh)
CN (1) CN112385016A (zh)
SG (1) SG11202100176VA (zh)
TW (2) TW202414550A (zh)
WO (1) WO2020013250A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117321757A (zh) * 2021-05-14 2023-12-29 住友电木株式会社 含银膏

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022149582A1 (ja) 2021-01-08 2022-07-14 昭和電工マテリアルズ株式会社 フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2022149277A1 (ja) 2021-01-08 2022-07-14 昭和電工マテリアルズ株式会社 接着剤組成物、フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
JP2022115581A (ja) * 2021-01-28 2022-08-09 昭和電工マテリアルズ株式会社 半導体装置及びその製造方法、並びに、熱硬化性樹脂組成物、接着フィルム及びダイシング・ダイボンディング一体型フィルム
WO2023047594A1 (ja) * 2021-09-27 2023-03-30 昭和電工マテリアルズ株式会社 フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2023079693A1 (ja) 2021-11-05 2023-05-11 株式会社レゾナック 補強された半導体チップの製造方法、フィルム付き半導体チップ、半導体チップの補強方法、補強用フィルム、及び半導体装置
WO2023152837A1 (ja) * 2022-02-09 2023-08-17 株式会社レゾナック フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2023157846A1 (ja) * 2022-02-16 2023-08-24 株式会社レゾナック フィルム状接着剤及びその製造方法、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101471240A (zh) * 2003-06-06 2009-07-01 日立化成工业株式会社 粘合片、与切割胶带一体化粘合片以及半导体的制造方法
JP2016190964A (ja) * 2015-03-31 2016-11-10 日立化成株式会社 接着フィルム

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3517753A1 (de) * 1985-05-17 1986-11-20 Dr. Beck & Co Ag, 2000 Hamburg Hitzehaertbarer schmelzklebelack und seine verwendung
US8017444B2 (en) 2004-04-20 2011-09-13 Hitachi Chemical Company, Ltd. Adhesive sheet, semiconductor device, and process for producing semiconductor device
JP5390209B2 (ja) * 2009-02-04 2014-01-15 日東電工株式会社 熱硬化型ダイボンドフィルム
JP5499772B2 (ja) * 2009-02-26 2014-05-21 日立化成株式会社 半導体用接着部材、半導体用接着剤組成物、半導体用接着フィルム、積層体及び半導体装置の製造方法
JP5219302B2 (ja) * 2010-02-04 2013-06-26 日東電工株式会社 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置
JP5732881B2 (ja) * 2011-02-08 2015-06-10 日立化成株式会社 半導体用接着フィルム、接着シート、半導体ウエハ及び半導体装置
JP5803123B2 (ja) 2011-02-08 2015-11-04 日立化成株式会社 半導体用粘接着シート、それを用いた半導体ウエハ、半導体装置及び半導体装置の製造方法
JP2013010849A (ja) 2011-06-29 2013-01-17 Hitachi Chemical Co Ltd 半導体用接着部材、それを用いたダイシング・ダイボンディング一体型接着部材及び半導体装置の製造方法
JP5976326B2 (ja) * 2012-01-25 2016-08-23 日東電工株式会社 半導体装置の製造方法、及び、当該半導体装置の製造方法に用いられる接着フィルム
JP5918664B2 (ja) 2012-09-10 2016-05-18 株式会社東芝 積層型半導体装置の製造方法
EP3190156B1 (en) * 2014-09-01 2019-03-20 Dow Corning Toray Co., Ltd. Curable silicone composition, curable hot-melt silicone, and optical device
JP6621262B2 (ja) * 2015-08-06 2019-12-18 藤森工業株式会社 ホットメルト接着性樹脂フィルムおよびその製造方法
JP2017183705A (ja) * 2016-03-24 2017-10-05 日東電工株式会社 ダイシングダイボンドフィルム、及び、半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101471240A (zh) * 2003-06-06 2009-07-01 日立化成工业株式会社 粘合片、与切割胶带一体化粘合片以及半导体的制造方法
JP2016190964A (ja) * 2015-03-31 2016-11-10 日立化成株式会社 接着フィルム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117321757A (zh) * 2021-05-14 2023-12-29 住友电木株式会社 含银膏

Also Published As

Publication number Publication date
JP2023123595A (ja) 2023-09-05
KR20230084615A (ko) 2023-06-13
US20210269679A1 (en) 2021-09-02
JP7298613B2 (ja) 2023-06-27
WO2020013250A1 (ja) 2020-01-16
JPWO2020013250A1 (ja) 2021-08-05
KR20210030931A (ko) 2021-03-18
TW202414550A (zh) 2024-04-01
SG11202100176VA (en) 2021-04-29
TW202017022A (zh) 2020-05-01
US11634614B2 (en) 2023-04-25
TWI827632B (zh) 2024-01-01

Similar Documents

Publication Publication Date Title
CN112385016A (zh) 半导体装置的制造方法、热固性树脂组合物及切晶粘晶一体型膜
CN111656500B (zh) 半导体装置的制造方法及粘接膜
JP7136200B2 (ja) 半導体装置、並びに、その製造に使用する熱硬化性樹脂組成物及びダイシングダイボンディング一体型テープ
WO2020195981A1 (ja) 半導体装置の製造方法、ダイボンディングフィルム、及びダイシング・ダイボンディング一体型接着シート
WO2023157846A1 (ja) フィルム状接着剤及びその製造方法、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2022186285A1 (ja) フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2023047594A1 (ja) フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
WO2024190884A1 (ja) フィルム状接着剤、ダイシング・ダイボンディング一体型フィルム、並びに半導体装置及びその製造方法
TW202242057A (zh) 膜狀接著劑、切割晶粒接合一體型膜、以及半導體裝置及其製造方法
CN116670240A (zh) 膜状黏合剂、黏合片以及半导体装置及其制造方法
CN118696402A (zh) 膜状黏合剂及其制造方法、切割晶粒接合一体型膜、以及半导体装置及其制造方法
CN116762169A (zh) 半导体装置及其制造方法、以及热固性树脂组合物、黏合膜及切割晶粒接合一体型膜
TW202237786A (zh) 接著劑組成物、膜狀接著劑、切割晶粒接合一體型膜、以及半導體裝置及其製造方法
JP2023142901A (ja) 半導体用接着フィルム、ダイシング・ダイボンディング一体型フィルム、及び半導体装置の製造方法
CN118511254A (zh) 切割晶粒接合一体型膜及其制造方法、以及半导体装置的制造方法
CN118613558A (zh) 膜状黏合剂、切割晶粒接合一体型膜、以及半导体装置及其制造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: Tokyo

Applicant after: Lishennoco Co.,Ltd.

Address before: Tokyo

Applicant before: Showa electrical materials Co.,Ltd.

CB02 Change of applicant information