CN112310136B - 亮度均匀的被动式微发光二极管阵列装置 - Google Patents

亮度均匀的被动式微发光二极管阵列装置 Download PDF

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CN112310136B
CN112310136B CN201911264850.1A CN201911264850A CN112310136B CN 112310136 B CN112310136 B CN 112310136B CN 201911264850 A CN201911264850 A CN 201911264850A CN 112310136 B CN112310136 B CN 112310136B
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array
external circuit
micro
light emitting
layer
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CN112310136A (zh
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武东星
洪瑞华
陈柏玮
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    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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Abstract

一种亮度均匀的被动式微发光二极管阵列装置,包括微发光二极管阵列及外部线路组件。微发光二极管阵列包括基板、数沿Y方向间隔布满基板的微发光阵列及阵列用绝缘层。各微发光阵列依序具一沿X方向延伸于基板的第一层、数间隔的发光层、第二层、第一内电极层,更具一延伸于第一层并具间隔围绕发光层的基部及自基部凸伸的凸部的第二内电极层。阵列用绝缘层覆盖基板并裸露第一、二内电极层。外部线路组件包括面向基板的载板、各沿Y、X方向间隔并沿X、Y方向延伸于载板的第一、二外部线路、裸露出第一、二外部线路的线路用绝缘层及键合于第一、二外部线路与第一、二内电极层的电性键合单元,借由载板上的外部线路组件能有效利用阵列设置面面积。

Description

亮度均匀的被动式微发光二极管阵列装置
技术领域
本发明涉及一种被动式微发光二极管(Micro-LED)阵列装置,特别是涉及一种亮度均匀的被动式微发光二极管阵列装置。
背景技术
随着科技的演进与市场的需求,各类轻薄短小化的电子装置的相关研究已成为现阶段各大电子厂的开发主流。前述轻薄短小化的电子装置可见有由微发光二极管所构成的微发光二极管显示器(Micro-LED display)。
发明人于JOURNAL OF THE ELECTRON DEVICES SOCIETY VOLUME 6,2018发表的Fabrication and Study on Red Light Micro-LED Displays一文中(以下称前案),公开一种现有的被动式微发光二极管显示器1(见图4)。该现有的被动式微发光二极管显示器1的制法是依序参阅图1至图4所示的一步骤(a)、一步骤(b)、一步骤(c)、一步骤(d)、一步骤(e)、一步骤(f)、一步骤(g)、一步骤(h)与一步骤(i)所制得。
如图1所示,该步骤(a)是以有机金属化学气相沉积法(MOCVD)在一GaAs基板11上依序沉积一N-AlInP层121、一多重量子井(MQW)膜层结构122与一P-GaP层123以构成一磊晶膜12后,再以电子束蒸镀法(e-gun evaporation)于该磊晶膜12上沉积一ITO层13用于欧姆接触并作为电流扩散层。接着,该步骤(b)是以一粘着剂层14粘合该ITO层13与一双面抛光的蓝宝石基板15。于完成该步骤(b)后,该步骤(c)是以湿式化学蚀刻法自该磊晶膜12移除该GaAs基板11,以暴露出该磊晶膜12的N-AlInP层121。
如图2所示,该步骤(d)是将粘合有该蓝宝石基板15的磊晶膜12翻转180度后,通过热沉积系统(图未示)于该N-AlInP层121上沉积一AuGe/Au叠层(图未示),并以黄光微影与蚀刻制程对该AuGe/Au叠层定义出一由多个AuGe/Au电极16所构成的阵列,所述AuGe/Au电极16是沿一列方向x与一横向于该列方向x的行方向y彼此间隔排列,且该AuGe/Au电极16阵列最终对应至该现有的被动式微发光二极管显示器1的像素是64行×32列;在该步骤(d)中,更通过热处理以使所述AuGe/Au电极16与该N-AlInP层121间形成欧姆接触。
于完成该步骤(d)后,该步骤(e)是利用干式蚀刻(dry etching)使该磊晶膜12高台绝缘(mesa isolation);其中,干式蚀刻是终止于该ITO层13并令该经干蚀刻后的磊晶膜12成为一由多个微发光二极管晶粒(LED chips)120所构成的阵列。
参阅图3,于完成该步骤(e)后,该步骤(f)是蚀刻该ITO层13成为多个行线路(column line)131。在如图3所示的该步骤(f)中,只有最外侧的两个行线路131上是未设置有微发光二极管晶粒120,且位在最外侧的该两个行线路131内的剩余行线路131上是设置有微发光二极管晶粒120,并于该剩余行线路131的一侧132上是未设置有微发光二极管晶粒120。
再参阅图3,该步骤(g)是配合电子束蒸镀法、黄光微影与蚀刻制程于最外侧的该两个行线路131上分别沉积一第一增厚金属层171,并于各剩余行线路131的该侧132上沉积一第二增厚金属层172;其中,各第二增厚金属层172是用来作为内连接(interconnection)至该行方向y上的各微发光二极管晶粒120的P电极使用,同时也是用来作为控制该被动式微发光二极管显示器1的一行方向定址电极(address electrodes)使用。
参阅图4,该步骤(h)是于该粘着剂层14上覆盖一高分子材料18以裸露出所述第一增厚金属层171、所述第二增厚金属层172与各AuGe/Au电极16,其目的在于令该被动式微发光二极管显示器1平坦化。
再参阅图4,该步骤(i)是配合电子束蒸镀法、黄光微影与蚀刻制程沿该列方向x于各自所对应的各第一增厚电极层171上与AuGe/Au电极16上沉积一N金属线路19,从而制得该被动式微发光二极管显示器1;在图4所示的该步骤(i)中,各N金属线路19是用来作为内连接至该列方向x上的各微发光二极管晶粒120的N电极使用,同时也是用来作为控制该现有的被动式微发光二极管显示器1的一列方向定址电极使用。
虽然该前案所公开的现有的被动式微发光二极管显示器1制作成本低,不像使用薄膜电晶体(TFT)来控制显示器的主动式微发光二极管显示器来得耗费成本与复杂。然而,基于各第二增厚金属层172是用来作为内连接至该行方向y上的各微发光二极管晶粒120的P电极与控制该现有的被动式微发光二极管显示器1的行方向定址电极使用,且各N金属线路19是用来作为内连接至该列方向x上的各微发光二极管晶粒120的N电极与控制该现有的被动式微发光二极管显示器1的列方向定址电极使用;因此,对应至各N金属线路19下方的最外侧的该两个行线路131与对应至各第二增厚金属层172下方的各剩余行线路131的该侧132,则是用来作为电连接至一外部驱动晶片(图未示)的一外部线路使用。
然而,此处须说明的是,该现有的被动式微发光二极管显示器1为了使得各微发光二极管晶粒120能电连接至该外部驱动晶片,其必须牺牲掉该蓝宝石基板15上的该最外侧的该两个行线路131与各剩余行线路131的该侧132的空间以作为外部电路使用。换句话说,不论是制得该现有的被动式微发光二极管显示器1前的该GaAs基板11面积,甚或是最终制得该现有的被动式微发光二极管显示器1的该蓝宝石基板15面积,都无法有效地被利用。
再者,该现有的被动式微发光二极管显示器1虽然可以通过所述第一增厚金属层171与所述第二增厚金属层172来初步补偿串联电阻所致的问题;然而,其补偿的效果相当有限。因此,由图5所示[配合参阅图4的步骤(i)]可知,该现有的被动式微发光二极管显示器1的位在第3列上的所述微发光二极管晶粒120的输出功率约4.5mW至3.8mW;位在第15列上的所述微发光二极管晶粒120因相对位在第3列上的所述微发光二极管晶粒120远离各第二增厚金属层172,以致于其串联电阻相对大于位在第3列上的所述微发光二极管晶粒120因而输出功率下降至4.0mW至3.5mW;且位在第31列上的所述微发光二极管晶粒120的输出功率更下降至3.8mW至3.15mW。因此,所述微发光二极管晶粒120在该行方向y上的亮度是自邻近各所述第二增厚金属层172背向该行方向y逐渐递减,亮度不均匀。
进一步由图6所示[配合参阅图4的步骤(i)]可知,该现有的被动式微发光二极管显示器1的位在第3、33、61行上所对应的所述微发光二极管晶粒120的三条输出功率曲线虽然趋近重叠;然而,前述三条输出功率曲线却是自第1列像素朝第15列像速递减,亮度难以均匀化。
经上述说明可知,改良被动式微发光二极管阵列装置的结构以有效地利用基板面积同时并改善亮度均匀性,是所属技术领域中的相关技术人员有待突破的课题,是本发明的技术领域中的技术人员当前所应克服的课题。
发明内容
本发明的目的在于提供一种能有效利用基板面积同时改善亮度均匀性的亮度均匀的被动式微发光二极管阵列装置。
本发明亮度均匀的被动式微发光二极管阵列装置,其包括微发光二极管阵列,及外部线路组件。
该微发光二极管阵列包括具有阵列设置面的基板、多个沿第一方向彼此间隔地布满该阵列设置面的微发光阵列,及覆盖该阵列设置面与所述微发光阵列的阵列用绝缘层。各微发光阵列具有沿横向于该第一方向的第二方向延伸以形成于该阵列设置面上的第一层、多个沿该第二方向彼此间隔地形成于其第一层上的发光层、多个分别形成于各自所对应的发光层上的第二层、多个分别设置于各自所对应的第二层上的第一内电极层,及沿该第二方向延伸地设置于该第一层上的第二内电极层。各微发光阵列的第二内电极层具有间隔地围绕各自所对应的发光层的基部,及自其基部背向该阵列设置面凸伸而出的凸部。该阵列用绝缘层裸露出各微发光阵列的第二内电极层的凸部与各第一内电极层。
该外部线路组件包括间隔地面向该微发光二极管阵列的阵列设置面设置并具有线路设置面的载板、多个第一外部线路、多个第二外部线路、线路用绝缘层,及电性键合单元。所述第一外部线路沿该第一方向彼此间隔设置于该载板的线路设置面,并沿该第二方向延伸。所述第二外部线路沿该第二方向彼此间隔排列于该载板,并沿该第一方向延伸。该线路用绝缘层覆盖该线路设置面,以令所述第一外部线路与所述第二外部线路彼此电性隔绝,并裸露出所述第一外部线路及所述第二外部线路。该电性键合单元设置于经裸露于该线路用绝缘层外的所述第一外部线路及所述第二外部线路上,以电性键合于各微发光阵列的第二内电极层的凸部与各第一内电极层。
本发明的亮度均匀的被动式微发光二极管阵列装置,各微发光阵列的第二内电极层的凸部自其基部的端缘处背向该阵列设置面凸伸至等高于所述第一内电极层。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的各第二外部线路自该线路设置面的第一侧缘沿该第一方向延伸至该线路设置面的第二侧缘;该外部线路组件的各第一外部线路自该线路设置面的第三侧缘沿该第二方向延伸以未接触至所述第二外部线路;该外部线路组件的电性键合单元是选自异向性导电胶层、球栅阵列、多个焊块或多个增厚焊条。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是该异向性导电胶层,该异向性导电胶层覆盖且接触经裸露于该线路用绝缘层外的所述第一外部线路及所述第二外部线路,并裸露出位于该线路设置面的第一侧缘处的所述第二外部线路,且裸露出位于该线路设置面的第三侧缘处的所述第一外部线路。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是该球栅阵列,该球栅阵列由多个锡球所构成,一部分的锡球沿该第二方向彼此间隔地接触各自所对应的各第二外部线路,剩余的锡球分别接触各第一外部线路且远离该载板的线路设置面的第三侧缘。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是所述增厚焊条,各增厚焊条分别对应接触各自所对应的各第一外部线路与各第二外部线路。
本发明的亮度均匀的被动式微发光二极管阵列装置,各微发光阵列的第二内电极层的凸部自其基部的间隔围绕各发光层处背向该阵列设置面凸伸至等高于所述第一内电极层。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的各第一外部线路具有设置于该载板的线路设置面的延伸段,及多个沿该第二方向彼此间隔地自其延伸段凸伸出该线路用绝缘层外的内连接段;该外部线路组件的各第二外部线路设置于该线路用绝缘层上;该外部线路组件的电性键合单元是选自由下列所构成的群组的电导性元件:异向性导电胶层、球栅阵列、多个焊块、多个增厚焊条,与球栅阵列及多个增厚焊条的组合。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是该异向性导电胶层,该异向性导电胶层与各第一外部线路的内连接段接触,并与各第二外部线路接触。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是该球栅阵列,该球栅阵列由多个锡球所构成,一部分的锡球沿该第一方向彼此间隔地接触各自所对应的各第二外部线路,剩余的锡球分别接触各第一外部线路的内连接段。
本发明的亮度均匀的被动式微发光二极管阵列装置,该外部线路组件的电性键合单元是该球栅阵列及所述增厚焊条的组合,该球栅阵列由多个锡球所构成,所述锡球分别沿该第二方向彼此间隔地接触各第一外部线路的内连接段,各增厚焊条是对应接触各第二外部线路。
本发明的有益效果在于:利用该基板的阵列设置面布满所述微发光阵列并配合该外部线路组件能有效地利用该基板的阵列设置面的面积,且各微发光阵列的第二内电极层的基部是围绕各自所对应的发光层,其是自各第一层增厚至各自所对应的发光层处,有利于补偿串联电阻以提升亮度均匀性。
附图说明
本发明的其他的特征及功效,将于参照图式的实施方式中清楚地呈现,其中:
图1是一主视示意流程图,说明一种现有的被动式微发光二极管显示器的制法的一步骤(a)、一步骤(b)与一步骤(c);
图2是一立体流程图,说明延续图1的制法的一步骤(d)与一步骤(e);
图3是一立体流程图,说明延续图2的制法的一步骤(f)与一步骤(g);
图4是一立体流程图,说明延续图3的制法的一步骤(h)与一步骤(i);
图5是一输出功率对行像素数目曲线图,说明该现有的被动式微发光二极管显示器的亮度均匀性;
图6是一输出功率对列像素数目曲线图,说明该现有的被动式微发光二极管显示器的亮度均匀性;
图7是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第一实施例的一微发光二极管阵列;
图8是图7的一主视示意图;
图9是一立体图,说明本发明该第一实施例的一外部线路组件;
图10是图9的一主视示意图;
图11是一主视示意图,说明本发明该第一实施例的亮度均匀的被动式微发光二极管阵列装置;
图12是一输出功率对行像素数目曲线图,说明本发明该第一实施例的亮度均匀性;
图13是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第二实施例的外部线路组件;
图14是图13的一主视示意图;
图15是一主视示意图,说明本发明该第二实施例的亮度均匀的被动式微发光二极管阵列装置;
图16是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第三实施例的外部线路组件;
图17是图16的一主视示意图;
图18是一主视示意图,说明本发明该第三实施例的亮度均匀的被动式微发光二极管阵列装置;
图19是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第四实施例的微发光二极管阵列;
图20是图19的一主视示意图;
图21是一立体图,说明本发明该第四实施例的外部线路组件;
图22是图21的一主视示意图;
图23是一主视示意图,说明本发明该第四实施例的亮度均匀的被动式微发光二极管阵列装置;
图24是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第五实施例的外部线路组件;
图25是图24的一主视示意图;
图26是一主视示意图,说明本发明该第五实施例的亮度均匀的被动式微发光二极管阵列装置;
图27是一立体图,说明本发明亮度均匀的被动式微发光二极管阵列装置的一第六实施例的外部线路组件;
图28是图27的一主视示意图;及
图29是一主视示意图,说明本发明该第六实施例的亮度均匀的被动式微发光二极管阵列装置。
具体实施方式
在本发明被详细描述前,应当注意在以下的说明内容中,类似的元件是以相同的编号来表示。
参阅图7至图11,本发明亮度均匀的被动式微发光二极管阵列装置的一第一实施例,是用于电性键合于接合有一驱动晶片(图未示)的印刷电路板(如,软性印刷电路板)9,其包括一微发光二极管阵列2及一外部线路组件3。
如图7与图8所示,本发明该第一实施例的微发光二极管阵列2实质上是由一具有一阵列设置面211的基板21、多个微发光阵列22与一阵列用绝缘层23所构成;其中,该基板21是一双面抛光蓝宝石基板。
所述微发光阵列22沿一第一方向(行方向)Y彼此间隔地布满该阵列设置面211,且各微发光阵列22具有一沿一实质横向于该第一方向的第二方向(列方向)X延伸以磊晶制造于该阵列设置面211上的第一层221、多个沿该第二方向(列方向)X彼此间隔地磊晶制造于其第一层221上的发光层222、多个分别磊晶制造于各自所对应的发光层222上的第二层223、多个分别设置于各自所对应的第二层223上的第一内电极层224,及一沿该第二方向(列方向)X延伸地设置于该第一层221上的第二内电极层225。各微发光阵列22的第二内电极层225具有一间隔地围绕各自所对应的发光层222的基部2251,及一自其基部2251背向该阵列设置面211凸伸而出的凸部2252。该阵列用绝缘层23覆盖该阵列设置面211与所述微发光阵列22并裸露出各微发光阵列22的第二内电极层225的凸部2252与各第一内电极层224。
在本发明该第一实施例中,各第一层221与各第二层223分别是如图所示,为n-GaN与p-GaN,且各第一内电极层224与各第二内电极层225分别是ITO与第一金属(如,Au、Ag、Al、Cu或Ti),而该阵列用绝缘层23则是选自SU-8光阻、氧化硅或氧化铝;此外,该微发光阵列22的数量是32个(也就是,32列的微发光阵列22),各微发光阵列22的第一层221上所磊晶制造的发光层222与第二层223的数量有64个,且各微发光阵列22的第一层221、发光层222与第二层223共同构成64个微发光二极管晶粒。换句话说,本发明该第一实施例具有32×64个微发光二极管晶粒,像素是32列×64行。此处需补充说明的是,本发明各第二内电极层225的围绕各自所对应的发光层222的基部2251是如图8所示,自各第一层221朝上增厚至各自所对应的发光层222处,其可补偿该第一实施例的各像素的串联电阻问题。
如图9与图10所示,该外部线路组件3是用于键合至印刷电路板9,并包括一间隔地面向该微发光二极管阵列2的阵列设置面211设置且具有一线路设置面301的载板30、多个第一外部线路31、多个第二外部线路32、一线路用绝缘层33,及一电性键合单元34。
所述第一外部线路31沿该第一方向(行方向)Y彼此间隔设置于该载板30的线路设置面301,并沿第二方向(列方向)X延伸。所述第二外部线路32沿该第二方向(列方向)X彼此间隔排列于该载板30,并沿该第一方向(行方向)Y延伸。该线路用绝缘层33覆盖该线路设置面301,以令所述第一外部线路31与所述第二外部线路32彼此电性隔绝,并裸露出所述第一外部线路31及所述第二外部线路32。该电性键合单元34设置于经裸露于该线路用绝缘层33外的所述第一外部线路31及所述第二外部线路32上,以电性键合于各微发光阵列22的第二内电极层225的凸部2252与各第一内电极层224。
详细地来说,本发明该第一实施例的各微发光阵列22的第二内电极层225的凸部2252是自其基部2251的一端缘2253(如图8所示)处背向该阵列设置面211凸伸至实质等高于所述第一内电极层224;该外部线路组件3的各第二外部线路32是自该线路设置面301的一第一侧缘3011沿该第一方向(行方向)Y延伸至该线路设置面301的一第二侧缘3012;该外部线路组件3的各第一外部线路31是自该线路设置面301的一第三侧缘3013沿该第二方向(列方向)X延伸以未接触至所述第二外部线路32。在本发明该第一实施例中,该载板30是一玻璃基板,该线路用绝缘层33则是选自SU-8光阻、氧化硅或氧化铝,所述第一外部线路31与所述第二外部线路32是使用如前所述的第一金属。换句话说,本发明该第一实施例的外部线路组件3是一单层金属线路载板。
适用于本发明该第一实施例的电性键合单元34是选自一异向性导电胶(ACF)层341、一球栅阵列(BGA)、多个焊块(bump)或多个增厚焊条(stripe)343(如图16所示)。
在本发明该第一实施例中,该外部线路组件3的电性键合单元34是该异向性导电胶层341。该异向性导电胶层341覆盖且接触经裸露于该线路用绝缘层33外的所述第一外部线路31及所述第二外部线路32,并裸露出位于该线路设置面301的第一侧缘3011处的所述第二外部线路32,且裸露出位于该线路设置面301的第三侧缘3013处的所述第一外部线路31,其目的是用于对外键合于印刷电路板9,以令键合有该微发光二极管阵列2的所述微发光阵列22能通过接合于印刷电路板9的驱动晶片(图未示)来控制该外部线路组件3中的各第一外部线路31与各第二外部线路32,令各第一外部线路31与各第二外部线路32得以驱动各微发光二极管晶粒。
此处需进一步补充说明的是,本发明该第一实施例的外部线路组件3在键合至该微发光二极管阵列2后,更可进一步在该微发光二极管阵列2的阵列用绝缘层23的一周缘与该外部线路组件3的线路用绝缘层33的一周缘覆盖一封胶(图未示),以借此通过该外部线路组件3的载板30与该封胶达到双重保护从而提升元件可靠度。
参阅图12,由本发明该第一实施例的输出光率对行像素数目曲线图所示可知,位在第1、16、32列上的各微发光二极管晶粒的输出功率曲线不只趋近重叠,其自第1行至第64行像素的输出功率的变化也趋近平坦,证实本发明该第一实施例可借由各第二电极层225的围绕各自所对应的发光层222的基部2251来补偿各微发光二极管晶粒的串联电阻问题。
此外,比较前案的图4与本案的图7与图8可知,前案的蓝宝石基板15必须牺牲掉对应至最外侧的该两个行线路131处的面积与对应至剩余行线路131的该侧132处的面积来作为外部线路,导致蓝宝石基板15对应至最外侧的该两个行线路131处的面积与对应至剩余行线路131的该侧132处的面积未能设置微发光二极管晶粒120,无法有效被利用。反观本案该第一实施例(见图7与图8),虽然该基板21仍留有各微发光阵列22的第二内电极225的凸部2252的空间;然而,相较于前案的图4,本案基板21只单侧供设置各微发光阵列22的第二内电极225的凸部2252,前案则是牺牲掉最外两侧处,且本案也无须如同前案般牺牲掉剩余行线路131的该侧132处的空间。因此,就相同尺寸的微发光二极管晶粒来论,本发明该第一实施例将第一、二外部线路31、32设置在该载板30上,能相对该前案更有效地利用基板2的阵列设置面211上的空间。
参阅图13、图14与图15,本发明亮度均匀的被动式微发光二极管阵列装置的一第二实施例大致上是相同于该第一实施例,其不同处是在于,本发明该第二实施例的外部线路组件3的电性键合单元34是该球栅阵列(BGA),该球栅阵列(BGA)是由多个锡球342所构成,各锡球342可以是Sn-Au合金或Sn-Ag-Cu合金,一部分的锡球342是沿该第二方向(列方向)X彼此间隔地接触各自所对应的各第二外部线路32,剩余的锡球342是分别接触各第一外部线路31且远离该载板30的线路设置面301的第三侧缘3013。
在本发明该第二实施例中,该部分的各锡球342是对应键合各自所对应的第一内电极层224,且该剩余的各锡球342是对应键合各自所对应的各微发光阵列22的第二内电极层225的凸部2252。
参阅图16、图17与图18,本发明亮度均匀的被动式微发光二极管阵列装置的一第三实施例大致上是相同于该第一实施例,其不同处是在于,本发明该第三实施例的外部线路组件3的电性键合单元34是所述增厚焊条343,各增厚焊条343是分别对应接触各自所对应的各第一外部线路31与各第二外部线路32。在本发明该第三实施例中,所述增厚焊条343是对应键合各第一内电极层224与各第二内电极层225的凸部2252。
参阅图19至图23,本发明亮度均匀的被动式微发光二极管阵列装置的一第四实施例大致上是相同于该第一实施例,其不同处是在于,本发明该第四实施例的各微发光阵列22(如图19与图20所示)的第二内电极层225的凸部2252是自其基部2251的间隔围绕各发光层222处背向该阵列设置面211凸伸至实质等高于所述第一内电极层224。换句话说,本发明该第四实施例的各第二内电极层225是如图20所示般,自各自所对应的第一层221围绕各自所对应的各发光层222朝上增厚至各自所对应的第一内电极层224处,其更可补偿该第四实施例的各像素(各微发光二极管晶粒)的串联电阻问题。
再参阅图21与图22,该外部线路组件3的各第一外部线路31具有一设置于该载板30的线路设置面301的延伸段311,及多个沿该第二方向(列方向)X彼此间隔地自其延伸段311凸伸出该线路用绝缘层33外的内连接段312;该外部线路组件3的各第二外部线路32设置于该线路用绝缘层33上。换句话说,本发明该第四实施例的外部线路组件3是一双层金属线路载板。基于本发明该第四实施例的外部线路组件3是双层金属线路载板,以致于相邻第一外部线路31间距与相邻第二外部线路32间距可以相对小于该第一、二、三实施例的单层金属线路载板的第一、二外部线路31、32的两相邻间距;因此,本发明该第四实施例的外部线路组件3可对各微发光阵列22的微发光二极管晶粒补偿的串联电阻更高,因而该第四实施例的亮度均匀性相对优于该第一、二、三实施例。
适用于本发明该第四实施例的外部线路组件3的电性键合单元34是选自一由下列所构成的群组的电导性元件:该异向性导电胶(ACF)层341、该球栅阵列(BGA)、所述焊块、所述增厚焊条343,与该球栅阵列(BGA)及所述增厚焊条343的组合。
在本发明该第四实施例中,该外部线路组件3的电性键合单元34是该异向性导电胶(ACF)层341,该异向性导电胶(ACF)层341与各第一外部线路31的内连接段312接触,并与各第二外部线路32接触。
参阅图24、图25与图26,本发明亮度均匀的被动式微发光二极管阵列装置的一第五实施例大致上是相同于该第四实施例,其不同处是在于,本发明该第五实施例的该外部线路组件3的电性键合单元34是该球栅阵列(BGA),该球栅阵列(BGA)是由所述锡球342所构成。如图24所示,一部分的锡球342是沿该第一方向(行方向)Y彼此间隔地接触各自所对应的各第二外部线路32,剩余的锡球342是分别接触各第一外部线路31的内连接段312。
参阅图27、图28与图29,本发明亮度均匀的被动式微发光二极管阵列装置的一第六实施例大致上是相同于该第五实施例,其不同处是在于,本发明该第六实施例的外部线路组件3的电性键合单元34是该球栅阵列(BGA)及所述增厚焊条343的组合。所述球栅阵列(BGA)的锡球342是分别沿该第二方向(列方向)X彼此间隔地接触各第一外部线路31的内连接段312,各增厚焊条343是对应接触各第二外部线路32。虽然本发明该第六实施例的电性键合单元34是该球栅阵列(BGA)及所述增厚焊条343的组合,但是诚如前面所述,适用于本发明的电性键合单元34也可以选自焊块;因此,本发明该第六实施例的电性键合单元34的该球栅阵列(BGA)及所述增厚焊条343的组合中的各锡球342,也可以采用焊块来取代。
整合所述实施例的详细说明,以相同微发光二极管晶粒尺寸进一步就有效利用该基板21的阵列设置面211的面积来比较图7、图8与图19、图20。本发明该第四、五、六实施例相较于该第一、二、三实施例,更无须如同该第一、二、三实施例般,尚须牺牲掉该基板21的阵列设置面211的各第二内电极层225的基部2251的该端缘2253(见图7与图8)处,来对应配置各第二内电极层225的凸部2252。因此,本发明该第四、五、六实施例的各微发光阵列22能相对第一、二、三实施例增设1颗微发光二极管晶粒(见图19与图20)。换句话说,本发明该第四、五、六实施例的微发光二极管晶粒的总量能相对第一、二、三实施例增加32颗(也就是,1×32颗),更能有效地利用该基板21的阵列设置面211的面积。
综上所述,本发明亮度均匀的被动式微发光二极管阵列装置,利用该基板21的阵列设置面211布满所述微发光阵列22并配合该外部线路组件3能有效地利用该基板21的阵列设置面211的面积,且各微发光阵列22的第二内电极层225至少自各第一层221处增厚至各自所对应的发光层222处,有利于补偿串联电阻以提升亮度均匀性;此外,双层金属线路载板缩减了第一外部线路31、第二外部线路32的相邻间距,更有利于补偿串联电阻以提升亮度均匀性,而该外部线路组件3的载板30对本发明的装置的保护也有利于提升装置的可靠度,所以确实能达成本发明的目的。
惟以上所述者,只为本发明的实施例而已,当不能以此限定本发明实施的范围,凡是依本发明权利要求书及说明书内容所作的简单的等效变化与修饰,皆仍属本发明涵盖的范围内。

Claims (10)

1.一种亮度均匀的被动式微发光二极管阵列装置,其特征在于:包含:
微发光二极管阵列,包括:
基板,具有阵列设置面,
多个微发光阵列,沿第一方向彼此间隔地布满该阵列设置面,各微发光阵列具有沿横向于该第一方向的第二方向延伸以形成于该阵列设置面上的第一层、多个沿该第二方向彼此间隔地形成于其第一层上的发光层、多个分别形成于各自所对应的发光层上的第二层、多个分别设置于各自所对应的第二层上的第一内电极层,及沿该第二方向延伸地设置于该第一层上的第二内电极层,各微发光阵列的第二内电极层具有间隔地围绕各自所对应的发光层的基部,及自其基部背向该阵列设置面凸伸而出的凸部,且各微发光阵列的第二内电极层的凸部自其基部的端缘处背向该阵列设置面凸伸至等高于所述第一内电极层,及
阵列用绝缘层,覆盖该阵列设置面与所述微发光阵列以裸露出各微发光阵列的第二内电极层的凸部与各第一内电极层;及
外部线路组件,包括:
载板,间隔地面向该微发光二极管阵列的阵列设置面设置,并具有一线路设置面,
多个第一外部线路,沿该第一方向彼此间隔设置于该载板的线路设置面并沿该第二方向延伸,
多个第二外部线路,沿该第二方向彼此间隔排列于该载板并沿该第一方向延伸,
线路用绝缘层,覆盖该线路设置面以令所述第一外部线路与所述第二外部线路彼此电性隔绝,并裸露出所述第一外部线路及所述第二外部线路,及
电性键合单元,设置于经裸露于该线路用绝缘层外的所述第一外部线路及所述第二外部线路上,以电性键合于各微发光阵列的第二内电极层的凸部与各第一内电极层。
2.根据权利要求1所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的各第二外部线路自该线路设置面的第一侧缘沿该第一方向延伸至该线路设置面的第二侧缘;该外部线路组件的各第一外部线路自该线路设置面的第三侧缘沿该第二方向延伸以未接触至所述第二外部线路;该外部线路组件的电性键合单元是选自异向性导电胶层、球栅阵列、多个焊块或多个增厚焊条。
3.根据权利要求2所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是该异向性导电胶层,该异向性导电胶层覆盖且接触经裸露于该线路用绝缘层外的所述第一外部线路及所述第二外部线路,并裸露出位于该线路设置面的第一侧缘处的所述第二外部线路,且裸露出位于该线路设置面的第三侧缘处的所述第一外部线路。
4.根据权利要求2所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是该球栅阵列,该球栅阵列由多个锡球所构成,一部分的锡球沿该第二方向彼此间隔地接触各自所对应的各第二外部线路,剩余的锡球分别接触各第一外部线路且远离该载板的线路设置面的第三侧缘。
5.根据权利要求2所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是所述增厚焊条,各增厚焊条分别对应接触各自所对应的各第一外部线路与各第二外部线路。
6.一种亮度均匀的被动式微发光二极管阵列装置,其特征在于:包含:
微发光二极管阵列,包括:
基板,具有阵列设置面,
多个微发光阵列,沿第一方向彼此间隔地布满该阵列设置面,各微发光阵列具有沿横向于该第一方向的第二方向延伸以形成于该阵列设置面上的第一层、多个沿该第二方向彼此间隔地形成于其第一层上的发光层、多个分别形成于各自所对应的发光层上的第二层、多个分别设置于各自所对应的第二层上的第一内电极层,及沿该第二方向延伸地设置于该第一层上的第二内电极层,各微发光阵列的第二内电极层具有间隔地围绕各自所对应的发光层的基部,及自其基部背向该阵列设置面凸伸而出的凸部,且各微发光阵列的第二内电极层的凸部自其基部的间隔围绕各发光层处背向该阵列设置面凸伸至等高于所述第一内电极层,及
阵列用绝缘层,覆盖该阵列设置面与所述微发光阵列以裸露出各微发光阵列的第二内电极层的凸部与各第一内电极层;及
外部线路组件,包括:
载板,间隔地面向该微发光二极管阵列的阵列设置面设置,并具有一线路设置面,
多个第一外部线路,沿该第一方向彼此间隔设置于该载板的线路设置面并沿该第二方向延伸,
多个第二外部线路,沿该第二方向彼此间隔排列于该载板并沿该第一方向延伸,
线路用绝缘层,覆盖该线路设置面以令所述第一外部线路与所述第二外部线路彼此电性隔绝,并裸露出所述第一外部线路及所述第二外部线路,及
电性键合单元,设置于经裸露于该线路用绝缘层外的所述第一外部线路及所述第二外部线路上,以电性键合于各微发光阵列的第二内电极层的凸部与各第一内电极层。
7.根据权利要求6所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的各第一外部线路具有设置于该载板的线路设置面的延伸段,及多个沿该第二方向彼此间隔地自其延伸段凸伸出该线路用绝缘层外的内连接段;该外部线路组件的各第二外部线路设置于该线路用绝缘层上;该外部线路组件的电性键合单元是选自由下列所构成的群组的电导性元件:异向性导电胶层、球栅阵列、多个焊块、多个增厚焊条,与球栅阵列及多个增厚焊条的组合。
8.根据权利要求7所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是该异向性导电胶层,该异向性导电胶层与各第一外部线路的内连接段接触,并与各第二外部线路接触。
9.根据权利要求7所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是该球栅阵列,该球栅阵列由多个锡球所构成,一部分的锡球沿该第一方向彼此间隔地接触各自所对应的各第二外部线路,剩余的锡球分别接触各第一外部线路的内连接段。
10.根据权利要求7所述的亮度均匀的被动式微发光二极管阵列装置,其特征在于:该外部线路组件的电性键合单元是该球栅阵列及所述增厚焊条的组合,该球栅阵列由多个锡球所构成,所述锡球分别沿该第二方向彼此间隔地接触各第一外部线路的内连接段,各增厚焊条对应接触各第二外部线路。
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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI705562B (zh) * 2019-12-13 2020-09-21 國立中興大學 大面積被動式微發光二極體陣列顯示器
TWI784592B (zh) * 2021-06-21 2022-11-21 錼創顯示科技股份有限公司 微型發光二極體顯示裝置
CN113945232B (zh) * 2021-10-15 2022-04-22 广东绿展科技有限公司 电阻式传感器及其制备方法
TWI824880B (zh) * 2022-12-14 2023-12-01 友達光電股份有限公司 顯示裝置
TWI824887B (zh) * 2022-12-16 2023-12-01 友達光電股份有限公司 顯示面板

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI254353B (en) * 2005-06-27 2006-05-01 Univ Nat Chunghsing Solid-state of micro-light-emitting-device array
KR20150013603A (ko) * 2012-04-27 2015-02-05 럭스뷰 테크놀로지 코포레이션 자가-정렬 금속화 스택을 구비한 마이크로 led 디바이스를 형성하는 방법
TW201526303A (zh) * 2013-12-24 2015-07-01 Nat Univ Chung Hsing 多晶粒覆晶模組封裝方法
CN104752458A (zh) * 2013-12-25 2015-07-01 清华大学 有机发光二极管阵列的制备方法
CN106876552A (zh) * 2017-02-27 2017-06-20 深圳市华星光电技术有限公司 微发光二极管阵列基板及显示面板
CN108269823A (zh) * 2016-12-30 2018-07-10 乐金显示有限公司 发光二极管显示装置和使用其的多屏幕显示装置
CN108695304A (zh) * 2017-03-31 2018-10-23 亿光电子工业股份有限公司 发光装置及其制造方法
CN108933153A (zh) * 2018-07-27 2018-12-04 上海天马微电子有限公司 显示面板及其制作方法、显示装置
TWI650852B (zh) * 2018-03-07 2019-02-11 趨勢照明股份有限公司 主動式驅動發光二極體陣列的製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295280A (ja) * 1990-04-13 1991-12-26 Matsushita Electric Ind Co Ltd 発光素子およびその製造方法と発光素子を用いたledアレイおよびそのledアレイを用いたledプリンタ
KR101167772B1 (ko) * 2010-02-12 2012-07-24 희성전자 주식회사 발광다이오드 어레이 및 그 제조방법
KR20110133244A (ko) * 2010-06-04 2011-12-12 이병문 엘이디 어레이 방법, 이에 사용되는 기판과 이를 사용한 엘이디 어레이 패키지
KR101448165B1 (ko) * 2013-11-27 2014-10-08 지엘비텍 주식회사 금속 본딩 회로 패턴을 독립적으로 구성하고,어레이가 형성되어 직병렬 연결 구조가 가능하게 한 cob 또는 com 형태의 led 모듈
CN104752611B (zh) * 2013-12-25 2017-09-01 清华大学 有机发光二极管阵列
CN104752460B (zh) * 2013-12-25 2018-05-01 清华大学 有机发光二极管阵列的制备方法
CN104752347B (zh) * 2013-12-25 2017-11-14 清华大学 有机发光二极管阵列的制备方法
CN104752457B (zh) * 2013-12-25 2018-01-19 清华大学 有机发光二极管阵列的制备方法
US9484492B2 (en) * 2015-01-06 2016-11-01 Apple Inc. LED structures for reduced non-radiative sidewall recombination
WO2017034268A1 (ko) * 2015-08-21 2017-03-02 엘지전자 주식회사 반도체 발광 소자를 이용한 디스플레이 장치
US10378736B2 (en) * 2016-11-03 2019-08-13 Foshan Nationstar Optoelectronics Co., Ltd. LED bracket, LED bracket array, LED device and LED display screen
CN107068811B (zh) * 2017-03-15 2019-06-18 京东方科技集团股份有限公司 发光二极管装置的制作方法以及发光二极管装置

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI254353B (en) * 2005-06-27 2006-05-01 Univ Nat Chunghsing Solid-state of micro-light-emitting-device array
KR20150013603A (ko) * 2012-04-27 2015-02-05 럭스뷰 테크놀로지 코포레이션 자가-정렬 금속화 스택을 구비한 마이크로 led 디바이스를 형성하는 방법
TW201526303A (zh) * 2013-12-24 2015-07-01 Nat Univ Chung Hsing 多晶粒覆晶模組封裝方法
CN104752458A (zh) * 2013-12-25 2015-07-01 清华大学 有机发光二极管阵列的制备方法
CN108269823A (zh) * 2016-12-30 2018-07-10 乐金显示有限公司 发光二极管显示装置和使用其的多屏幕显示装置
CN106876552A (zh) * 2017-02-27 2017-06-20 深圳市华星光电技术有限公司 微发光二极管阵列基板及显示面板
CN108695304A (zh) * 2017-03-31 2018-10-23 亿光电子工业股份有限公司 发光装置及其制造方法
TWI650852B (zh) * 2018-03-07 2019-02-11 趨勢照明股份有限公司 主動式驅動發光二極體陣列的製造方法
CN108933153A (zh) * 2018-07-27 2018-12-04 上海天马微电子有限公司 显示面板及其制作方法、显示装置

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