TWI707466B - 亮度均勻之被動式微發光二極體陣列裝置 - Google Patents

亮度均勻之被動式微發光二極體陣列裝置 Download PDF

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TWI707466B
TWI707466B TW108126000A TW108126000A TWI707466B TW I707466 B TWI707466 B TW I707466B TW 108126000 A TW108126000 A TW 108126000A TW 108126000 A TW108126000 A TW 108126000A TW I707466 B TWI707466 B TW I707466B
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micro
array
layer
light
emitting diode
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TW108126000A
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TW202105709A (zh
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武東星
洪瑞華
陳柏瑋
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國立中興大學
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Priority to TW108126000A priority Critical patent/TWI707466B/zh
Priority to CN201911264850.1A priority patent/CN112310136B/zh
Priority to US16/857,685 priority patent/US11094853B2/en
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Publication of TWI707466B publication Critical patent/TWI707466B/zh
Publication of TW202105709A publication Critical patent/TW202105709A/zh

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Abstract

亮度均勻之被動式微發光二極體陣列裝置包括微發光二極體陣列及外部線路組件。微發光二極體陣列包括基板、數沿Y方向間隔佈滿基板的微發光陣列及陣列用絕緣層。各微發光陣列依序具一沿X方向延伸於基板的第一層、數間隔的發光層、第二層、第一內電極層，更具一延伸於第一層並具間隔圍繞發光層的基部及自基部凸伸之凸部的第二內電極層。陣列用絕緣層覆蓋基板並裸露第一、二內電極層。外部線路組件包括面向基板的載板、各沿Y、X方向間隔並沿X、Y方向延伸於載板的第一、二外部線路、裸露出第一、二外部線路的線路用絕緣層及鍵合於第一、二外部線路與第一、二內電極層的電性鍵合單元。

Description

亮度均勻之被動式微發光二極體陣列裝置
本發明是有關於一種被動式微發光二極體(Micro-LED)陣列裝置，特別是指一種亮度均勻之被動式微發光二極體陣列裝置。
隨著科技的演進與市場的需求，各類輕薄短小化之電子裝置的相關研究已成為現階段各大電子廠的開發主流。前述輕薄短小化之電子裝置可見有由微發光二極體所構成之微發光二極體顯示器(Micro-LED display)。
發明人曾於JOURNAL OF THE ELECTRON DEVICES SOCIETY VOLUME 6,2018之Fabrication and Study on Red Light Micro-LED Displays一文中(以下稱前案)公開一種傳統的被動式微發光二極體顯示器1(見圖4)。該傳統的被動式微發光二極體顯示器1之製法是依序參閱圖1至圖4所示之一步驟(a)、一步驟(b)、一步驟(c)、一步驟(d)、一步驟(e)、一步驟(f)、一步驟(g)、一步驟(h)與一步驟(i)所製得。
如圖1所示，該步驟(a)是以有機金屬化學氣相沉積法(MOCVD)在一GaAs基板11上依序沉積一N-AlInP層121、一多重量子井(MQW)膜層結構122與一P-GaP層123以構成一磊晶膜12後，再以電子束蒸鍍法(e-gun evaporation)於該磊晶膜12上沉積一ITO層13用以歐姆接觸並電流擴散層。接著，該步驟(b)是以一黏著劑層14黏合該ITO層13與一雙面拋光之藍寶石基板15。於完成該步驟(b)後，該步驟(c)是以濕式化學蝕刻法自該磊晶膜12移除該GaAs基板11，以暴露出該磊晶膜12的N-AlInP層121。
如圖2所示，該步驟(d)是將黏合有該藍寶石基板15的磊晶膜12翻轉180度後，透過熱沉積系統(圖未示)於該N-AlInP層121上沉積一AuGe/Au疊層(圖未示)，並以黃光微影與蝕刻製程對該AuGe/Au疊層定義出一由複數AuGe/Au電極16所構成的陣列，該等AuGe/Au電極16是沿一列方向x與一橫向於該列方向x的行方向y彼此間隔排列，且該AuGe/Au電極16陣列最終對應至該傳統的被動式微發光二極體顯示器1之像素是64行×32列；在該步驟(d)中，更透過熱處理以使該等AuGe/Au電極16與該N-AlInP層121間形成歐姆接觸。
於完成該步驟(d)後，該步驟(e)是利用乾式蝕刻(dry etching)使該磊晶膜12高台絕緣(mesa isolation)；其中，乾式蝕刻是終止於該ITO層13並令該經乾蝕刻後的磊晶膜12成為一由複 數微發光二極體晶粒(LED chips)120所構成的陣列。
參閱圖3，於完成該步驟(e)後，該步驟(f)是蝕刻該ITO層13成為複數行線路(column line)131。在如圖3所示之該步驟(f)中，只有最外側的兩行線路131上是未設置有微發光二極體晶粒120，且位在最外側之該兩行線路131內的剩餘行線路131上是設置有微發光二極體晶粒120，並於該剩餘行線路131的一側132上是未設置有微發光二極體晶粒120。
再參閱圖3，該步驟(g)是配合電子束蒸鍍法、黃光微影與蝕刻製程於最外側之該兩行線路131上分別沉積一第一增厚金屬層171，並於各剩餘行線路131的該側132上沉積一第二增厚金屬層172；其中，各第二增厚金屬層172是用來作為內連接(interconnection)至該行方向y上之各微發光二極體晶粒120的P電極使用，同時也是用來作為控制該被動式微發光二極體顯示器1之一行方向定址電極(address electrodes)使用。
參閱圖4，該步驟(h)是於該黏著劑層14上覆蓋一高分子材料18以裸露出該等第一增厚金屬層171、該等第二增厚金屬層172與各AuGe/Au電極16，其目的在於令該被動式微發光二極體顯示器1平坦化。
再參閱圖4，該步驟(i)是配合電子束蒸鍍法、黃光微影與蝕刻製程沿該行方向x於各自所對應之各第一增厚電極層171上 與AuGe/Au電極16上沉積一N金屬線路19，從而製得該被動式微發光二極體顯示器1；在圖4所示之該步驟(i)中，各N金屬線路19是用來作為內連接至該列方向x上之各微發光二極體晶粒120的N電極使用，同時也是用來作為控制該傳統的被動式微發光二極體顯示器1之一列方向定址電極使用。
雖然該前案所揭露之傳統的被動式微發光二極體顯示器1製作成本低，不像使用薄膜電晶體(TFT)來控制顯示器的主動式微發光二極體顯示器來得耗費成本與複雜。然而，基於各第二增厚金屬層172是用來作為內連接至該行方向y上之各微發光二極體晶粒120的P電極與控制該傳統的被動式微發光二極體顯示器1之行方向定址電極使用，且各N金屬線路19是用來作為內連接至該列方向x上之各微發光二極體晶粒120的N電極與控制該傳統的被動式微發光二極體顯示器1之列方向定址電極使用；因此，對應至各N金屬線路19下方之最外側的該兩行線路131與對應至各第二增厚金屬層172下方之各剩餘行線路131的該側132，則是用來作為電性連接至一外部驅動晶片(圖未示)的一外部線路使用。
然而，此處須說明的是，該傳統的被動式微發光二極體顯示器1為了使得各微發光二極體晶粒120能電性連接至該外部驅動晶片，其必須犧牲掉該藍寶石基板15上之該最外側的該兩行線路131與各剩餘行線路131的該側132的空間以作為外部電路使用。換 句話說，不論是製得該傳統的被動式微發光二極體顯示器1前的該GaAs基板11面積，甚或是最終製得該傳統的被動式微發光二極體顯示器1的該藍寶石基板15面積，都無法有效地被利用。
再者，該傳統的被動式微發光二極體顯示器1雖然可以透過該等第一增厚金屬層171與該等第二增厚金屬層172來初步補償串聯電阻所致的問題；然而，其補償的效果相當有限。因此，由圖5所示[配合參閱圖4之步驟(i)]可知，該傳統的被動式微發光二極體顯示器1之位在第3列上的該等微發光二極體晶粒120之輸出功率約4.5mW至3.8mW；位在第15列上之該等微發光二極體晶粒120因相對位在第3列上之該等微發光二體晶粒120遠離各第二增厚金屬層172，以致於其串聯電阻相對大於位在第3列上之該等微發光二極體晶粒120因而輸出功率下降至4.0mW至3.5mW；且位在第31列上之該等微發光二極體晶粒120之輸出功率更下降至3.8mW至3.15mW。因此，該等微發光二極體晶粒120在該行方向y上的亮度是自鄰近各該等第二增厚金屬層172背向該行方向y逐漸遞減，亮度不均勻。
進一步由圖6所示[配合參閱圖4之步驟(i)]可知，該傳統的被動式微發光二極體顯示器1之位在第3、33、61行上所對應之該等微發光二極體晶粒120的三條輸出功率曲線雖然趨近重疊；然而，前述三條輸出功率曲線卻是自第1列像素朝第15列像速遞減， 亮度難以均勻化。
經上述說明可知，改良被動式微發光二極體陣列裝置的結構以有效地利用基板面積同時並改善亮度均勻性，是所屬技術領域中的相關技術人員有待突破的課題，是本發明之技術領域中的技術人員當前所應克服的課題。
因此，本發明的目的，即在提供一種能有效利用基板面積同時改善亮度均勻性的亮度均勻之被動式微發光二極體陣列裝置。
於是，本發明亮度均勻之被動式微發光二極體陣列裝置，其包括一微發光二極體陣列，及一外部線路組件。
該微發光二極體陣列包括一具有一陣列設置面的基板、複數沿一第一方向彼此間隔地佈滿該陣列設置面的微發光陣列，及一覆蓋該陣列設置面與該等微發光陣列的陣列用絕緣層。各微發光陣列具有一沿一實質橫向於該第一方向之第二方向延伸以形成於該陣列設置面上的第一層、複數沿該第二方向彼此間隔地形成於其第一層上的發光層、複數分別形成於各自所對應之發光層上的第二層、複數分別設置於各自所對應之第二層上的第一內電極層，及一沿該第二方向延伸地設置於該第一層上的第二內電極層。各微發光陣列之第二內電極層具有一間隔地圍繞各自所對應之發光層的基 部，及一自其基部背向該陣列設置面凸伸而出的凸部。該陣列用絕緣層裸露出各微發光陣列之第二內電極層的凸部與各第一內電極層。
該外部線路組件包括一間隔地面向該微發光二極體陣列之陣列設置面設置並具有一線路設置面的載板、複數第一外部線路、複數第二外部線路、一線路用絕緣層，及一電性鍵合單元。該等第一外部線路沿該第一方向彼此間隔設置於該載板的線路設置面，並沿該第二方向延伸。該等第二外部線路沿該第二方向彼此間隔排列於該載板，並沿該第一方向延伸。該線路用絕緣層覆蓋該線路設置面，以令該等第一外部線路與該等第二外部線路彼此電性隔絕，並裸露出該等第一外部線路及該等第二外部線路。該電性鍵合單元設置於經裸露於該線路用絕緣層外的該等第一外部線路及該等第二外部線路上，以電性鍵合於各微發光陣列之第二內電極層的凸部與各第一內電極層。
本發明的功效在於：利用該基板之陣列設置面佈滿該等微發光陣列並配合該外部線路組件能有效地利用該基板之陣列設置面的面積，且各微發光陣列之第二內電極層之基部是圍繞各自所對應之發光層，其是自各第一層增厚至各自所對應之發光層處，有利於補償串聯電阻以提升亮度均勻性。
2:微發光二極體陣列
21:基板
211:陣列設置面
22:微發光陣列
221:第一層
222:發光層
223:第二層
224:第一內電極層
225:第二內電極層
2251:基部
2252:凸部
2253:端緣
23:陣列用絕緣層
3:外部線路組件
30:載板
3011:第一側緣
3012:第二側緣
3013:第三側緣
31:第一外部線路
311:延伸段
312:連接段
32:第二外部線路
33:線路用絕緣層
34:電性鍵合單元
341:異向性導電膠層
342:錫球
343:增厚焊條
9:印刷電路板
Y:第一(行)方向
X:第二(列)方向
301:線路設置面
本發明的其他的特徵及功效，將於參照圖式的實施方式中清楚地呈現，其中：圖1是一正視示意流程圖，說明一種傳統的被動式微發光二極體顯示器之製法的一步驟(a)、一步驟(b)與一步驟(c)；圖2是一立體流程圖，說明延續圖1之製法的一步驟(d)與一步驟(e)；圖3是一立體流程圖，說明延續圖2之製法的一步驟(f)與一步驟(g)；圖4是一立體流程圖，說明延續圖3之製法的一步驟(h)與一步驟(i)；圖5是一輸出功率對行像素數目曲線圖，說明該傳統的被動式微發光二極體顯示器之亮度均勻性；圖6是一輸出功率對列像素數目曲線圖，說明該傳統的被動式微發光二極體顯示器之亮度均勻性；圖7是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第一實施例的一微發光二極體陣列；圖8是圖7的一正視示意圖；圖9是一立體圖，說明本發明該第一實施例的一外部線路組件；圖10是圖9的一正視示意圖； 圖11是一正視示意圖，說明本發明該第一實施例之亮度均勻之被動式微發光二極體陣列裝置；圖12是一輸出功率對行像素數目曲線圖，說明本發明該第一實施例之亮度均勻性；圖13是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第二實施例的外部線路組件；圖14是圖13的一正視示意圖；圖15是一正視示意圖，說明本發明該第二實施例之亮度均勻之被動式微發光二極體陣列裝置；圖16是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第三實施例的外部線路組件；圖17是圖16的一正視示意圖；圖18是一正視示意圖，說明本發明該第三實施例之亮度均勻之被動式微發光二極體陣列裝置；圖19是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第四實施例的微發光二極體陣列；圖20是圖19的一正視示意圖；圖21是一立體圖，說明本發明該第四實施例的外部線路組件；圖22是圖21的一正視示意圖；圖23是一正視示意圖，說明本發明該第四實施例之亮度均勻之 被動式微發光二極體陣列裝置；圖24是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第五實施例的外部線路組件；圖25是圖24的一正視示意圖；圖26是一正視示意圖，說明本發明該第五實施例之亮度均勻之被動式微發光二極體陣列裝置；圖27是一立體圖，說明本發明亮度均勻之被動式微發光二極體陣列裝置之一第六實施例的外部線路組件；圖28是圖27的一正視示意圖；及圖29是一正視示意圖，說明本發明該第六實施例之亮度均勻之被動式微發光二極體陣列裝置。
在本發明被詳細描述前，應當注意在以下的說明內容中，類似的元件是以相同的編號來表示。
參閱圖7至圖11，本發明亮度均勻之被動式微發光二極體陣列裝置的一第一實施例，是用以電性鍵合於一接合有一驅動晶片(圖未示)的印刷電路板(如，軟性印刷電路板)9，其包括一微發光二極體陣列2及一外部線路組件3。
如圖7與圖8所示，本發明該第一實施例之微發光二極體 陣列2實質上是由一具有一陣列設置面211的基板21、複數微發光陣列22與一陣列用絕緣層23所構成；其中，該基板21是一雙面拋光藍寶石基板。
該等微發光陣列22沿一第一方向(行方向)Y彼此間隔地佈滿該陣列設置面211，且各微發光陣列22具有一沿一實質橫向於該第一方向之第二方向(列方向)X延伸以磊晶製造於該陣列設置面211上的第一層221、複數沿該第二方向(列方向)X彼此間隔地磊晶製造於其第一層221上的發光層222、複數分別磊晶製造於各自所對應之發光層222上的第二層223、複數分別設置於各自所對應之第二層222上的第一內電極層224，及一沿該第二方向(列方向)X延伸地設置於該第一層221上的第二內電極層225。各微發光陣列22之第二內電極層225具有一間隔地圍繞各自所對應之發光層222的基部2251，及一自其基部2251背向該陣列設置面211凸伸而出的凸部2252。該陣列用絕緣層23覆蓋該陣列設置面211與該等微發光陣列22並裸露出各微發光陣列22之第二內電極層225的凸部2252與各第一內電極層224。
在本發明該第一實施例中，各第一層221與各第二層223分別是如圖所示，為n-GaN與p-GaN，且各第一內電極層224與各第二內電極層225分別是ITO與第一金屬(如，Au、Ag、Al、Ag、Cu或Ti)，而該陣列用絕緣層23則是選自SU-8光阻、氧化矽或氧 化鋁；此外，該微發光陣列22的數量是32個(即，32列微發光陣列22)，各微發光陣列22之第一層221上所磊晶製造的發光層222與第二層223的數量有64個，且各微發光陣列22之第一層221、發光層222與第二層223共同構成64個微發光二極體晶粒。換句話說，本發明該第一實施例具有32×64個微發光二極體晶粒，像素是32列×64行。此處需補充說明的是，本發明各第二內電極層225之圍繞各自所對應之發光層222的基部2251是如圖8所示，自各第一層221朝上增厚至各自所對應之發光層22處，其可補償該第一實施例之各像素的串聯電阻問題。
如圖9與圖10所示，該外部線路組件3是用以鍵合至印刷電路板9，並包括一間隔地面向該微發光二極體陣列2之陣列設置面211設置且具有一線路設置面301的載板30、複數第一外部線路31、複數第二外部線路32、一線路用絕緣層33，及一電性鍵合單元34。
該等第一外部線路31沿該第一方向(行方向)Y彼此間隔設置於該載板30的線路設置面301，並沿第二方向(列方向)X延伸。該等第二外部線路32沿該第二方向(列方向)X彼此間隔排列於該載板30，並沿該第一方向(行方向)Y延伸。該線路用絕緣層33覆蓋該線路設置面301，以令該等第一外部線路31與該等第二外部線路32彼此電性隔絕，並裸露出該等第一外部線路31及該等第二外 部線路32。該電性鍵合單元34設置於經裸露於該線路用絕緣層33外的該等第一外部線路31及該等第二外部線路32上，以電性鍵合於各微發光陣列22之第二內電極層225的凸部2252與各第一內電極層224。
詳細地來說，本發明該第一實施例之各微發光陣列22之第二內電極層225的凸部2252是自其基部2251的一端緣2253處背向該陣列設置面211凸伸至實質等高於該等第一內電極層224；該外部線路組件3之各第二外部線路32是自該線路設置面301之一第一側緣3011沿該第一方向(行方向)Y延伸至該線路設置面301的一第二側緣3012；該外部線路組件3之各第一外部線路31是自該線路設置面301之一第三側緣3013沿該第二方向(列方向)X延伸以未接觸至該等第二外部線路32。在本發明該第一實施例中，該載板30是一玻璃基板，該線路用絕緣層33則是選自SU-8光阻、氧化矽或氧化鋁，該等第一外部線路31與該等第二外部線路32是使用如前所述的第一金屬。換句話說，本發明該第一實施例之外部線路組件3是一單層金屬線路載板。
適用於本發明該第一實施例之電性鍵合單元34是選自一異向性導電膠(ACF)層341、一球柵陣列(BGA)、複數焊塊(bump)或複數增厚焊條(stripe)343。
在本發明該第一實施例中，該外部線路組件3之電性鍵合 單元34是該異向性導電膠層341。該異向性導電膠層341覆蓋且接觸經裸露於該線路用絕緣層33外的該等第一外部線路31及該等第二外部線路32，並裸露出位於該線路設置面301之第一側緣3011處的該等第二外部線路32，且裸露出位於該線路設置面301之第三側緣3013處的該等第一外部線路31，其目的是用以對外鍵合於印刷電路板9，以令鍵合有該微發光二極體陣列2之該等微發光陣列22能透過接合於印刷電路板9的驅動晶片(圖未示)來控制該外部線路組件3中的各第一外部線路31與各第二外部線路32，令各第一外部線路31與各第二外部線路32得以驅動各微發光二極體晶粒。
此處需進一步補充說明的是，本發明該第一實施例之外部線路組件3在鍵合至該微發光二極體陣列2後，更可進一步在該微發光二極體陣列2之陣列用絕緣層23之一周緣與該外部線路組件3之線路用絕緣層33之一周緣覆蓋一封膠(圖未示)，以藉此透過該外部線路組件3之載板30與該封膠達到雙重保護從而提升元件可靠度。
參閱圖12，由本發明該第一實施例之輸出光率對行像素數目曲線圖所示可知，位在第1、16、32列上之各微發光二極體晶粒的輸出功率曲線不僅趨近重疊，其自第1行至的64行像數之輸出功率的變化也趨近平坦，證實本發明該第一實施例可藉由各第二電極層225之圍繞各自所對應之發光層222的基部2251來補償各微發 光二極體晶粒的串聯電阻問題。
此外，比較前案之圖4與本案之圖7與圖8可知，前案的藍寶石基本15必須犧牲掉對應至最外側之該兩行線路131處的面積與對應至剩餘行線路131之該側132處的面積來做為外部線路，導致藍寶石基本15對應至最外側之該兩行線路131處的面積與對應至剩餘行線路131之該側132處的面積未能設置微發光二極體晶粒120，無法有效被利用。反觀本案該第一實施例(見圖7與圖8)，雖然該基板21仍留有各微發光陣列22之第二內電極225之凸部2252的空間；然而，相較於前案的圖4，本案基板21僅單側供設置各微發光陣列22之第二內電極225之凸部2252，前案則是犧牲掉最外兩側處，且本案也無須如同前案般犧牲掉剩餘行線路131之該側132處的空間。因此，就相同尺寸的微發光二極體晶粒來論，本發明該第一實施例將第一、二外部線路31、32設置在該載板30上，能相對該前案更有效地利用基板2之陣列設置面211上的空間。
參閱圖13、圖14與圖15，本發明亮度均勻之被動式微發光二極體陣列裝置之一第二實施例大致上是相同於該第一實施例，其不同處是在於，本發明該第二實施例之外部線路組件3之電性鍵合單元34是該球柵陣列(BGA)，該球柵陣列(BGA)是由複數錫球342所構成，各錫球342可以是Sn-Au合金或Sn-Ag-Cu合金，一部分的錫球342是沿該第二方向(列方向)X彼此間隔地接觸各自 所對應之各第二外部線路32，剩餘的錫球342是分別接觸各第一外部線路31且遠離該載板30之線路設置面301的第三側緣3013。
在本發明該第二實施例中，該部分的各錫球342是對應鍵合各自所對應之第一內電極層224，且該剩餘的各錫球342是對應鍵合各自所對應之各微發光陣列22之第二內電極層225的凸部2252。
參閱圖16、圖17與圖18，本發明亮度均勻之被動式微發光二極體陣列裝置之一第三實施例大致上是相同於該第一實施例，其不同處是在於，本發明該第三實施例之外部線路組件3之電性鍵合單元34是該等增厚焊條343，各增厚焊條343是分別對應接觸各自所對應之各第一外部線路31與各第二外部線路32。在本發明該第三實施例中，該等增厚焊條34是對應鍵合各第一內電極層224與各第二內電極層225的凸部2252。
參閱圖19至圖23，本發明亮度均勻之被動式微發光二極體陣列裝置之一第四實施例大致上是相同於該第一實施例，其不同處是在於，本發明該第四實施例之各微發光陣列22(如圖19與圖20所示)之第二內電極層225的凸部2252是自其基部2251之間隔圍繞各發光層222處背向該陣列設置面211凸伸至實質等高於該等第一內電極層224。換句話說，本發明該第四實施例之各第二內電極層225是如圖20所示般，自各自所對應之第一層211圍繞各自所對應 之各發光層222朝上增厚至各自所對應之第一內電極層224處，其更可補償該第四實施例之各像素(各微發光二極體晶粒)的串聯電阻問題。
再參閱圖21與圖22，該外部線路組件3之各第一外部線路31具有一設置於該載板30之線路設置面301的延伸段311，及複數沿該第二方向(列方向)X彼此間隔地自其延伸段311凸伸出該線路用絕緣層33外的內連接段312；該外部線路組件3之各第二外部線路32設置於該線路用絕緣層33上。換句話說，本發明該第四實施例之外部線路組件3是一雙層金屬線路載板。基於本發明該第四實施例之外部線路組件3是雙層金屬線路載板，以致於相鄰第一外部線路31間距與相鄰第二外部線路32間距可以相對小於該第一、二、三實施例之單層金屬線路載板之第一、二外部線路31、32之兩相鄰間距；因此，本發明該第四實施例之外部線路組件3可對各微發光陣列22之微發光二極體晶粒補償的串聯電阻更高，因而該第四實施例之亮度均勻性相對優於該第一、二、三實施例。
適用於本發明該第四實施例之外部線路組件3之電性鍵合單元34是選自一由下列所構成之群組的電導性元件：該異向性導電膠(ACF)層341、該球柵陣列(BGA)、該等焊塊、該等增厚焊條343，與該球柵陣列(BGA)及該等增厚焊條343的一組合。
在本發明該第四實施例中，該外部線路組件3之電性鍵合 單元34是該異向性導電膠(ACF)層341，該異向性導電膠(ACF)層341與各第一外部線路31之內連接段312接觸，並與各第二外部線路32接觸。
參閱圖24、圖25與圖26，本發明亮度均勻之被動式微發光二極體陣列裝置之一第五實施例大致上是相同於該第四實施例，其不同處是在於，本發明該第五實施例之該外部線路組件3的電性鍵合單元34是該球柵陣列(BGA)，該球柵陣列(BGA)是由該等錫球342所構成。如圖24所示，一部分的錫球342是沿該第一方向(行方向)Y彼此間隔地接觸各自所對應之各第二外部線路32，剩餘的錫球342是分別接觸各第一外部線路31之內連接段312。
參閱圖27、圖28與圖29，本發明亮度均勻之被動式微發光二極體陣列裝置之一第六實施例大致上是相同於該第五實施例，其不同處是在於，本發明該第六實施例之外部線路組件3的電性鍵合單元34是該球柵陣列(BGA)及該等增厚焊條343的一組合。該等錫球342是分別沿該第二方向(列方向)X彼此間隔地接觸各第一外部線路31之內連接段312，各增厚焊條343是對應接觸各第二外部線路32。雖然本發明該第六實施例之電性鍵合單元34是該球柵陣列(BGA)及該等增厚焊條343的組合，但誠如前開所述，適用於本發明之電性鍵合單元34亦可以選自焊塊；因此，本發明該第六實施例之電性鍵合單元34之該球柵陣列(BGA)及該等增厚焊 條343之組合中的各錫球342，亦可以採用焊塊來取代。
整合該等實施例之詳細說明，以相同微發光二極體晶粒尺寸進一步就有效利用該基板21之陣列設置面211的面積來比較圖7、圖8與圖19、圖20。本發明該第四、五、六實施例相較於該第一、二、三實施例，更無須如同該第一、二、三實施例般，尚須犧牲掉該基板21之陣列設置面211的各第二內電極層225之基部2251的該端緣2253(見圖7與圖8)處，來對應配置各第二內電極層225的凸部2252。因此，本發明該第四、五、六實施例之各微發光陣列22能相對第一、二、三實施例增設1顆微發光二極體晶粒(見圖19與圖20)。換句話說，本發明該第四、五、六實施例之微發光二極體晶粒的總量能相對第一、二、三實施例增加32顆(即，1×32顆)，更能有效地利用該基板21之陣列設置面211的面積。
綜上所述，本發明亮度均勻之被動式微發光二極體陣列裝置，利用該基板21之陣列設置面211佈滿該等微發光陣列22並配合該外部線路組件3能有效地利用該基板21之陣列設置面211的面積，且各微發光陣列22之第二內電極層225至少自各第一層221處增厚至各自所對應之發光層222處，有利於補償串聯電阻以提升亮度均勻性；此外，雙層金屬線路載板縮減了第一、二外部線路31、32之相鄰間距，更有利於補償串聯電阻以提升亮度均勻性，而該外部線路組件3之載板30對本發明之裝置的保護亦有利於提升裝置的 可靠度，故確實能達成本發明的目的。
惟以上所述者，僅為本發明的實施例而已，當不能以此限定本發明實施的範圍，凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾，皆仍屬本發明專利涵蓋的範圍內。
2:微發光二極體陣列
21:基板
211:陣列設置面
22:微發光陣列
224:第一內電極層
225:第二內電極層
2251:基部
30:載板
301:線路設置面
31:第一外部線路
32:第二外部線路
33:線路用絕緣層
34:電性鍵合單元
341:異向性導電膠層
2252:凸部
3:外部線路組件
9:印刷電路板
X:第二方向(列方向)

Claims (11)

  1. 一種亮度均勻之被動式微發光二極體陣列裝置，包含：一微發光二極體陣列，包括：一基板，具有一陣列設置面，複數微發光陣列，沿一第一方向彼此間隔地佈滿該陣列設置面，各微發光陣列具有一沿一實質橫向於該第一方向之第二方向延伸以形成於該陣列設置面上的第一層、複數沿該第二方向彼此間隔地形成於其第一層上的發光層、複數分別形成於各自所對應之發光層上的第二層、複數分別設置於各自所對應之第二層上的第一內電極層，及一沿該第二方向延伸地設置於該第一層上的第二內電極層，各微發光陣列之第二內電極層具有一間隔地圍繞各自所對應之發光層的基部，及一自其基部背向該陣列設置面凸伸而出的凸部，及一陣列用絕緣層，覆蓋該陣列設置面與該等微發光陣列以裸露出各微發光陣列之第二內電極層的凸部與各第一內電極層；及一外部線路組件，包括：一載板，間隔地面向該微發光二極體陣列之陣列設置面設置並具有一線路設置面，複數第一外部線路，沿該第一方向彼此間隔設置於該載板的線路設置面並沿該第二方向延伸，複數第二外部線路，沿該第二方向彼此間隔排列 於該載板並沿該第一方向延伸，一線路用絕緣層，覆蓋該線路設置面以令該等第一外部線路與該等第二外部線路彼此電性隔絕，並裸露出該等第一外部線路及該等第二外部線路，及一電性鍵合單元，設置於經裸露於該線路用絕緣層外的該等第一外部線路及該等第二外部線路上，以電性鍵合於各微發光陣列之第二內電極層的凸部與各第一內電極層。
  2. 如請求項1所述的亮度均勻之被動式微發光二極體陣列裝置，其中，各微發光陣列之第二內電極層的凸部是自其基部的一端緣處背向該陣列設置面凸伸至實質等高於該等第一內電極層。
  3. 如請求項2所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之各第二外部線路是自該線路設置面之一第一側緣沿該第一方向延伸至該線路設置面的一第二側緣；該外部線路組件之各第一外部線路是自該線路設置面之一第三側緣沿該第二方向延伸以未接觸至該等第二外部線路；該外部線路組件之電性鍵合單元是選自一異向性導電膠層、一球柵陣列、複數焊塊或複數增厚焊條。
  4. 如請求項3所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該異向性導電膠層，該異向性導電膠層覆蓋且接觸經裸露於該線路用絕緣層外的該等第一外部線路及該等第二外部線路，並裸 露出位於該線路設置面之第一側緣處的該等第二外部線路，且裸露出位於該線路設置面之第三側緣處的該等第一外部線路。
  5. 如請求項3所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該球柵陣列，該球柵陣列是由複數錫球所構成，一部分的錫球是沿該第二方向彼此間隔地接觸各自所對應之各第二外部線路，剩餘的錫球是分別接觸各第一外部線路且遠離該載板之線路設置面的第三側緣。
  6. 如請求項3所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該等增厚焊條，各增厚焊條是分別對應接觸各自所對應之各第一外部線路與各第二外部線路。
  7. 如請求項1所述的亮度均勻之被動式微發光二極體陣列裝置，其中，各微發光陣列之第二內電極層的凸部是自其基部之間隔圍繞各發光層處背向該陣列設置面凸伸至實質等高於該等第一內電極層。
  8. 如請求項7所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之各第一外部線路具有一設置於該載板之線路設置面的延伸段，及複數沿該第二方向彼此間隔地自其延伸段凸伸出該線路用絕緣層外的內連接段；該外部線路組件之各第二外部線路設置於該線路用絕緣層上；該外部線路組件之電性鍵合單元是選自一由下列所構成之群組的電導性元件：一異向性導電膠層、一球柵 陣列、複數焊塊、複數增厚焊條，與一球柵陣列及複數增厚焊條的一組合。
  9. 如請求項8所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該異向性導電膠層，該異向性導電膠層與各第一外部線路之內連接段接觸，並與各第二外部線路接觸。
  10. 如請求項8所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該球柵陣列，該球柵陣列是由複數錫球所構成，一部分的錫球是沿該第一方向彼此間隔地接觸各自所對應之各第二外部線路，剩餘的錫球是分別接觸各第一外部線路之內連接段。
  11. 如請求項8所述的亮度均勻之被動式微發光二極體陣列裝置，其中，該外部線路組件之電性鍵合單元是該球柵陣列及該等增厚焊條的一組合，該球柵陣列是由複數錫球所構成，該等錫球是分別沿該第二方向彼此間隔地接觸各第一外部線路之內連接段，各增厚焊條是對應接觸各第二外部線路。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI824887B (zh) * 2022-12-16 2023-12-01 友達光電股份有限公司 顯示面板

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI705562B (zh) * 2019-12-13 2020-09-21 國立中興大學 大面積被動式微發光二極體陣列顯示器
TWI784592B (zh) * 2021-06-21 2022-11-21 錼創顯示科技股份有限公司 微型發光二極體顯示裝置
CN113945232B (zh) * 2021-10-15 2022-04-22 广东绿展科技有限公司 电阻式传感器及其制备方法
TWI824880B (zh) * 2022-12-14 2023-12-01 友達光電股份有限公司 顯示裝置

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295280A (ja) * 1990-04-13 1991-12-26 Matsushita Electric Ind Co Ltd 発光素子およびその製造方法と発光素子を用いたｌｅｄアレイおよびそのｌｅｄアレイを用いたｌｅｄプリンタ
KR20110133244A (ko) * 2010-06-04 2011-12-12 이병문 엘이디 어레이 방법, 이에 사용되는 기판과 이를 사용한 엘이디 어레이 패키지
KR101167772B1 (ko) * 2010-02-12 2012-07-24 희성전자 주식회사 발광다이오드 어레이 및 그 제조방법
KR101448165B1 (ko) * 2013-11-27 2014-10-08 지엘비텍 주식회사 금속 본딩 회로 패턴을 독립적으로 구성하고，어레이가 형성되어 직병렬 연결 구조가 가능하게 한 ｃｏｂ 또는 ｃｏｍ 형태의 ｌｅｄ 모듈
TW201528576A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201528479A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201528498A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201530751A (zh) * 2013-12-25 2015-08-01 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201530743A (zh) * 2013-12-25 2015-08-01 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列
KR20180049807A (ko) * 2016-11-03 2018-05-11 포산 내션스타 옵토일렉트로닉스 코., 엘티디 Led 지지대, led 지지대 어레이, led 소자 및 led 스크린

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI254353B (en) * 2005-06-27 2006-05-01 Univ Nat Chunghsing Solid-state of micro-light-emitting-device array
US9548332B2 (en) * 2012-04-27 2017-01-17 Apple Inc. Method of forming a micro LED device with self-aligned metallization stack
TWI532225B (zh) * 2013-12-24 2016-05-01 Nat Univ Chung Hsing Multi - grain cladding module packaging method
US9484492B2 (en) * 2015-01-06 2016-11-01 Apple Inc. LED structures for reduced non-radiative sidewall recombination
US11605757B2 (en) * 2015-08-21 2023-03-14 Lg Electronics Inc. Display device using semiconductor light emitting diode
KR20180079078A (ko) * 2016-12-30 2018-07-10 엘지디스플레이 주식회사 발광 다이오드 표시 장치 및 이를 이용한 멀티 스크린 표시 장치
CN106876552B (zh) * 2017-02-27 2019-07-26 深圳市华星光电技术有限公司 微发光二极管阵列基板及显示面板
CN107068811B (zh) * 2017-03-15 2019-06-18 京东方科技集团股份有限公司 发光二极管装置的制作方法以及发光二极管装置
CN108695304A (zh) * 2017-03-31 2018-10-23 亿光电子工业股份有限公司 发光装置及其制造方法
TWI650852B (zh) * 2018-03-07 2019-02-11 趨勢照明股份有限公司 主動式驅動發光二極體陣列的製造方法
CN108933153B (zh) * 2018-07-27 2021-02-02 上海天马微电子有限公司 显示面板及其制作方法、显示装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295280A (ja) * 1990-04-13 1991-12-26 Matsushita Electric Ind Co Ltd 発光素子およびその製造方法と発光素子を用いたｌｅｄアレイおよびそのｌｅｄアレイを用いたｌｅｄプリンタ
KR101167772B1 (ko) * 2010-02-12 2012-07-24 희성전자 주식회사 발광다이오드 어레이 및 그 제조방법
KR20110133244A (ko) * 2010-06-04 2011-12-12 이병문 엘이디 어레이 방법, 이에 사용되는 기판과 이를 사용한 엘이디 어레이 패키지
KR101448165B1 (ko) * 2013-11-27 2014-10-08 지엘비텍 주식회사 금속 본딩 회로 패턴을 독립적으로 구성하고，어레이가 형성되어 직병렬 연결 구조가 가능하게 한 ｃｏｂ 또는 ｃｏｍ 형태의 ｌｅｄ 모듈
TW201528576A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201528479A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201528498A (zh) * 2013-12-25 2015-07-16 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201530751A (zh) * 2013-12-25 2015-08-01 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列的製備方法
TW201530743A (zh) * 2013-12-25 2015-08-01 Hon Hai Prec Ind Co Ltd 有機發光二極體陣列
KR20180049807A (ko) * 2016-11-03 2018-05-11 포산 내션스타 옵토일렉트로닉스 코., 엘티디 Led 지지대, led 지지대 어레이, led 소자 및 led 스크린

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI824887B (zh) * 2022-12-16 2023-12-01 友達光電股份有限公司 顯示面板

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