CN111970857B - Method for improving poor plugging of PCB resin - Google Patents
Method for improving poor plugging of PCB resin Download PDFInfo
- Publication number
- CN111970857B CN111970857B CN202010675484.5A CN202010675484A CN111970857B CN 111970857 B CN111970857 B CN 111970857B CN 202010675484 A CN202010675484 A CN 202010675484A CN 111970857 B CN111970857 B CN 111970857B
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- 239000011347 resin Substances 0.000 title claims abstract description 45
- 229920005989 resin Polymers 0.000 title claims abstract description 45
- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 claims abstract description 49
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910052802 copper Inorganic materials 0.000 claims abstract description 42
- 239000010949 copper Substances 0.000 claims abstract description 42
- 238000007747 plating Methods 0.000 claims abstract description 29
- 238000007788 roughening Methods 0.000 claims abstract description 22
- 238000000151 deposition Methods 0.000 claims abstract description 13
- 238000005553 drilling Methods 0.000 claims abstract description 12
- 238000009713 electroplating Methods 0.000 claims abstract description 12
- 230000008021 deposition Effects 0.000 claims abstract description 11
- 230000008719 thickening Effects 0.000 claims abstract description 5
- 238000005530 etching Methods 0.000 claims description 16
- 238000005507 spraying Methods 0.000 claims description 16
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 12
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 8
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 8
- 238000000227 grinding Methods 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 239000011889 copper foil Substances 0.000 claims description 6
- 230000002378 acidificating effect Effects 0.000 claims description 5
- 238000004381 surface treatment Methods 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 abstract description 11
- 239000003814 drug Substances 0.000 abstract description 4
- 239000007788 liquid Substances 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 45
- 238000004806 packaging method and process Methods 0.000 description 8
- 230000007547 defect Effects 0.000 description 6
- 238000012360 testing method Methods 0.000 description 6
- 230000002950 deficient Effects 0.000 description 5
- 230000005611 electricity Effects 0.000 description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000003487 electrochemical reaction Methods 0.000 description 2
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 238000003908 quality control method Methods 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 150000007524 organic acids Chemical class 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
- H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention discloses a method for improving poor plugging of PCB resin, which comprises the following steps: drilling holes on a production plate, and metallizing the holes through copper deposition and full plate electroplating in sequence; then the production plate is subjected to super roughening treatment; making a plating hole pattern on a production plate, and then thickening the thickness of a copper layer in the hole by electroplating; removing the plating hole pattern on the production plate through film stripping treatment; then microetching the production plate; the resin is then filled in the metallized holes and cured. The method adds a microetching flow after film stripping, and removes the chemical super-roughened film by utilizing microetching liquid medicine, thereby avoiding the problem of poor resin plug hole.
Description
Technical Field
The invention relates to the technical field of printed circuit board manufacturing, in particular to a method for improving poor plugging of PCB resin.
Background
In recent years, with the development of miniaturization of assembled components, the wiring density of a printed circuit board is continuously improved, the planar density of the aperture, the line width and the line distance which are originally continuously reduced tends to be a bottleneck, and the increase of the three-dimensional density becomes a new breakthrough point. On the basis, many customers design via holes or blind buried holes in the connecting disc, and the structure is called a disc inner hole, and the structure is accompanied by the design of resin plug holes in the disc inner hole, namely, the via holes are plugged by resin, and after solidification, excessive resin in the holes is removed by grinding and leveling by using an abrasive belt, and then copper deposition, board electricity deposition and circuit pattern manufacturing are carried out on the surfaces of the plug holes.
The copper electroplating speed of the PCB surface is obviously faster than that of the hole copper electroplating under the influence of the deep plating capacity of the electroplating process, the hole copper is plated to the required thickness by adopting the hole plating process before resin hole plugging in order to avoid the defect of the hole copper, namely, after the PCB is subjected to copper deposition and plate electricity, the whole plate surface is covered by a dry film, the plated hole is exposed by using the exposure and development of a plated hole film, the plated hole is thickened to a certain thickness independently, and finally, the film is removed and the resin hole is plugged; the main process flow of the resin in the inner hole of the disc comprises the following steps: pre-working procedure, drilling, copper deposition, plating electricity, chemical super-roughening, plating hole pattern, plating hole copper, film stripping (usually using alkaline liquid medicine), resin hole plugging, abrasive belt plate grinding, copper deposition, plating electricity and post-working procedure.
Before plating the hole pattern, firstly roughening the surface by using chemical super-roughening treatment to increase the binding force with the dry film, wherein the chemical super-roughening nature is that organic acid and copper surface form a uniform and fine organic metal roughened surface, the super-roughening film on the surface of the plate is difficult to clean during film stripping, and when resin plug holes are formed after film stripping, the residual super-roughening film and ink have high affinity, so that the ink of the hole holes is easily absorbed, the bad plug holes and the incomplete plug holes are caused, the subsequent copper deposition and plate electricity are influenced, and finally the resin plug holes are not upwards raised.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a method for improving the poor hole plugging of the PCB resin, which is characterized in that a microetching flow is added after film stripping, and a chemical super-roughening film is removed by microetching liquid medicine, so that the problem of poor hole plugging of the resin is avoided.
In order to solve the technical problems, the invention provides a method for improving poor hole plugging of PCB resin, which comprises the following steps:
S1, drilling holes on a production plate, and metallizing the holes through copper deposition and full plate electroplating in sequence;
s2, performing super-roughening treatment on the production plate;
s3, manufacturing a plating hole pattern on the production plate, and thickening the thickness of the copper layer in the hole by electroplating;
s4, removing the plating hole pattern on the production plate through film stripping treatment;
S5, carrying out microetching treatment on the production plate;
S6, filling resin in the metallized holes and curing.
Further, in step S2, super-roughening treatment is performed on the production plate by spraying.
In step S2, the spraying pressure is 1.0-1.5 kg/cm 2, and the microetching amount during super-roughening treatment is 0.4-1.0 μm.
Further, in step S3, a film is first attached to the production board, and then a plating hole pattern is formed by exposure and development in sequence, and the plating hole pattern is windowed only at the hole position corresponding to the hole position where the resin is required to plug.
In step S4, the film is removed by using sodium hydroxide with a concentration of 4.0.+ -. 2.0%.
Further, in step S5, the production plate is subjected to microetching treatment by spraying, the spraying pressure is 1.5+ -0.5 kg/cm 2, and the microetching amount during the microetching treatment is 0.9+ -0.3 μm.
Further, in step S5, microetching treatment is performed at 34+ -2deg.C using an acidic etching solution.
Further, in step S5, the acidic etching solution comprises hydrogen peroxide with a concentration of 25+ -10 g/L, sulfuric acid with a concentration of 80+ -20 g/L and CU 2+ with a concentration of 0-50 g/L.
Further, the step S6 further includes the following steps:
s7, the production board sequentially passes through the steps of grinding the board, manufacturing an outer layer circuit, manufacturing a solder mask layer, surface treatment and forming to obtain the circuit board.
Furthermore, the production board is a core board or a multilayer board formed by laminating an inner core board and an outer copper foil into a whole by prepregs.
Compared with the prior art, the invention has the following beneficial effects:
According to the invention, through optimizing the process production flow and adding a microetching flow after film stripping, the chemical super-roughening film remained after film stripping is removed by utilizing microetching liquid medicine, so that poor resin hole plugging is avoided, full hole plugging is ensured, and the quality defects of poor resin hole plugging, poor electroplating cap and the like caused by adsorption of the hole opening resin by the residual chemical super-roughening film in the prior art are overcome; and by strictly controlling the method and parameters during microetching treatment, the etching amount of the copper layer on the plate surface and in the holes can be reduced while the residual super-roughened film is effectively removed, and the problem of excessively thin copper layer is avoided.
Detailed Description
In order to more fully understand the technical content of the present invention, the technical solution of the present invention will be further described and illustrated with reference to specific embodiments.
Example 1
The embodiment provides a manufacturing method of a circuit board, which comprises the following specific processes:
(1) And (3) cutting: and (3) cutting a core board according to the jointed board dimension of 520mm multiplied by 620mm, wherein the thickness of the core board is 0.5mm, and the thickness of the outer copper foil is 0.5OZ.
(2) Inner layer circuit fabrication (negative film process): transferring the inner layer pattern, coating a photosensitive film on a core plate by using a vertical coating machine, controlling the film thickness of the photosensitive film to be 8 mu m, adopting a full-automatic exposure machine, completing inner layer line exposure on the core plate by using a 5-6 grid exposure rule (a 21 grid exposure rule), and developing to form an inner layer line pattern on the core plate; etching the inner layer, namely etching the core plate after exposure and development into an inner layer circuit, wherein the line width of the inner layer is measured to be 3mil; and (3) inner-layer AOI, and then checking defects such as open and short circuit, line notch, line pinhole and the like of the inner-layer line, carrying out defective scrapping treatment, and outputting a defect-free product to the next flow.
(3) Pressing: and (3) the browning speed is based on the thick browning of the bottom copper, and after the outer copper foil, the prepreg, the inner core board, the prepreg and the outer copper foil are sequentially overlapped, appropriate lamination conditions are selected for lamination according to the characteristics of the plate material, so that the production plate is formed.
(4) And drilling the outer layer, namely drilling holes on the production plate by using a mechanical drilling mode according to drilling data, wherein the drilled holes comprise plug holes which need to be filled with resin.
(5) Depositing copper by chemical reaction to form a layer of thin copper layer on the hole wall, metallizing the hole on the production plate, and testing the hole in a backlight for 10 grades, wherein the thickness of the deposited copper layer in the hole is 0.5 mu m.
(6) Full plate plating: according to the principle of electrochemical reaction, a layer of copper is electroplated on the basis of copper deposition.
(7) Super-roughening: super-roughening treatment is carried out on the production plate in a spraying mode, so that the binding force between the later-stage film and the plate surface is improved; the spraying pressure is 1.0-1.5 kg/cm 2, and the microetching amount during super roughening treatment is 0.4-1.0 μm.
(8) Plating hole patterns: and pasting a dry film on the production board, and windowing at the position corresponding to the plug hole by exposure and development to form a plating hole pattern.
(9) Plating holes: and then thickening the hole wall copper layer in the plug hole to the thickness required by design through electroplating.
(10) Film stripping: and (3) carrying out film stripping treatment on the production plate by adopting sodium hydroxide with the concentration of 4.0+/-2.0%.
(11) Microetching: carrying out microetching treatment on the production plate by adopting an acid etching solution at 34+/-2 ℃ in a spraying mode, wherein the spraying pressure is 1.5+/-0.5 kg/cm 2, and the microetching amount during microetching treatment is 0.9+/-0.3 mu m; wherein the acidic etching solution comprises hydrogen peroxide with the concentration of 25+/-10 g/L, sulfuric acid with the concentration of 80+/-20 g/L and CU 2+ with the concentration of 0-50 g/L.
(12) Resin plug hole: and then, resin ink is adopted to carry out resin hole plugging treatment on the holes on the production plate.
(13) And (3) baking: finally, baking the production plate to solidify the resin ink, wherein the baking temperature is 150 ℃ and the baking time is 30min; and then removing the resin ink protruding on the plate surface through a ceramic grinding plate, and grinding the plate surface with resin cleanly and flattening the plate surface.
(14) Outer layer circuit (positive process) is manufactured: transferring the outer layer pattern, completing outer layer line exposure by using a full-automatic exposure machine and a positive line film and using a 5-7-grid exposure rule (a 21-grid exposure rule), and developing to form an outer layer line pattern on a production board; plating the outer layer pattern, plating copper and tin on the production board respectively, wherein the copper plating is to plate the whole board for 60min with the current density of 1.8ASD, the tin plating is to plate the whole board for 10min with the current density of 1.2ASD, the tin thickness is 3-5 mu m, then sequentially stripping, etching and stripping tin, etching the outer layer circuit and the outer layer AOI on the production board, then checking the defects of open and short circuit, circuit notch, circuit pinhole and the like of the outer layer circuit, carrying out defective scrapping treatment, and outputting a defect-free product to the next flow.
(15) Solder resist, silk-screen character: adopting white screen printing TOP surface solder resist ink, and adding 'UL mark' into TOP surface characters; specifically, a protective layer is coated on the circuit and the base material which do not need welding, which prevents bridging between the circuits during welding, provides a permanent electrical environment and resists chemical corrosion, and plays a role in beautifying the appearance.
(16) Electric test: the electrical conductivity of the production board is tested, and the board is tested by the following steps: and (5) flying probe testing.
(17) And (3) surface treatment: according to the prior art and according to the chemical principle of the copper surface of a solder mask open window (bonding pad) according to the design requirement, nickel gold with certain required thickness is uniformly deposited.
(18) And (5) forming: according to the prior art, the appearance is milled according to the design requirement, and the appearance tolerance is +/-0.05mm, so that the circuit board is manufactured.
(19) FQC: and checking the appearance of the PCB according to the customer acceptance standard and the I department inspection standard, and if the PCB is defective, repairing the PCB in time, thereby ensuring that the PCB provides excellent quality control for customers.
(20) FQA: and (5) measuring whether the appearance, the hole copper thickness, the dielectric layer thickness, the green oil thickness, the inner layer copper thickness and the like of the PCB meet the requirements of customers or not.
(21) Packaging: and (3) sealing and packaging the PCB according to the packaging mode and the packaging quantity required by customers, placing a drier and a humidity card, and then delivering.
Example 2
The embodiment provides a manufacturing method of a circuit board, which comprises the following specific processes:
(1) And (3) cutting: and (3) cutting a core board according to the jointed board dimension of 520mm multiplied by 620mm, wherein the thickness of the core board is 0.5mm, and the thickness of the outer copper foil is 0.5OZ.
(2) Drilling, namely drilling holes on the core plate by using a mechanical drilling mode according to drilling data, wherein the drilled holes comprise plug holes which need to be filled with resin.
(3) Depositing copper by chemical reaction to form a layer of thin copper layer on the hole wall, metallizing the hole on the core plate, and testing the core plate in a backlight for 10 stages, wherein the thickness of the deposited copper layer in the hole is 0.5 mu m.
(4) Full plate plating: according to the principle of electrochemical reaction, a layer of copper is electroplated on the basis of copper deposition.
(5) Super-roughening: super roughening treatment is carried out on the core plate in a spraying mode, so that the binding force between the later-stage film and the plate surface is improved; the spraying pressure is 1.0-1.5 kg/cm 2, and the microetching amount during super roughening treatment is 0.4-1.0 μm.
(6) Plating hole patterns: and pasting a dry film on the core plate, and opening a window at a position corresponding to the plug hole through exposure and development to form a plating hole pattern.
(7) Plating holes: and then thickening the hole wall copper layer in the plug hole to the thickness required by design through electroplating.
(8) Film stripping: and (3) adopting sodium hydroxide with the concentration of 4.0+/-2.0% to perform film stripping treatment on the core plate.
(9) Microetching: carrying out microetching treatment on the core plate by adopting an acid etching solution at 34+/-2 ℃ in a spraying mode, wherein the spraying pressure is 1.5+/-0.5 kg/cm 2, and the microetching amount during microetching treatment is 0.9+/-0.3 mu m; wherein the acidic etching solution comprises hydrogen peroxide with the concentration of 25+/-10 g/L, sulfuric acid with the concentration of 80+/-20 g/L and CU 2+ with the concentration of 0-50 g/L.
(10) Resin plug hole: and then, resin ink is adopted to carry out resin hole plugging treatment on the hole plugging on the core plate.
(11) And (3) baking: finally, baking the core plate to solidify the resin ink, wherein the baking temperature is 150 ℃ and the baking time is 30min; and then removing the resin ink protruding on the plate surface through a ceramic grinding plate, and grinding the plate surface with resin cleanly and flattening the plate surface.
(12) Outer layer circuit fabrication (negative film process): coating a photosensitive film on a core plate by using a vertical coating machine, controlling the film thickness of the photosensitive film to be 8 mu m, adopting a full-automatic exposure machine, completing outer layer circuit exposure on the core plate by using a 5-6 grid exposure rule (a 21 grid exposure rule), and forming an outer layer circuit pattern on the core plate through development; etching the outer layer, namely etching the core plate after exposure and development to form an outer layer circuit, wherein the linewidth of the outer layer is measured to be 3mil; and (3) the outer layer AOI, and then checking defects such as open and short circuit, line notch, line pinhole and the like of the outer layer line, carrying out defective scrapping treatment, and outputting a defect-free product to the next flow.
(13) Solder resist, silk-screen character: adopting white screen printing TOP surface solder resist ink, and adding 'UL mark' into TOP surface characters; specifically, a protective layer is coated on the circuit and the base material which do not need welding, which prevents bridging between the circuits during welding, provides a permanent electrical environment and resists chemical corrosion, and plays a role in beautifying the appearance.
(14) Electric test: the electrical conduction performance of the core board is tested, and the board is used by the test method: and (5) flying probe testing.
(15) And (3) surface treatment: according to the prior art and according to the chemical principle of the copper surface of a solder mask open window (bonding pad) according to the design requirement, nickel gold with certain required thickness is uniformly deposited.
(16) And (5) forming: according to the prior art, the appearance is milled according to the design requirement, and the appearance tolerance is +/-0.05mm, so that the circuit board is manufactured.
(17) FQC: and checking the appearance of the PCB according to the customer acceptance standard and the I department inspection standard, and if the PCB is defective, repairing the PCB in time, thereby ensuring that the PCB provides excellent quality control for customers.
(18) FQA: and (5) measuring whether the appearance, the hole copper thickness, the dielectric layer thickness, the green oil thickness, the inner layer copper thickness and the like of the PCB meet the requirements of customers or not.
(19) Packaging: and (3) sealing and packaging the PCB according to the packaging mode and the packaging quantity required by customers, placing a drier and a humidity card, and then delivering.
The foregoing has described in detail the technical solutions provided by the embodiments of the present invention, and specific examples have been applied to illustrate the principles and implementations of the embodiments of the present invention, where the above description of the embodiments is only suitable for helping to understand the principles of the embodiments of the present invention; meanwhile, as for those skilled in the art, according to the embodiments of the present invention, there are variations in the specific embodiments and the application scope, and the present description should not be construed as limiting the present invention.
Claims (6)
1. A method for improving poor plugging of a PCB resin, comprising the steps of:
S1, drilling holes on a production plate, and metallizing the holes through copper deposition and full plate electroplating in sequence;
S2, super-roughening the production plate by adopting a spraying mode; the spraying pressure is 1.0-1.5 kg/cm 2, and the microetching amount during super-roughening treatment is 0.4-1.0 mu m;
s3, manufacturing a plating hole pattern on the production plate, and thickening the thickness of the copper layer in the hole by electroplating;
s4, removing the plating hole pattern on the production plate through film stripping treatment;
S5, carrying out microetching treatment on the production plate by adopting an acid etching solution at 34+/-2 o ℃ in a spraying mode, wherein the spraying pressure is 1.5+/-0.5 kg/cm 2, and the microetching amount in microetching treatment is 0.9+/-0.3 mu m, so that the etching amount of the copper layer in the plate surface and the hole can be reduced while the residual super-roughening film is effectively removed, and the problem of excessively thin copper layer is avoided;
S6, filling resin in the metallized holes and curing.
2. The method for improving the poor plugging performance of the resin plug hole of the PCB according to claim 1, wherein in the step S3, a film is firstly stuck on the production board, then a plating hole pattern is formed by exposure and development in sequence, and the plating hole pattern is windowed only at the position corresponding to the hole position requiring the resin plug hole.
3. The method for improving hole plugging failure of a PCB resin according to claim 1, wherein in step S4, the film stripping treatment is performed using sodium hydroxide having a concentration of 4.0±2.0%.
4. The method for improving hole plugging failure of a PCB resin according to claim 1, wherein in step S5, the acidic etching solution includes hydrogen peroxide with a concentration of 25±10g/L, sulfuric acid with a concentration of 80±20g/L, and CU 2+ with a concentration of 0 to 50 g/L.
5. The method for improving the hole plugging failure of the PCB resin according to claim 1, further comprising the step of, after the step S6:
s7, the production board sequentially passes through the steps of grinding the board, manufacturing an outer layer circuit, manufacturing a solder mask layer, surface treatment and forming to obtain the circuit board.
6. The method for improving the hole plugging failure of the PCB resin according to claim 1, wherein the production board is a core board or a multilayer board in which an inner core board and an outer copper foil are laminated together by prepreg.
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| CN202010675484.5A CN111970857B (en) | 2020-07-14 | 2020-07-14 | Method for improving poor plugging of PCB resin |
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| CN202010675484.5A CN111970857B (en) | 2020-07-14 | 2020-07-14 | Method for improving poor plugging of PCB resin |
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| CN112954903A (en) * | 2021-01-19 | 2021-06-11 | 江门崇达电路技术有限公司 | Ultrathin high-density printed board and manufacturing method thereof |
| CN113286455A (en) * | 2021-05-17 | 2021-08-20 | 深圳市迅捷兴科技股份有限公司 | Method for improving short circuit of board generated by resin hole plugging unsatisfied in shallow back drilling |
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| CN104684266A (en) * | 2015-02-04 | 2015-06-03 | 江门崇达电路技术有限公司 | Manufacturing method of matted gold line of circuit board |
| CN107347229A (en) * | 2016-05-06 | 2017-11-14 | 鹤山市中富兴业电路有限公司 | The process of wiring board selective resin consent |
| CN106973507A (en) * | 2017-04-20 | 2017-07-21 | 深圳崇达多层线路板有限公司 | A kind of preparation method of filling holes with resin wiring board |
| CN107231752A (en) * | 2017-06-20 | 2017-10-03 | 广州美维电子有限公司 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
| CN108289374A (en) * | 2017-12-21 | 2018-07-17 | 江门崇达电路技术有限公司 | A kind of production method of filling holes with resin wiring board |
| CN108966515A (en) * | 2018-08-10 | 2018-12-07 | 鹤山市中富兴业电路有限公司 | A kind of 6.0 technique of printed wiring board etching factor |
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