CN111970857A - Method for improving poor hole plugging of PCB resin - Google Patents
Method for improving poor hole plugging of PCB resin Download PDFInfo
- Publication number
- CN111970857A CN111970857A CN202010675484.5A CN202010675484A CN111970857A CN 111970857 A CN111970857 A CN 111970857A CN 202010675484 A CN202010675484 A CN 202010675484A CN 111970857 A CN111970857 A CN 111970857A
- Authority
- CN
- China
- Prior art keywords
- board
- resin
- hole
- pcb
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011347 resin Substances 0.000 title claims abstract description 44
- 229920005989 resin Polymers 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 claims abstract description 50
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 46
- 229910052802 copper Inorganic materials 0.000 claims abstract description 40
- 239000010949 copper Substances 0.000 claims abstract description 40
- 238000005530 etching Methods 0.000 claims abstract description 20
- 238000009713 electroplating Methods 0.000 claims abstract description 17
- 238000007788 roughening Methods 0.000 claims abstract description 17
- 238000005553 drilling Methods 0.000 claims abstract description 12
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 230000008021 deposition Effects 0.000 claims abstract description 9
- 230000008719 thickening Effects 0.000 claims abstract description 5
- 238000005507 spraying Methods 0.000 claims description 15
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 12
- 230000007547 defect Effects 0.000 claims description 12
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 8
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 238000000227 grinding Methods 0.000 claims description 7
- 230000002378 acidificating effect Effects 0.000 claims description 6
- 239000011889 copper foil Substances 0.000 claims description 6
- 238000004381 surface treatment Methods 0.000 claims description 4
- 230000002950 deficient Effects 0.000 claims description 3
- 238000011049 filling Methods 0.000 claims description 2
- 238000010030 laminating Methods 0.000 claims 1
- 238000007747 plating Methods 0.000 abstract description 15
- 239000000126 substance Substances 0.000 abstract description 10
- 239000003814 drug Substances 0.000 abstract description 3
- 239000007788 liquid Substances 0.000 abstract description 3
- 239000012528 membrane Substances 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 42
- 238000004806 packaging method and process Methods 0.000 description 8
- 238000012360 testing method Methods 0.000 description 6
- 238000003466 welding Methods 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 239000011241 protective layer Substances 0.000 description 4
- 239000002253 acid Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 239000002274 desiccant Substances 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000003487 electrochemical reaction Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000003908 quality control method Methods 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000010998 test method Methods 0.000 description 2
- 238000006087 Brown hydroboration reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 150000007524 organic acids Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
- H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention discloses a method for improving poor hole plugging of PCB resin, which comprises the following steps: drilling holes on the production plate, and metallizing the holes through copper deposition and full-plate electroplating in sequence; then the production plate is subjected to super-roughening treatment; manufacturing a plating hole pattern on the production plate, and then thickening the thickness of a copper layer in a hole by electroplating; removing the plated hole pattern on the production plate through film stripping treatment; then, carrying out micro-etching treatment on the production plate; the metallized holes are then filled with resin and cured. The method of the invention adds a microetching flow after stripping the membrane, and removes the chemical super-coarsened membrane by using the microetching liquid medicine, thereby avoiding the problem of poor resin hole plugging.
Description
Technical Field
The invention relates to the technical field of printed circuit board manufacturing, in particular to a method for improving poor hole plugging of PCB resin.
Background
In recent years, with the miniaturization of the assembled components, the wiring density of the printed circuit board is continuously improved, the planar density of the original continuously reduced aperture, line width and line distance tends to be a bottleneck, and the increase of the three-dimensional density becomes a new breakthrough point. On the basis, many customers design the via holes or blind buried holes in the connecting discs, which is called as disc inner holes, and the accompanying design is disc inner hole resin hole plugging design, namely, the via holes are plugged by resin, grinding and leveling are carried out by using abrasive belts after curing, redundant resin of the holes is removed, and then copper and board electricity are deposited on the surface of the hole plugging, and circuit patterns are manufactured.
Under the influence of the deep plating capability of an electroplating process, the rate of electroplating the PCB surface copper is obviously higher than that of hole copper electroplating, in order to avoid the situation that the thickness of the surface copper is too thick due to insufficient hole copper, the hole copper is plated to the required thickness by adopting the hole plating process before resin hole plugging, namely after the PCB is subjected to copper deposition and board electroplating, a dry film is firstly used for covering the whole board surface, then the hole plating is exposed by utilizing the hole plating film for exposure and development, the electroplating is independently thickened to a certain thickness, and finally the film stripping and the resin hole plugging are carried out; the main process flow of the disc inner hole resin comprises the following steps: the method comprises the steps of a front process → drilling → copper deposition → a board electric → chemical super-roughening → a hole plating pattern → a hole plating copper → film stripping (usually adopting alkaline liquid medicine) → resin hole plugging → a sanding board → copper deposition, a board electric → a rear process.
Before plating a hole pattern, a chemical super-roughening treatment is firstly utilized to roughen the surface and increase the binding force with a dry film, but the essence of the chemical super-roughening is that organic acid and a copper surface form a uniform and fine organic metal rough surface, the super-roughened film on the surface of the plate is difficult to treat cleanly during film stripping, and when resin hole plugging is performed after the film stripping, the residual super-roughened film and ink have high affinity, so that ink at an orifice is easily adsorbed, the hole plugging is poor, the hole plugging is not full, subsequent copper deposition and plate electricity are influenced, and finally the resin hole plugging cover is not overflowed.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a method for improving poor resin hole plugging of a PCB (printed circuit board).
In order to solve the technical problem, the invention provides a method for improving poor resin plug holes of a PCB, which comprises the following steps:
s1, drilling holes on the production board, and metallizing the holes through copper deposition and full board electroplating in sequence;
s2, performing super-roughening treatment on the produced plate;
s3, manufacturing a plated hole pattern on the production board, and then thickening the thickness of a copper layer in a hole by electroplating;
s4, removing the plated hole pattern on the production board through film stripping treatment;
s5, then carrying out microetching treatment on the production board;
and S6, filling resin in the metallized holes and curing.
Further, in step S2, the production board is subjected to super-roughening treatment by spraying.
Further, in step S2, the spraying pressure is 1.0-1.5 kg/cm2The micro-etching amount during the super-roughening treatment is 0.4 to 1.0 μm.
Further, in step S3, a film is first applied to the production board, and then a hole-plated pattern is formed by exposure and development in sequence, and the hole-plated pattern is windowed only at the hole position corresponding to the hole to be plugged with resin.
Further, in step S4, a film removing process is performed using sodium hydroxide with a concentration of 4.0 ± 2.0%.
Further, in step S5, the production board is microetched by spraying at a pressure of 1.5 + -0.5 kg/cm2The microetching amount in the microetching treatment is 0.9 +/-0.3 mu m.
Further, in step S5, microetching is performed at 34. + -. 2 ℃ using an acidic etchant.
Further, in step S5, the acidic etching solution includes hydrogen peroxide with a concentration of 25 + -10 g/L, sulfuric acid with a concentration of 80 + -20 g/L, and CU with a concentration of 0-50 g/L2+。
Further, step S6 is followed by the following steps:
and S7, sequentially carrying out the steps of grinding the board, manufacturing an outer layer circuit, manufacturing a solder mask, carrying out surface treatment and forming on the production board to obtain the circuit board.
Furthermore, the production board is a core board or a multilayer board formed by pressing an inner core board and an outer copper foil into a whole through a prepreg.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, by optimizing the process production flow and increasing the microetching flow after the film is removed, the chemical super-roughening film remained after the film is removed by using the microetching liquid medicine, the poor hole plugging of resin is avoided, the full hole plugging is ensured, and the quality defects of poor hole plugging of resin, poor electroplating cap and the like caused by the fact that the residual chemical super-roughening film adsorbs the orifice resin in the prior art are solved; and the method and parameters during the microetching treatment are strictly controlled, so that the residual super-coarsening film is effectively removed, the etching amount of the copper layer on the plate surface and in the hole can be reduced, and the problem of over-thin copper layer is avoided.
Detailed Description
In order to more fully understand the technical contents of the present invention, the technical solutions of the present invention will be further described and illustrated with reference to specific embodiments.
Example 1
The embodiment provides a manufacturing method of a circuit board, which specifically comprises the following processes:
(1) cutting: the core board is cut according to the size of the jointed board of 520mm multiplied by 620mm, the thickness of the core board is 0.5mm, and the thickness of the outer layer copper foil is 0.5 OZ.
(2) Inner layer circuit manufacturing (negative film process): transferring inner layer pattern, coating photosensitive film on the core plate by using a vertical coating machine, controlling the film thickness of the photosensitive film to be 8 μm, completing inner layer circuit exposure on the core plate by using a full-automatic exposure machine and 5-6 exposure rulers (21 exposure rulers), and forming an inner layer circuit pattern on the core plate through development; etching the inner layer, etching the exposed and developed core board to form an inner layer circuit, wherein the line width of the inner layer is measured to be 3 mil; and (4) inner layer AOI, and then, detecting defects of an inner layer circuit, such as open short circuit, circuit notch, circuit pinhole and the like, and performing defect scrapping treatment, wherein a defect-free product is discharged to the next flow.
(3) And pressing: and (3) brown oxidation speed is realized according to the thickness of the bottom copper, and the outer copper foil, the prepreg, the inner core plate, the prepreg and the outer copper foil are sequentially laminated and then are pressed by selecting proper lamination conditions according to the characteristics of the plate to form the production plate.
(4) And outer layer drilling, namely drilling holes in the production plate by using a mechanical drilling mode according to the drilling data, wherein the drilled holes comprise plug holes needing to be filled with resin.
(5) And depositing a layer of thin copper on the hole wall in a chemical reaction mode to metalize the hole on the production board, and testing the hole with 10 grades in a backlight mode, wherein the thickness of the deposited copper in the hole is 0.5 mu m.
(6) And electroplating the whole plate: according to the principle of electrochemical reaction, a layer of copper is electroplated on the basis of the copper deposition.
(7) And super-coarsening: carrying out super-roughening treatment on the production plate in a spraying mode, wherein the super-roughening treatment is used for improving the binding force between the film and the plate surface in the later period; the spraying pressure is 1.0-1.5 kg/cm2The micro-etching amount during the super-roughening treatment is 0.4 to 1.0 μm.
(8) Plating a hole pattern: and pasting a dry film on the production board, and windowing at the position corresponding to the plug hole through exposure and development to form a plated hole pattern.
(9) Plating holes: and then, thickening the hole wall copper layer in the plug hole to the thickness required by the design through electroplating.
(10) And removing the film: and (3) adopting sodium hydroxide with the concentration of 4.0 +/-2.0% to carry out film stripping treatment on the production plate.
(11) And micro-etching: the production plate is microetched by adopting acid etching solution at the temperature of 34 +/-2 ℃ in a spraying mode, and the spraying pressure is 1.5 +/-0.5 kg/cm2The microetching amount during the microetching treatment is 0.9 +/-0.3 mu m; wherein the acidic etching solution comprises hydrogen peroxide with the concentration of 25 +/-10 g/L, sulfuric acid with the concentration of 80 +/-20 g/L and CU with the concentration of 0-50 g/L2+。
(12) Resin hole plugging: and then carrying out resin hole plugging treatment on the plug holes on the production plate by using resin ink.
(13) And baking the plate: finally, baking the production plate to solidify the resin printing ink, wherein the baking temperature is 150 ℃ and the baking time is 30 min; and then removing the resin ink protruding out of the board surface by a ceramic grinding board, and grinding the resin on the board surface to be clean and smooth.
(14) And manufacturing an outer layer circuit (positive process): transferring an outer layer pattern, completing outer layer line exposure by using a full-automatic exposure machine and a positive film line film with 5-7 exposure rulers (21 exposure rulers), and forming an outer layer line pattern on a production board through development; and (3) outer layer pattern electroplating, then respectively plating copper and tin on the production plate, wherein the copper plating is carried out for 60min by using a current density of 1.8ASD, the tin plating is carried out for 10min by using a current density of 1.2ASD, the tin thickness is 3-5 mu m, then sequentially stripping, etching and stripping the tin, etching an outer layer circuit and an outer layer AOI on the production plate, then checking the defects of the outer layer circuit, such as open short circuit, circuit notch, circuit pinhole and the like, carrying out defective scrapping treatment, and discharging the product without defects to the next process.
(15) Solder resist and silk screen printing of characters: printing TOP surface solder resist ink by adopting a white screen, and adding a UL mark to TOP surface characters; specifically, a protective layer for preventing the bridging between the wires during welding, providing a permanent electrical environment and resisting chemical corrosion is coated on the wires and the base material which do not need welding, and the protective layer has the function of beautifying the appearance.
(16) And electrical test: the electric conduction performance of the production board is tested, and the board use test method comprises the following steps: and (5) flying probe testing.
(17) And surface treatment: according to the prior art and according to the design requirement, nickel and gold with certain required thickness are uniformly deposited on the copper surface of a solder mask windowing position (a welding pad) through a chemical principle.
(18) And forming: according to the prior art and according to the design requirement, routing the shape, and obtaining the circuit board with the external tolerance of +/-0.05 mm.
(19) FQC: and (4) inspecting the PCB appearance according to the customer acceptance standard and the I's inspection standard, and timely repairing the PCB if the PCB has defects so as to ensure that excellent quality control is provided for customers.
(20) FQA: and measuring whether the appearance, the hole copper thickness, the dielectric layer thickness, the green oil thickness, the inner layer copper thickness and the like of the PCB meet the requirements of customers or not.
(21) And packaging: and hermetically packaging the PCBs according to the packaging mode and the packaging quantity required by the customer, putting a drying agent and a humidity card, and then delivering.
Example 2
The embodiment provides a manufacturing method of a circuit board, which specifically comprises the following processes:
(1) cutting: the core board is cut according to the size of the jointed board of 520mm multiplied by 620mm, the thickness of the core board is 0.5mm, and the thickness of the outer layer copper foil is 0.5 OZ.
(2) And drilling, namely drilling holes on the core plate in a mechanical drilling mode according to the drilling data, wherein the drilled holes comprise plug holes needing to be filled with resin.
(3) And depositing a layer of thin copper on the hole wall in a chemical reaction mode to metalize the hole on the core board, and testing the copper in a backlight mode to 10 levels, wherein the thickness of the deposited copper in the hole is 0.5 mu m.
(4) And electroplating the whole plate: according to the principle of electrochemical reaction, a layer of copper is electroplated on the basis of the copper deposition.
(5) And super-coarsening: carrying out super-roughening treatment on the core plate in a spraying mode, wherein the super-roughening treatment is used for improving the binding force between the film and the plate surface in the later period; the spraying pressure is 1.0-1.5 kg/cm2The micro-etching amount during the super-roughening treatment is 0.4 to 1.0 μm.
(6) Plating a hole pattern: and pasting a dry film on the core plate, and windowing at the position corresponding to the plug hole through exposure and development to form a plated hole pattern.
(7) Plating holes: and then, thickening the hole wall copper layer in the plug hole to the thickness required by the design through electroplating.
(8) And removing the film: and (3) adopting sodium hydroxide with the concentration of 4.0 +/-2.0% to carry out film stripping treatment on the core plate.
(9) And micro-etching: adopting acid etching solution to carry out micro-etching treatment on the core plate at 34 +/-2 ℃ in a spraying mode, wherein the spraying pressure is 1.5 +/-0.5 kg/cm2The microetching amount during the microetching treatment is 0.9 +/-0.3 mu m; wherein the acidic etching solution comprises hydrogen peroxide with the concentration of 25 +/-10 g/L, sulfuric acid with the concentration of 80 +/-20 g/L and CU with the concentration of 0-50 g/L2+。
(10) Resin hole plugging: and then resin ink is adopted to carry out resin hole plugging treatment on the plug holes on the core plate.
(11) And baking the plate: finally, baking the core plate to solidify the resin printing ink, wherein the baking temperature is 150 ℃ and the baking time is 30 min; and then removing the resin ink protruding out of the board surface by a ceramic grinding board, and grinding the resin on the board surface to be clean and smooth.
(12) Outer layer circuit manufacturing (negative film process): coating a photosensitive film on a core plate by using a vertical coating machine, controlling the film thickness of the photosensitive film to be 8 mu m, completing outer layer circuit exposure on the core plate by using a full-automatic exposure machine and 5-6 exposure rulers (21 exposure rulers), and forming an outer layer circuit pattern on the core plate through development; etching the outer layer, namely etching the exposed and developed core board to form an outer layer circuit, wherein the width of the outer layer circuit is measured to be 3 mil; and (4) performing outer layer AOI, then checking the defects of an outer layer circuit, such as open short circuit, circuit notch, circuit pinhole and the like, performing defective scrapping treatment, and discharging a defect-free product to the next flow.
(13) Solder resist and silk screen printing of characters: printing TOP surface solder resist ink by adopting a white screen, and adding a UL mark to TOP surface characters; specifically, a protective layer for preventing the bridging between the wires during welding, providing a permanent electrical environment and resisting chemical corrosion is coated on the wires and the base material which do not need welding, and the protective layer has the function of beautifying the appearance.
(14) And electrical test: the electrical conduction performance of the core board is tested, and the use test method of the core board comprises the following steps: and (5) flying probe testing.
(15) And surface treatment: according to the prior art and according to the design requirement, nickel and gold with certain required thickness are uniformly deposited on the copper surface of a solder mask windowing position (a welding pad) through a chemical principle.
(16) And forming: according to the prior art and according to the design requirement, routing the shape, and obtaining the circuit board with the external tolerance of +/-0.05 mm.
(17) FQC: and (4) inspecting the PCB appearance according to the customer acceptance standard and the I's inspection standard, and timely repairing the PCB if the PCB has defects so as to ensure that excellent quality control is provided for customers.
(18) FQA: and measuring whether the appearance, the hole copper thickness, the dielectric layer thickness, the green oil thickness, the inner layer copper thickness and the like of the PCB meet the requirements of customers or not.
(19) And packaging: and hermetically packaging the PCBs according to the packaging mode and the packaging quantity required by the customer, putting a drying agent and a humidity card, and then delivering.
The technical solutions provided by the embodiments of the present invention are described in detail above, and the principles and embodiments of the present invention are explained herein by using specific examples, and the descriptions of the embodiments are only used to help understanding the principles of the embodiments of the present invention; meanwhile, for a person skilled in the art, according to the embodiments of the present invention, there may be variations in the specific implementation manners and application ranges, and in summary, the content of the present description should not be construed as a limitation to the present invention.
Claims (10)
1. A method for improving poor resin plug holes of a PCB is characterized by comprising the following steps:
s1, drilling holes on the production board, and metallizing the holes through copper deposition and full board electroplating in sequence;
s2, performing super-roughening treatment on the produced plate;
s3, manufacturing a plated hole pattern on the production board, and then thickening the thickness of a copper layer in a hole by electroplating;
s4, removing the plated hole pattern on the production board through film stripping treatment;
s5, then carrying out microetching treatment on the production board;
and S6, filling resin in the metallized holes and curing.
2. The method for improving the resin plugging defects of PCB as claimed in claim 1, wherein in step S2, the production board is super-roughened by spraying.
3. The method for improving the defective hole of PCB resin plug hole as claimed in claim 2, wherein the spraying pressure is 1.0-1.5 kg/cm in step S22The micro-etching amount during the super-roughening treatment is 0.4 to 1.0 μm.
4. The method of claim 1, wherein in step S3, a film is first applied on the production board, and then a hole pattern is formed by exposing and developing, wherein the hole pattern is windowed only at the positions corresponding to the holes to be plugged.
5. The method for improving resin plugging defects of PCB as claimed in claim 1, wherein in step S4, sodium hydroxide with concentration of 4.0 ± 2.0% is used for stripping.
6. The method of improving PCB resin plugging failure as recited in claim 1,it is characterized in that in step S5, the production board is microetched by adopting a spraying mode, and the spraying pressure is 1.5 +/-0.5 kg/cm2The microetching amount in the microetching treatment is 0.9 +/-0.3 mu m.
7. The method of claim 6, wherein in step S5, microetching is performed at 34 ± 2 ℃ by using an acidic etchant.
8. The method of claim 7, wherein in step S5, the acidic etchant comprises hydrogen peroxide with a concentration of 25 ± 10g/L, sulfuric acid with a concentration of 80 ± 20g/L, and CU with a concentration of 0-50 g/L2+。
9. The method for improving the resin tap hole defects of the PCB of claim 1, wherein the step S6 is further followed by the steps of:
and S7, sequentially carrying out the steps of grinding the board, manufacturing an outer layer circuit, manufacturing a solder mask, carrying out surface treatment and forming on the production board to obtain the circuit board.
10. The method for improving the poor resin plug holes of the PCB according to claim 1, wherein the production board is a core board or a multi-layer board formed by laminating an inner core board and an outer copper foil together by a prepreg.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010675484.5A CN111970857B (en) | 2020-07-14 | 2020-07-14 | Method for improving poor plugging of PCB resin |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010675484.5A CN111970857B (en) | 2020-07-14 | 2020-07-14 | Method for improving poor plugging of PCB resin |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111970857A true CN111970857A (en) | 2020-11-20 |
| CN111970857B CN111970857B (en) | 2024-05-31 |
Family
ID=73362235
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010675484.5A Active CN111970857B (en) | 2020-07-14 | 2020-07-14 | Method for improving poor plugging of PCB resin |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111970857B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112954903A (en) * | 2021-01-19 | 2021-06-11 | 江门崇达电路技术有限公司 | Ultrathin high-density printed board and manufacturing method thereof |
| CN113286455A (en) * | 2021-05-17 | 2021-08-20 | 深圳市迅捷兴科技股份有限公司 | Method for improving short circuit of board generated by resin hole plugging unsatisfied in shallow back drilling |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102711385A (en) * | 2012-06-26 | 2012-10-03 | 北京凯迪思电路板有限公司 | Method for manufacturing circuit board by addition method |
| CN104684266A (en) * | 2015-02-04 | 2015-06-03 | 江门崇达电路技术有限公司 | Manufacturing method of matted gold line of circuit board |
| CN106973507A (en) * | 2017-04-20 | 2017-07-21 | 深圳崇达多层线路板有限公司 | A kind of preparation method of filling holes with resin wiring board |
| CN107231752A (en) * | 2017-06-20 | 2017-10-03 | 广州美维电子有限公司 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
| CN107347229A (en) * | 2016-05-06 | 2017-11-14 | 鹤山市中富兴业电路有限公司 | The process of wiring board selective resin consent |
| CN108289374A (en) * | 2017-12-21 | 2018-07-17 | 江门崇达电路技术有限公司 | A kind of production method of filling holes with resin wiring board |
| CN108966515A (en) * | 2018-08-10 | 2018-12-07 | 鹤山市中富兴业电路有限公司 | A kind of 6.0 technique of printed wiring board etching factor |
-
2020
- 2020-07-14 CN CN202010675484.5A patent/CN111970857B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102711385A (en) * | 2012-06-26 | 2012-10-03 | 北京凯迪思电路板有限公司 | Method for manufacturing circuit board by addition method |
| CN104684266A (en) * | 2015-02-04 | 2015-06-03 | 江门崇达电路技术有限公司 | Manufacturing method of matted gold line of circuit board |
| CN107347229A (en) * | 2016-05-06 | 2017-11-14 | 鹤山市中富兴业电路有限公司 | The process of wiring board selective resin consent |
| CN106973507A (en) * | 2017-04-20 | 2017-07-21 | 深圳崇达多层线路板有限公司 | A kind of preparation method of filling holes with resin wiring board |
| CN107231752A (en) * | 2017-06-20 | 2017-10-03 | 广州美维电子有限公司 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
| CN108289374A (en) * | 2017-12-21 | 2018-07-17 | 江门崇达电路技术有限公司 | A kind of production method of filling holes with resin wiring board |
| CN108966515A (en) * | 2018-08-10 | 2018-12-07 | 鹤山市中富兴业电路有限公司 | A kind of 6.0 technique of printed wiring board etching factor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112954903A (en) * | 2021-01-19 | 2021-06-11 | 江门崇达电路技术有限公司 | Ultrathin high-density printed board and manufacturing method thereof |
| CN113286455A (en) * | 2021-05-17 | 2021-08-20 | 深圳市迅捷兴科技股份有限公司 | Method for improving short circuit of board generated by resin hole plugging unsatisfied in shallow back drilling |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111970857B (en) | 2024-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110831336B (en) | Resin hole plugging method for large-aperture back drilling hole | |
| CN110351955B (en) | Manufacturing method of PCB with local electrical thick gold PAD | |
| CN110248473B (en) | Method for solving problem of small pressing hole of VIA-IN-PAD resin hole-plugged PCB (printed circuit board) | |
| CN109275277B (en) | Solder mask manufacturing method for preventing small holes of PCB from entering ink | |
| CN108770238B (en) | Inner layer graph design method for improving copper pulling in drilling | |
| CN112423476B (en) | Method for improving poor hole plugging of PCB resin | |
| CN111741615B (en) | Method for pressing and filling glue of blind hole with high thickness-diameter ratio | |
| CN111867266A (en) | Circuit design method for preventing short circuit of isolated circuit of PCB | |
| CN114158195B (en) | Method for manufacturing precise circuit with assistance of laser | |
| CN112954903A (en) | Ultrathin high-density printed board and manufacturing method thereof | |
| CN109275268A (en) | A kind of PCB back drill production method being less than 0.15mm for medium thickness | |
| CN112752435B (en) | Method for improving pad removal of blind holes of multi-order circuit board and multi-order circuit board | |
| CN112261788A (en) | Manufacturing method of thick copper high-density interconnection printed board | |
| CN111970857B (en) | Method for improving poor plugging of PCB resin | |
| CN108811353A (en) | A kind of engraving method of two sides different Cu thickness PCB | |
| CN110602890A (en) | Manufacturing method of negative film circuit board with step circuit | |
| CN111642071A (en) | Circuit board and method for improving board explosion and copper sheet foaming of circuit board | |
| CN104883820A (en) | Manufacturing method for external layer line of asymmetric backboard with warped structure | |
| CN112739039A (en) | Manufacturing method of PCB with large PTH hole and fine line | |
| CN113873762B (en) | PCB with surface treatments of nickel-gold deposition and oxidation resistance and manufacturing method thereof | |
| CN109548321B (en) | Manufacturing method of positive undercut PCB | |
| CN110545633A (en) | Manufacturing method of circuit board of blind hole plug-in | |
| CN110785013A (en) | Manufacturing method for improving foaming and explosion of circuit board | |
| CN113660794A (en) | Manufacturing method of high-reliability printed circuit board | |
| CN110839319A (en) | Method for manufacturing high-precision impedance circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |