CN107231752A - It is a kind of to reduce the pcb board boring method for electroplating copper thickness below - Google Patents
It is a kind of to reduce the pcb board boring method for electroplating copper thickness below Download PDFInfo
- Publication number
- CN107231752A CN107231752A CN201710467925.0A CN201710467925A CN107231752A CN 107231752 A CN107231752 A CN 107231752A CN 201710467925 A CN201710467925 A CN 201710467925A CN 107231752 A CN107231752 A CN 107231752A
- Authority
- CN
- China
- Prior art keywords
- pcb board
- copper
- processing
- vippo
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention discloses the pcb board boring method that copper thickness below is electroplated in a kind of reduction, comprise the following steps：One-time mechanical drills；Heavy copper flash；Outer layer dry film；Figure plated hole；Move back film；Filling holes with resin；Resin nog plate；Secondary mechanical drills.The boring method of the present invention can reduce the face copper thickness completed after plating, and improve completion plating copper uniformity below, so that lifting outer graphics makes ability.
Description
Technical field
The pcb board brill of copper thickness below is electroplated the present invention relates to a kind of drilling technique of pcb board, more particularly to a kind of reduction
Hole method.
Background technology
VIPPO (Via-In-Pad Plated Over) technique bores VIA holes on PAD, then with the work for electroplating cap bore
Skill.Outer layer VIPPO design requirements are to carry out consent to VIPPO holes, and in one layer of copper cap of hole upper cover:Outer layer VIPPO is designed
VIPPO holes and 2 kinds of non-VIPPO holes (conventional through holes) hole type are usually constructed with, current outer layer VIPPO production process designs are in two times
Drill flow:Outer laminate-machine drilling (only boring VIPPO)-plating (heavy copper flash+electric plating of whole board)-filling holes with resin-resin mill
Plate-subtract copper-secondary resin nog plate-secondary mechanical drilling (boring other non-VIPPO holes)-second time electroplating (heavy copper flash+full plate electricity
Plating)-pattern transfer.
There is following defect in existing drilling flow：Need electroplating surface copper twice and subtract copper, complete the face copper after plating compared with
Thickness, conventional electroplating surface copper needs plus plating is about 25-30um, and uniformity is also poor in addition.
The content of the invention
In order to overcome the deficiencies in the prior art, plating copper thickness below is reduced it is an object of the invention to provide a kind of
Pcb board boring method.The boring method of the present invention can reduce the face copper thickness completed after plating, and improve after completion plating
Face copper uniformity, so that lifting outer graphics makes ability.
The purpose of the present invention adopts the following technical scheme that realization：It is a kind of to reduce the pcb board drilling side for electroplating copper thickness below
Method, comprises the following steps：
One-time mechanical drills：Machine drilling processing is carried out to multi-layer PCB board, VIPPO is only bored, to form several VIPPO
Drilling；
Heavy copper flash：The inwall of plate face and VIPPO drillings to multi-layer PCB board carries out electroless copper plating processing, and in chemistry
Electric plating of whole board flash processing is carried out to pcb board after heavy copper；
Outer layer dry film：One layer of dry film is covered in the plate face of multi-layer PCB board after heavy copper flash processing, dry film is in VIPPO
Drill hole opens a window；
Figure plated hole：Figure plated hole, and only plated hole copper are carried out to the multi-layer PCB board after outer layer dry film process, not surfacing copper；
Move back film：Remove the dry film on the pcb board after being handled through figure plated hole；
Filling holes with resin：Resin is filled in the VIPPO drillings of the multi-layer PCB board after the processing of figure plated hole；
Resin nog plate：Resin nog plate processing is carried out to the multi-layer PCB board after filling holes with resin processing；
Secondary mechanical drills：Machine drilling processing, only non-VIPPO holes are carried out to multi-layer PCB board.
Further, in the step of heavy copper flash, hole copper thickness >=3um of VIPPO drillings, the face copper of plate face only adds plating
8-10um。
Further, the step of also including outer laminate before one-time mechanical drill process, i.e., using press to multilayer
Wiring board carries out pressing processing and forms multi-layer PCB board.
Further, the step of resin nog plate is as follows：Multilayer is higher by the aperture that VIPPO drills using ceramic grinding printed line
The resin of the plate face of pcb board is polished, and performs this step 3 time, makes top surface and the plate face institute of multi-layer PCB board of resin in drilling
Flushed in horizontal plane；Ceramic grinding printed line includes a pair of ceramics brushes, three pairs of conventional adhesive-bonded fabric brushes and a pair of leveling brushes, during nog plate processing
Close conventional adhesive-bonded fabric brush.
Further, the step of also including plating after secondary mechanical drilling, the plating include heavy copper flash processing and
Electric plating of whole board processing.
Further, the step of also being handled after the electroplating step including pattern transfer.
Compared with prior art, the beneficial effects of the present invention are：
The reduction of the present invention electroplates the pcb board boring method of copper thickness below by replacing original in " heavy copper flash " step
" plating " step, the face copper of multi-layer PCB board plate face is only needed to plus plating 8-10um, and the conventional face copper electroplated needs plus plating is big
About 25-30um, is then covered in multi-layer PCB board plate face by dry film, utilizes " figure plated hole " station that hole copper is plating into visitor
Family is required, is thus reduced first time plating 17-20um face copper and is subtracted copper below, final to reduce the thickness for completing to electroplate copper below
Degree, and improve the uniformity for completing to electroplate copper below, so that lifting outer graphics makes ability.
Embodiment
Below, with reference to embodiment, the present invention is described further.
It is a kind of to reduce the pcb board boring method for electroplating copper thickness below, comprise the following steps：
Outer laminate：Pressing processing is carried out to multilayer circuit board using press and forms multi-layer PCB board.
One-time mechanical drills：Machine drilling processing is carried out to multi-layer PCB board, VIPPO is only bored, to form several VIPPO
Drilling；Machine drilling is by conventional drill to being drilled on multi-layer PCB board.
Heavy copper flash：The inwall of plate face and VIPPO drillings to multi-layer PCB board carries out electroless copper plating processing, and in chemistry
Electric plating of whole board flash processing is carried out to pcb board after heavy copper；Wherein, hole copper thickness >=3um of VIPPO drillings, the face copper of plate face
Only add plating 8-10um.
Outer layer dry film：One layer of dry film is covered in the plate face of multi-layer PCB board after heavy copper flash processing, dry film is in VIPPO
Drill hole opens a window；
Figure plated hole：Figure plated hole, and only plated hole copper are carried out to the multi-layer PCB board after outer layer dry film process, not surfacing copper；
Move back film：Remove the dry film on the pcb board after being handled through figure plated hole；
Filling holes with resin：Resin is filled in the VIPPO drillings of the multi-layer PCB board after the processing of figure plated hole；Using resin pair
Non- VIPPO edge PTH hole is clogged, so that liquid or little particle colloid will not be penetrated at the another side of plate, filling holes with resin
Reason can improve the reliability of pcb board.
Resin nog plate：Resin nog plate processing is carried out to the multi-layer PCB board after filling holes with resin processing；The step of resin nog plate, is such as
Under：The resin that the plate face of multi-layer PCB board is higher by the aperture that VIPPO is drilled using ceramic grinding printed line is polished, and performs this step
Three times, horizontal plane where making the top surface of the resin in drilling and the plate face of multi-layer PCB board is flushed；Ceramic grinding printed line includes a pair of potteries
Porcelain brush, three pairs of conventional adhesive-bonded fabric brushes and a pair of leveling brushes, close conventional adhesive-bonded fabric brush during nog plate processing.
The leveling brush is the adhesive-bonded fabric brush of mesh number 1000, and its coefficient of friction is smaller than conventional adhesive-bonded fabric brush, and ceramics
Only start ceramics brush and leveling brush on nog plate line, close conventional adhesive-bonded fabric brush；Conventional adhesive-bonded fabric brush is not during resin nog plate
Multi-layer PCB board can be contacted, the friction of conventional adhesive-bonded fabric brush is reduced, the aperture copper thickness abrasion of non-VIPPO edge PTH hole will be very
It is few, it disclosure satisfy that the copper thickness of client is required.
Secondary mechanical drills：Machine drilling processing, only non-VIPPO holes are carried out to multi-layer PCB board.
Plating：Pcb board after being drilled to secondary mechanical carries out electroplating processes, by electrolysis principle in the inwall of drilling and many
The upper face and lower face plating last layer other metal or alloys of layer pcb board, make hole metallization, so that between each layer of circuit board
It is conductive.The plating includes heavy copper flash processing and electric plating of whole board processing.
Pattern transfer：Pattern transfer processing is carried out to the multi-layer PCB board after plating；Pattern transfer is certain against corrosion for that will have
The photosensitive material of performance is coated on the copper foil plate of multi-layer PCB board, by photochemical reaction or the method for etching Circuit Map
Or the circuitous pattern on exposure film is transferred on copper foil plate.
Present invention aims at by replacing original " plating " step in " heavy copper flash " step, make multi-layer PCB board plate
The face copper in face is only needed to plus plating 8-10um, and the conventional face copper electroplated needs plus plating is about 25-30um, is then covered by dry film
Cover in multi-layer PCB board plate face, utilize " figure plated hole " station that hole copper is plating into customer requirement, thus reduce and electroplate for the first time
17-20um faces copper and subtract copper below, it is final to reduce the thickness for completing plating copper below, and improve and complete the equal of plating copper below
Even property, so that lifting outer graphics makes ability.
Above-mentioned embodiment is only the preferred embodiment of the present invention, it is impossible to limit the scope of protection of the invention with this,
The change and replacement for any unsubstantiality that those skilled in the art is done on the basis of the present invention belong to institute of the present invention
Claimed scope.
Claims (6)
1. a kind of reduce the pcb board boring method for electroplating copper thickness below, it is characterised in that including following steps：
One-time mechanical drills：Machine drilling processing is carried out to multi-layer PCB board, VIPPO is only bored, to form several VIPPO drillings；
Heavy copper flash：The inwall of plate face and VIPPO drillings to multi-layer PCB board carries out electroless copper plating processing, and in electroless copper plating
Electric plating of whole board flash processing is carried out to pcb board afterwards；
Outer layer dry film：One layer of dry film is covered in the plate face of multi-layer PCB board after heavy copper flash processing, dry film drills in VIPPO
Place's windowing；
Figure plated hole：Figure plated hole, and only plated hole copper are carried out to the multi-layer PCB board after outer layer dry film process, not surfacing copper；
Move back film：Remove the dry film on the pcb board after being handled through figure plated hole；
Filling holes with resin：Resin is filled in the VIPPO drillings of the multi-layer PCB board after the processing of figure plated hole；
Resin nog plate：Resin nog plate processing is carried out to the multi-layer PCB board after filling holes with resin processing；
Secondary mechanical drills：Machine drilling processing, only non-VIPPO holes are carried out to multi-layer PCB board.
2. boring method as claimed in claim 1, it is characterised in that in the step of heavy copper flash, the hole copper of VIPPO drillings
Thickness >=3um, the face copper of plate face only adds plating 8-10um.
3. boring method as claimed in claim 1, it is characterised in that also include outer lamination before one-time mechanical drill process
The step of plate, i.e., pressing processing is carried out to multilayer circuit board using press and form multi-layer PCB board.
4. boring method as claimed in claim 1, it is characterised in that as follows the step of resin nog plate：Using ceramic grinding printed line
The resin that the plate face of multi-layer PCB board is higher by the aperture that VIPPO is drilled is polished, and is performed this step 3 time, is made the tree in drilling
The top surface of fat is flushed with horizontal plane where the plate face of multi-layer PCB board；Ceramic grinding printed line includes a pair of ceramics brushes, three pairs of routines and not knitted
Cloth brush and a pair of leveling brushes, close conventional adhesive-bonded fabric brush during nog plate processing.
5. boring method as claimed in claim 1, it is characterised in that also include the step of plating after secondary mechanical drilling
Suddenly, the plating includes heavy copper flash processing and electric plating of whole board processing.
6. boring method as claimed in claim 5, it is characterised in that also include what pattern transfer was handled after the electroplating step
Step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710467925.0A CN107231752A (en) | 2017-06-20 | 2017-06-20 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710467925.0A CN107231752A (en) | 2017-06-20 | 2017-06-20 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107231752A true CN107231752A (en) | 2017-10-03 |
Family
ID=59935936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710467925.0A Pending CN107231752A (en) | 2017-06-20 | 2017-06-20 | It is a kind of to reduce the pcb board boring method for electroplating copper thickness below |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107889358A (en) * | 2017-11-07 | 2018-04-06 | 竞华电子(深圳)有限公司 | A kind of multi-layer PCB preparation method |
| CN108712832A (en) * | 2018-08-10 | 2018-10-26 | 四川海英电子科技有限公司 | A kind of circuit board conductive film plating technology |
| CN108848629A (en) * | 2018-06-11 | 2018-11-20 | 江门市奔力达电路有限公司 | A kind of hole electricity PCB production technology |
| CN109548302A (en) * | 2018-11-14 | 2019-03-29 | 深圳崇达多层线路板有限公司 | A kind of production method of the wiring board with thick copper hole |
| CN111970857A (en) * | 2020-07-14 | 2020-11-20 | 江门崇达电路技术有限公司 | Method for improving poor hole plugging of PCB resin |
| CN112867236A (en) * | 2021-01-21 | 2021-05-28 | 上海美维科技有限公司 | IC package substrate and manufacturing method thereof |
| CN113056116A (en) * | 2019-12-28 | 2021-06-29 | 深南电路股份有限公司 | Method for plating hole copper and processing method of circuit board |
| CN113194615A (en) * | 2021-05-14 | 2021-07-30 | 珠海杰赛科技有限公司 | Processing method for reducing resin hole plugging depression |
| CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
| CN113923883A (en) * | 2021-09-29 | 2022-01-11 | 胜宏科技（惠州）股份有限公司 | Method for improving sunken part of copper plate |
| CN114885523A (en) * | 2022-04-24 | 2022-08-09 | 奥士康科技股份有限公司 | PCB circuit printing POFV flow surface copper thickness control method |
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| CN105898994A (en) * | 2016-05-09 | 2016-08-24 | 广州美维电子有限公司 | Boring method for PCB (Printed Circuit Board) |
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| JP2004087656A (en) * | 2002-08-26 | 2004-03-18 | Victor Co Of Japan Ltd | Method for manufacturing printed wiring board |
| CN103298273A (en) * | 2013-05-07 | 2013-09-11 | 深圳崇达多层线路板有限公司 | Method for preventing bottom holes of circuit board from being blocked in copper plating |
| CN104349587A (en) * | 2013-07-31 | 2015-02-11 | 北大方正集团有限公司 | Method for manufacturing printed circuit board and via thereof, and printed circuit board |
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Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107889358A (en) * | 2017-11-07 | 2018-04-06 | 竞华电子(深圳)有限公司 | A kind of multi-layer PCB preparation method |
| CN108848629A (en) * | 2018-06-11 | 2018-11-20 | 江门市奔力达电路有限公司 | A kind of hole electricity PCB production technology |
| CN108712832A (en) * | 2018-08-10 | 2018-10-26 | 四川海英电子科技有限公司 | A kind of circuit board conductive film plating technology |
| CN109548302A (en) * | 2018-11-14 | 2019-03-29 | 深圳崇达多层线路板有限公司 | A kind of production method of the wiring board with thick copper hole |
| CN113056116A (en) * | 2019-12-28 | 2021-06-29 | 深南电路股份有限公司 | Method for plating hole copper and processing method of circuit board |
| CN111970857A (en) * | 2020-07-14 | 2020-11-20 | 江门崇达电路技术有限公司 | Method for improving poor hole plugging of PCB resin |
| CN111970857B (en) * | 2020-07-14 | 2024-05-31 | 江门崇达电路技术有限公司 | Method for improving poor plugging of PCB resin |
| CN112867236A (en) * | 2021-01-21 | 2021-05-28 | 上海美维科技有限公司 | IC package substrate and manufacturing method thereof |
| CN112867236B (en) * | 2021-01-21 | 2023-06-06 | 上海美维科技有限公司 | IC package substrate and method for manufacturing IC package substrate |
| CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
| CN113194615A (en) * | 2021-05-14 | 2021-07-30 | 珠海杰赛科技有限公司 | Processing method for reducing resin hole plugging depression |
| CN113923883A (en) * | 2021-09-29 | 2022-01-11 | 胜宏科技（惠州）股份有限公司 | Method for improving sunken part of copper plate |
| CN114885523A (en) * | 2022-04-24 | 2022-08-09 | 奥士康科技股份有限公司 | PCB circuit printing POFV flow surface copper thickness control method |
| CN114885523B (en) * | 2022-04-24 | 2024-05-14 | 奥士康科技股份有限公司 | Method for controlling thickness of copper on flow surface of printed POFV (potential of oxygen) printed on PCB (printed Circuit Board) |
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Application publication date: 20171003 |