CN113194604A - PCB substrate and production method thereof - Google Patents

PCB substrate and production method thereof Download PDF

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Publication number
CN113194604A
CN113194604A CN202110593481.1A CN202110593481A CN113194604A CN 113194604 A CN113194604 A CN 113194604A CN 202110593481 A CN202110593481 A CN 202110593481A CN 113194604 A CN113194604 A CN 113194604A
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CN
China
Prior art keywords
layer
copper
circuit
insulating medium
medium layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110593481.1A
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Chinese (zh)
Inventor
官华章
黄广翠
赵明胜
余掌珠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SIHUI FUJI ELECTRONICS TECHNOLOGY CO LTD
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SIHUI FUJI ELECTRONICS TECHNOLOGY CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by SIHUI FUJI ELECTRONICS TECHNOLOGY CO LTD filed Critical SIHUI FUJI ELECTRONICS TECHNOLOGY CO LTD
Priority to CN202110593481.1A priority Critical patent/CN113194604A/en
Publication of CN113194604A publication Critical patent/CN113194604A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention discloses a PCB (printed circuit board) substrate and a production method thereof, wherein the PCB substrate comprises an insulating medium layer, at least one circuit layer embedded in the insulating medium layer and a bonding pad embedded in the insulating medium layer and connected with the circuit layer, and the outer side surface of the bonding pad is flush with the outer side surface of the insulating medium layer. According to the structure of the PCB substrate and the corresponding production method, the circuit layer is embedded in the insulating medium layer, and the circuit layer is conducted by the bonding pad exposed on the surface of the insulating medium layer, so that the surface of the substrate is very flat, the problem of difficult or poor welding of later-stage components caused by the fact that the circuit is uneven on the outer layer and the surface is completely solved, and the problem of open short circuit caused by scratching and copper exposure during the manufacturing and using processes of the circuit is also solved.

Description

PCB substrate and production method thereof
Technical Field
The invention relates to the technical field of printed circuit board manufacturing, in particular to a PCB substrate and a production method thereof.
Background
At present, with the development of the electronic industry, electronic products with high power and large current are more and more widely applied, and the requirements on circuit boards serving as electronic component carrier plates are also more and more high.
In the current industry, a circuit, a bonding pad and a through hole are generally arranged on the outer layer of a substrate, the surface of the substrate manufactured by the prior art has the problem of unevenness, and the bonding pad for welding on a copper surface is generally lower than a solder mask surface, so that the later-stage welding between a component and the bonding pad is difficult or poor; meanwhile, the circuit is arranged on the outer layer, and the substrate is easily scratched and scratched to expose copper in the manufacturing and using processes, so that open and short circuits are caused.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the PCB substrate, the circuit layer is embedded in the insulating medium layer, and the bonding pad exposed on the surface of the insulating medium layer is utilized to conduct the circuit layer, so that the surface of the substrate is very flat, the problems of difficult welding or poor welding of later-stage components caused by the fact that the circuit is uneven on the outer layer and the surface are completely solved, and the problems of open short circuit caused by scratching and copper exposure during the manufacturing and using processes of the circuit are also avoided.
In order to solve the technical problem, the invention provides a PCB substrate, which comprises an insulating medium layer, at least one circuit layer embedded in the insulating medium layer, and a bonding pad embedded in the insulating medium layer and connected with the circuit layer, wherein the outer side surface of the bonding pad is flush with the outer side surface of the insulating medium layer.
Furthermore, two layers of first circuit layers and second circuit layers which are arranged at intervals up and down are embedded in the insulating medium layer, and the first circuit layers and the second circuit layers are respectively connected with the bonding pads.
Furthermore, the bonding pads connected to the first circuit layer and the second circuit layer are respectively flush with the upper surface and the lower surface of the insulating medium layer.
Furthermore, the PCB substrate further comprises a via hole which is embedded in the insulating medium layer and is communicated with the first circuit layer and the second circuit layer from top to bottom, and a copper plating layer for conducting is arranged on the hole wall of the via hole.
Further, the through hole is filled with resin.
Furthermore, the insulating medium layer comprises a prepreg medium layer positioned between the first circuit layer and the second circuit layer and an ink medium layer or a resin medium layer positioned on the outer side surface of the two circuit layers.
The invention also provides a production method of the PCB substrate, which comprises the following steps:
s1, cutting two copper bases with the same specification;
s2, respectively manufacturing an inner layer circuit on one surface of the two copper bases by depth control through a negative film process, and etching the copper layer at the non-circuit part of the copper bases to a thickness of 1/3 to 2/3;
s3, pressing the two copper bases together through a prepreg to form a production board, wherein the surfaces, on which the inner layer circuits are manufactured, of the two copper bases are located in opposite directions of the inner layer;
s4, drilling a through hole on the production board, and metallizing the through hole through copper deposition and full-board electroplating to form a through hole;
s5, filling resin in the via hole and curing, and then grinding the board to make the board flat;
s6, attaching films on two surfaces of the production board, forming a pad graph through exposure and development in sequence, removing the residual copper layer at the non-circuit part on the copper substrate through controlled etching, and simultaneously removing the copper layer with the corresponding thickness at the inner circuit part on the copper substrate through etching to form a step height difference between the pad and the inner circuit;
and S7, finally, manufacturing a solder mask layer on the production board or filling the solder mask layer with resin to form an insulating medium layer, embedding the two inner-layer circuit layers in the insulating medium layer, and making the surface of the pad flush with the surface of the insulating medium layer to obtain the PCB substrate.
Further, the following steps are included between steps S1 and S2:
and S11, respectively drilling riveting holes and alignment holes at corresponding positions on the two copper substrates.
Further, in step S2, the copper layer at the non-wiring portion on the copper substrate is etched away by a thickness of 1/2; in step S6, a copper layer of 1/2 thickness at non-pad locations on the copper substrate is removed by etching.
Further, in step S7, after the solder mask is manufactured, the board surface is flattened by grinding, and the surface of the pad is flush with the surface of the solder mask.
Further, step S7 is followed by the following steps:
and S8, sequentially carrying out character making, surface treatment and molding processes on the production board.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, the circuit layer is embedded in the insulating medium layer, and the circuit layer is conducted by using the bonding pad exposed on the surface of the insulating medium layer, so that the board surface of the substrate is very flat, the problem of difficult or poor welding of components in the later period caused by the fact that the circuit is uneven on the outer layer and the board surface is completely solved, and the problem of open short circuit caused by scratching and copper exposure due to wiping in the manufacturing and using processes of the circuit is also avoided.
The method comprises the steps of adopting a copper base as a base plate, forming an inner layer circuit in a semi-etching mode, manufacturing a via hole and a resin plug hole, enabling a step height difference to exist between a pad and a circuit layer through secondary etching, and utilizing the step height difference to fill and level the surface of the circuit layer through solder resistance, so that the manufactured circuit and the via hole of the substrate are buried in a medium layer on the plate, only the surface of the pad is exposed, the surface of the substrate is very flat, the problems of difficult welding or poor welding of later-stage components and parts caused by the fact that the circuit is uneven on the outer layer and the surface are completely solved, and the problems of open short circuit caused by scratching and copper exposure of the circuit in the manufacturing and using processes are also solved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic view of a PCB substrate in embodiment 1;
FIG. 2 is a schematic diagram of a PCB substrate in one embodiment;
fig. 3 is a schematic view of a manufacturing process of the PCB substrate in embodiment 2.
Detailed Description
For a fuller understanding of the technical aspects of the present invention, reference should be made to the following detailed description taken together with the accompanying drawings; it should be noted that, if "first" or "second" is described in the text, it is used to distinguish different components, and the like, and does not represent the order of precedence, and does not limit "first" and "second" to be different types.
It is to be understood that the embodiments described below are only a few embodiments of the present invention, and not all embodiments; all other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown in fig. 1, the PCB substrate shown in this embodiment includes an insulating medium layer 1, and a first circuit layer 2 and a second circuit layer 3 embedded in the insulating medium layer 1 at an upper and lower interval, where the first circuit layer 2 and the second circuit layer 3 are respectively connected to a pad 4 embedded in the insulating medium layer 1, and an outer side surface of the pad 4 is flush with an outer side surface of the insulating medium layer 1; in the aforesaid, through burying the circuit layer in insulating medium layer underground to utilize the pad that exposes on insulating medium layer surface to switch on the inlayer circuit, make the face of base plate very level and smooth, stopped completely because of the circuit leads to later stage components and parts welding difficulty or the bad problem of welding at skin and face unevenness, also avoided the circuit fish tail and wipe the open short circuit problem that the flower exposes copper and lead to in preparation and use.
Specifically, the bonding pads 4 connected to the first circuit layer 2 and the second circuit layer 3 are respectively flush with the upper surface and the lower surface of the insulating medium layer 1, that is, the bonding pads on the two circuit layers respectively extend in opposite directions, so that the manufacturing is facilitated.
Specifically, the PCB substrate further comprises a via hole 5 which is embedded in the insulating medium layer 1 and is communicated with the first circuit layer 2 and the second circuit layer 3 up and down, a copper plating layer 6 for conduction is arranged on the hole wall of the via hole 5, and resin 7 is filled in the via hole 6, namely, the circuit and the via hole are embedded in the insulating medium layer in the substrate, so that various problems caused by the fact that the circuit is exposed outside are avoided.
Specifically, the thickness of the bonding pad is larger than the thicknesses of the first circuit layer and the second circuit layer, so that a step height difference exists between the bonding pad and the circuit layer, and the step height difference is filled by using an insulating medium layer, so that the purpose of embedding the circuit and the via hole in the insulating medium layer is achieved.
In other embodiments, the insulating dielectric layer is a prepreg dielectric layer, a resin dielectric layer, or an ink dielectric layer.
In other embodiments, as shown in fig. 2, the insulating dielectric layer 1 includes a prepreg dielectric layer 11 between the first circuit layer 2 and the second circuit layer 3 and an ink dielectric layer or a resin dielectric layer 12 on the outer surface of the two circuit layers.
In other embodiments, the thicknesses of the first circuit layer and the second circuit layer may be the same or different.
In other embodiments, the thickness of the bonding pad is 2 times the thickness of the circuit layer.
Example 2
As shown in fig. 3, the method for manufacturing a PCB substrate in this embodiment is used to manufacture the PCB substrate in embodiment 1, and sequentially includes the following processing steps:
(1) cutting: two copper bases with the same thickness are cut according to the size of a jointed board of 520mm multiplied by 620mm, and the thickness of each copper base is 2 times of the thickness of a circuit layer to be manufactured.
(2) Drilling: firstly, respectively drilling riveting holes and aligning holes at corresponding positions on two copper bases.
(3) Manufacturing an inner layer circuit (negative film process): coating photosensitive films on two copper substrates by using a vertical coating machine respectively, controlling the film thickness of the photosensitive films to be 8 mu m, completing inner layer circuit exposure on one surface of the copper substrates by using a full-automatic exposure machine and using 5-6 exposure rulers (21 exposure rulers), exposing the other surface of the copper substrates by the whole surface, and forming an inner layer circuit pattern after development; etching the inner layer, namely etching the exposed and developed copper base to form an inner layer circuit in a controlled depth manner, so that the copper layer at the non-circuit part of the copper base is etched to the thickness of 1/2; and then the film is removed.
(4) And (3) laminating: carrying out blackening or browning treatment on the copper base, wherein the browning speed is according to the thickness of the copper base, two copper bases are sequentially overlapped through a prepreg according to requirements and then pressed (the specific overlapping sequence is the copper base, the prepreg and the copper base) to form a production plate, wherein one surfaces of the two copper bases, which are provided with inner layer circuits, are positioned in the inner layers and are arranged oppositely; and before lamination, a rivet penetrates through the riveting hole to rivet and fix the two copper substrates and the prepreg together, so that the problem of deviation is avoided.
(5) Drilling: the production plate is subjected to blackening or browning removing treatment to remove a browning layer or a blackening layer on the production plate, and then drilling is carried out by using the drilling data, so that through holes are drilled in the production plate.
(6) Copper deposition and whole-plate electroplating: metallizing through holes on a board through a copper deposition process, testing the through holes in a backlight mode for 10 grades, wherein the thickness of the deposited copper in the through holes is 0.5 mu m, and then carrying out full-board electroplating on the production board according to the prior art and the design requirements, thickening copper layers in the through holes, and forming copper-plated layers on the wall surfaces of the through holes to form the through holes; in a specific preferred embodiment, a plating hole pattern is manufactured on the production board before copper deposition and plating hole, so that the thickness of the board surface copper layer is prevented from being thickened, the etching amount during the later copper layer etching is reduced, and the production efficiency is improved.
(7) Resin hole plugging: resin is filled in the through holes in a selective resin hole plugging mode, the resin is cured by baking at the temperature of 180 ℃ for 60min, the resin can be cured by controlling the parameters, the problem of oil explosion in the baking process of the resin can be reduced while the resin is cured, the time for grinding the board in the later period is reduced, and the abrasion loss of a copper layer is reduced; .
(8) Grinding a plate: removing the resin on the protruded orifices and the plate surface by grinding the plate to flatten the plate surface; the grinding and brushing quantity can be set to be larger because the external copper layer is thicker and needs to be removed at the later stage, so that the production efficiency can be improved by improving the grinding and brushing parameters when the plate is ground, when the ceramic plate is adopted for grinding, the grinding and brushing current is 3.0A, and the plate grinding speed is 3 m/min; when the grinding plate is made of non-woven fabric, the grinding current is 2A, and the grinding speed is 3 m/min.
(9) Outer layer etching: the method comprises the steps of coating films on two surfaces of a production board, forming a pad pattern through exposure and development in sequence, namely, covering the positions, corresponding to pads, on a copper substrate by the films, removing half of the thickness of a copper layer on a non-pad part of the copper substrate through controlled-depth etching, namely, etching and removing the residual thickness of 1/2 copper layer on the non-circuit part of the copper substrate, and simultaneously etching and removing the copper layer with the corresponding thickness (namely 1/2 of the thickness of the copper substrate) on an inner-layer circuit part of the copper substrate, so that a step height difference is formed between the pads and the inner-layer circuit.
(10) And manufacturing a solder mask layer: after the solder resist ink is sprayed on the circuit layer on the surface of the production board except for the pad, the solder resist ink is sequentially subjected to pre-curing, exposure, development and thermosetting treatment to be cured into a solder resist layer, the height difference between the pad and the circuit layer is filled by the solder resist layer, the circuit layer and the via hole are embedded in the insulating medium layer, and the inner-layer circuits formed on the two copper substrates are respectively formed into a first circuit layer and a second circuit layer, so that a protective layer which prevents bridging among the circuits during welding, provides a permanent electrical environment and resists chemical corrosion is coated on the circuits and the base materials which do not need to be welded, and the appearance is beautified.
(11) Grinding a plate: and flattening the board surface by grinding the board, and enabling the surfaces of the welding pad and the resin in the hole to be flush with the surface of the solder mask.
(12) Silk-screen printing of characters: and (3) printing the TOP surface solder resist ink on the production board by spraying, wherein the characters on the TOP surface are added with a UL mark.
(13) Surface treatment (nickel-gold deposition): the copper surface of the welding pad at the solder stop windowing position is communicated with a chemical principle, a nickel layer and a gold layer with certain required thickness are uniformly deposited, and the thickness of the nickel layer is as follows: 3-5 μm; the thickness of the gold layer is as follows: 0.05-0.1 μm.
(14) And electrical test: testing the electrical conduction performance of the finished board, wherein the board use testing method comprises the following steps: and (5) flying probe testing.
(15) And forming: according to the prior art and according to the design requirement, routing the shape and the tolerance of +/-0.05mm, and manufacturing the PCB substrate with the circuit and the via hole both embedded in the insulating medium layer.
(16) FQC: and (4) inspecting the appearance of the finished board according to the customer acceptance standard and the inspection standard of my department, and timely repairing the finished board if a defect exists so as to ensure that excellent quality control is provided for the customer.
(17) FQA: and measuring whether the appearance, the hole copper thickness, the dielectric layer thickness, the green oil thickness, the inner layer copper thickness and the like of the finished board meet the requirements of customers or not.
(18) And packaging: and hermetically packaging the finished boards according to the packaging mode and the packaging quantity required by the customer, putting a drying agent and a humidity card, and then delivering.
In other embodiments, the thickness of the copper base can be flexibly determined according to the thickness of the required circuit, and the thickness of the circuit layer is 1/3 to 2/3 of the thickness of the copper base, that is, the thickness of the copper base can be 3 times of the thickness of the circuit layer at most.
In other embodiments, the step (10) of forming the solder mask layer may be changed to filling with resin, the resin layer is used to fill the height difference between the pad and the circuit layer, and the circuit layer and the via hole are embedded in the insulating medium layer, and the inner circuit layers formed on the two copper substrates are respectively formed as the first circuit layer and the second circuit layer, so that a protective layer for preventing bridging between the circuits during soldering, providing a permanent electrical environment and resisting chemical corrosion is filled on the circuits and the base material without soldering, and simultaneously, the appearance is beautified.
The technical solutions provided by the embodiments of the present invention are described in detail above, and the principles and embodiments of the present invention are explained herein by using specific examples, and the descriptions of the embodiments are only used to help understanding the principles of the embodiments of the present invention; meanwhile, for a person skilled in the art, according to the embodiments of the present invention, there may be variations in the specific implementation manners and application ranges, and in summary, the content of the present description should not be construed as a limitation to the present invention.

Claims (10)

1. A PCB substrate is characterized by comprising an insulating medium layer, at least one circuit layer embedded in the insulating medium layer, and a bonding pad embedded in the insulating medium layer and connected with the circuit layer, wherein the outer side surface of the bonding pad is flush with the outer side surface of the insulating medium layer.
2. The PCB substrate of claim 1, wherein two first circuit layers and two second circuit layers are embedded in the insulating medium layer and are arranged at intervals up and down, and the bonding pads are connected to the first circuit layers and the second circuit layers respectively.
3. The PCB substrate of claim 2, wherein the pads connected to the first and second circuit layers are flush with the upper and lower surfaces of the insulating medium layer, respectively.
4. The PCB substrate of claim 3, further comprising a via hole embedded in the insulating dielectric layer and vertically communicating the first circuit layer and the second circuit layer, wherein a copper plating layer for conducting is disposed on a hole wall of the via hole.
5. The PCB substrate of claim 4, wherein the vias are filled with resin.
6. A method for producing a PCB substrate is characterized by comprising the following steps:
s1, cutting two copper bases with the same specification;
s2, respectively manufacturing an inner layer circuit on one surface of the two copper bases by depth control through a negative film process, and etching the copper layer at the non-circuit part of the copper bases to a thickness of 1/3 to 2/3;
s3, pressing the two copper bases together through a prepreg to form a production board, wherein the surfaces, on which the inner layer circuits are manufactured, of the two copper bases are located in opposite directions of the inner layer;
s4, drilling a through hole on the production board, and metallizing the through hole through copper deposition and full-board electroplating to form a through hole;
s5, filling resin in the via hole and curing, and then grinding the board to make the board flat;
s6, attaching films on two surfaces of the production board, forming a pad graph through exposure and development in sequence, removing the residual copper layer at the non-circuit part on the copper substrate through controlled etching, and simultaneously removing the copper layer with the corresponding thickness at the inner circuit part on the copper substrate through etching to form a step height difference between the pad and the inner circuit;
and S7, finally, manufacturing a solder mask layer on the production board or filling the solder mask layer with resin to form an insulating medium layer, embedding the two inner-layer circuit layers in the insulating medium layer, and making the surface of the pad flush with the surface of the insulating medium layer to obtain the PCB substrate.
7. The method for manufacturing a PCB substrate of claim 6, further comprising the following steps between the steps S1 and S2:
and S11, respectively drilling riveting holes and alignment holes at corresponding positions on the two copper substrates.
8. The method of claim 6, wherein in step S2, the copper layer at the non-wiring portion on the copper substrate is etched away by a thickness of 1/2; in step S6, a copper layer of 1/2 thickness at non-pad locations on the copper substrate is removed by etching.
9. The method for manufacturing a PCB substrate of claim 6, wherein in step S7, the solder mask is formed and then the surface of the solder mask is flattened by grinding, and the surface of the solder pad is flush with the surface of the insulating medium layer.
10. The method for producing a PCB substrate of claim 6, further comprising the following steps after the step S7:
and S8, sequentially carrying out character making, surface treatment and molding processes on the production board.
CN202110593481.1A 2021-05-28 2021-05-28 PCB substrate and production method thereof Pending CN113194604A (en)

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Application Number Priority Date Filing Date Title
CN202110593481.1A CN113194604A (en) 2021-05-28 2021-05-28 PCB substrate and production method thereof

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Application Number Priority Date Filing Date Title
CN202110593481.1A CN113194604A (en) 2021-05-28 2021-05-28 PCB substrate and production method thereof

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Publication Number Publication Date
CN113194604A true CN113194604A (en) 2021-07-30

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114900994A (en) * 2022-04-18 2022-08-12 广州广芯封装基板有限公司 Embedded circuit type circuit board and preparation method thereof
CN117560859A (en) * 2024-01-09 2024-02-13 惠州市金百泽电路科技有限公司 Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114900994A (en) * 2022-04-18 2022-08-12 广州广芯封装基板有限公司 Embedded circuit type circuit board and preparation method thereof
CN117560859A (en) * 2024-01-09 2024-02-13 惠州市金百泽电路科技有限公司 Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB
CN117560859B (en) * 2024-01-09 2024-04-02 惠州市金百泽电路科技有限公司 Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB

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