CN117560859A - Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB - Google Patents
Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB Download PDFInfo
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- CN117560859A CN117560859A CN202410026392.2A CN202410026392A CN117560859A CN 117560859 A CN117560859 A CN 117560859A CN 202410026392 A CN202410026392 A CN 202410026392A CN 117560859 A CN117560859 A CN 117560859A
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- circuit layer
- pcb
- bonding pad
- cross
- copper sheet
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- 238000000034 method Methods 0.000 title claims abstract description 88
- 238000005457 optimization Methods 0.000 title claims abstract description 52
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 86
- 229910052802 copper Inorganic materials 0.000 claims abstract description 86
- 239000010949 copper Substances 0.000 claims abstract description 86
- 238000005520 cutting process Methods 0.000 claims abstract description 12
- 238000001514 detection method Methods 0.000 claims abstract description 8
- 230000010354 integration Effects 0.000 claims abstract description 4
- 230000008092 positive effect Effects 0.000 claims abstract description 4
- 238000013461 design Methods 0.000 claims description 22
- 238000003475 lamination Methods 0.000 claims description 2
- 238000012372 quality testing Methods 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 11
- 241001424392 Lucia limbaria Species 0.000 description 2
- 238000005553 drilling Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 238000000275 quality assurance Methods 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 230000001502 supplementing effect Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Abstract
The invention relates to an automatic optimization method for a cross bonding pad of a PCB, electronic equipment and the PCB. The PCB cross bonding pad automatic optimization method comprises the following steps: integrating the copper sheet of the circuit layer; cutting and copying the copper sheet of the circuit layer; determining a bonding pad to be optimized; copper is drawn out of the bonding pad; stacking copper sheets; removing fine line width; integrating copper sheet properties: superposing the fifth circuit layer and the sixth circuit layer with positive properties to form a seventh circuit layer so as to complete the integration of copper sheet properties; detecting a circuit layer: performing quality detection on the seventh circuit layer to ensure that the seventh circuit layer meets merging conditions; merging circuit layers: and combining the first circuit layer and the seventh circuit layer to finish optimization of the cross bonding pad. According to the PCB cross bonding pad automatic optimization method, the electronic equipment and the PCB, the cross bonding pads in the original PCB file can be optimized, the production quality of PCB products is improved, and the requirements of customer products are better met.
Description
Technical Field
The invention relates to the technical field of PCB manufacturing, in particular to an automatic optimization method for a cross bonding pad of a PCB, electronic equipment and the PCB.
Background
The cross bonding pad is a special bonding pad type on the PCB, and can reduce excessive heat dissipation of the bonding pad in the PCB welding process, so that the occurrence of cold joint or PCB peeling is avoided. After the original design file of the PCB is submitted to the PCB manufacturer, the PCB manufacturer often needs to optimize the original design file of the PCB by PCB optimization software to meet the technical requirements of the PCB production process. The PCB manufacturer optimizes the cross bonding pads in the original design file of the PCB mainly by directly shrinking the line width of the cross connection bit or manually supplementing the line after removing the connecting line of the cross bonding pads.
Under the prior art, the cross bonding pad needs to be optimally designed through complicated manual operation, and the mode is low in efficiency and extremely prone to design errors.
Disclosure of Invention
Based on the above, it is necessary to provide an automatic optimization method for a cross pad of a PCB, an electronic device and the PCB, aiming at the problems that the optimization design of the cross pad in the prior art is inefficient and is very prone to design errors.
An automatic optimization method for a PCB cross bonding pad, comprising the following steps:
integrating the circuit layer copper sheet: eliminating the negativity of the original PCB file, and integrating the copper sheets integrally to form an initial circuit layer;
cutting and copying the copper sheet of the circuit layer: cutting copper sheets in the initial circuit layer, determining the initial circuit layer after cutting the copper sheets as a first circuit layer, copying the cut copper sheets to form a second circuit layer, and copying the second circuit layer to form a third circuit layer;
determining a pad to be optimized: copying a bonding pad to be optimized in the first circuit layer to form a fourth circuit layer, and enlarging the bonding pad of the fourth circuit layer;
copper is drawn on the bonding pad: superposing the fourth circuit layer with the second circuit layer by negative property to form a fifth circuit layer, and eliminating the negative property of the fifth circuit layer;
copper sheet lamination: superposing the fifth circuit layer with the third circuit layer by negative property to form a sixth circuit layer, and eliminating the negative property of the sixth circuit layer;
and (3) removing fine linewidth: detecting the fine line width of the sixth circuit layer, and reducing and amplifying the whole copper sheet of the sixth circuit layer according to the fine line width so as to remove the fine line width;
integrating copper sheet properties: superposing the fifth circuit layer and the sixth circuit layer with positive properties to form a seventh circuit layer so as to complete the integration of copper sheet properties;
detecting a circuit layer: performing quality detection on the seventh circuit layer to ensure that the seventh circuit layer meets merging conditions;
merging circuit layers: and combining the first circuit layer and the seventh circuit layer to finish optimization of the cross bonding pad.
According to the PCB cross bonding pad automatic optimization method, the cross bonding pad in an original PCB file can be optimized by integrating the circuit layer copper sheet, cutting and copying the circuit layer copper sheet, determining the bonding pad to be optimized, drawing copper out of the bonding pad, stacking the copper sheet, removing the tiny line width, integrating the copper sheet attribute, detecting the circuit layer and merging the circuit layer. Through the characteristic that the small copper sheet disappears after being reduced, the automatic optimization of the PCB cross bonding pad can be realized, the automatic optimization efficiency of the cross bonding pad is improved, and the consistency of the PCB cross bonding pad design and the original PCB file design of a customer is effectively ensured.
In one embodiment, the performing quality detection on the seventh line layer includes:
and detecting whether the gap of the cross connection bit in the seventh circuit layer meets the process requirements of a factory.
In one embodiment, the performing quality detection on the seventh line layer further includes:
and detecting whether the cross connection bit gap in the seventh circuit layer meets the design requirement of the original PCB file.
In one embodiment, the enlarging the pad of the fourth line layer includes:
determining the process requirements of a factory;
determining a bonding pad increasing value according to the process requirements of the factory;
and enlarging the bonding pad of the fourth circuit layer according to the bonding pad enlarging value.
In one embodiment, the process requirements include conventional process requirements and non-conventional process requirements, and the determining the pad up value according to the process requirements of the factory includes:
if the conventional process requirements meet the design requirements, determining a pad increase value according to the conventional process requirements;
and if the conventional process requirements do not meet the design requirements, determining a bonding pad increasing value according to the non-conventional process requirements.
In one embodiment, the cross pad includes a first pitch, a second pitch and a third pitch, the first pitch is an opening width of the cross pad, the second pitch is a distance between an inner side of a cross connection position and an edge of a center via hole, and the third pitch is a width of the cross connection position;
the conventional process requirements include:
the first pitch is set to 12 mils, the second pitch is set to 10 mils, and the third pitch is set to 10 mils.
In one embodiment, the non-conventional process requirements include:
the first pitch is set to 8 mils, the second pitch is set to 8 mils, and the third pitch is set to 8 mils.
In one embodiment, the fine linewidth is a linewidth of less than 2 mils.
An electronic device comprising a processor for performing the PCB cross pad auto-optimization method described above.
The PCB comprises the cross bonding pad, and the cross bonding pad is manufactured according to the PCB cross bonding pad automatic optimization method.
Drawings
FIG. 1 is a schematic flow chart of an automatic optimization method for a cross bonding pad of a PCB according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of an initial circuit layer in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a first circuit layer in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a second circuit layer in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a third circuit layer in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a fourth circuit layer after enlarging a bonding pad in the automatic optimization method of a cross bonding pad of a PCB according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a fifth circuit layer after negativity is eliminated in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a sixth circuit layer after negativity is eliminated in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a sixth circuit layer with a small line width detected in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a sixth circuit layer after removing a fine line width in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a seventh circuit layer in the automatic optimization method of a PCB cross pad according to an embodiment of the present invention;
fig. 12 is a schematic diagram of the pitch of cross pads in the automatic optimization method of the cross pads of the PCB according to the embodiment of the present invention.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be embodied in many other forms than described herein and similarly modified by those skilled in the art without departing from the spirit of the invention, whereby the invention is not limited to the specific embodiments disclosed below.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The PCB Layout engineer designs the circuit board, the circuit board factory is given by the customer in the form of computer data, then the circuit board factory utilizes CAM software (genes 2000, CAM350, ucam, v2001, etc.) to revise the PCB original design file provided by the customer according to the production capacity of the factory, and then certain production tools (such as films, drilling belts, gong belts, etc.) are provided for each production process, so that the circuit board meeting the customer requirements can be conveniently produced by the factory. However, in the face of optimization of the cross pad, the cross pad after optimization often does not conform to the specifications in the original design file of the PCB, so that quality hidden danger occurs to customer products. The automatic optimization method for the PCB cross bonding pad aims at solving the problems.
As shown in fig. 1 to 12, the automatic optimization method for the cross pad of the PCB according to the embodiment of the present invention includes the following steps:
s01, integrating a circuit layer copper sheet: and eliminating the negativity of the original PCB file, and integrally integrating the copper sheets to form an initial circuit layer.
The graphics in the original PCB file comprise two attributes, namely a positive attribute and a negative attribute, which correspond to the positive graphic and the negative graphic respectively. Positive graphics are graphics for normal display, and negative graphics are graphics for dismissal display. The negative pattern in the original PCB file can be cleared by CAM software, leaving only the positive pattern. The method can prevent interference caused by negative superposition of patterns in the copper sheet of the bonding pad of the step S04 and the copper sheet of the step S05, and influence the accuracy of the pattern attribute after the negative superposition of the patterns.
S02, cutting and copying a circuit layer copper sheet: and cutting copper sheets in the initial circuit layer, determining the initial circuit layer after cutting the copper sheets as a first circuit layer, copying the cut copper sheets to form a second circuit layer, and copying the second circuit layer to form a third circuit layer.
The method includes the steps of firstly screening the attribute of each area in an initial circuit layer to determine the copper sheet area in the initial circuit layer. The copper skin region refers to the region of the wiring layer with copper removed from the traces and pads. It can be seen from this step that the initial circuit layer is a circuit layer including copper sheet, trace and pad, the first circuit layer is a circuit layer including only trace and pad, the second circuit layer is a circuit layer including only copper sheet, and the third circuit layer is a circuit layer including only copper sheet.
S03, determining a pad to be optimized: and copying the bonding pad to be optimized in the first circuit layer, forming a fourth circuit layer, and enlarging the bonding pad of the fourth circuit layer.
The step needs to screen the cross bonding pads in the first circuit layer first, and the screened cross bonding pads are determined to be bonding pads to be optimized. Further, when the bonding pad of the fourth circuit layer is enlarged, the process requirement of the factory may be determined first, then the bonding pad enlarging value may be determined according to the process requirement of the factory, and the bonding pad of the fourth circuit layer may be enlarged according to the bonding pad enlarging value. The process requirements of the factory include conventional process requirements which are process requirements that can be met in the PCB space and non-conventional process requirements which are process requirements that cannot be met in the PCB space. When determining the pad increasing value according to the process requirement of a factory, preferentially selecting the conventional process requirement, and determining the pad increasing value according to the conventional process requirement if the conventional process requirement meets the design requirement; if the conventional process requirements do not meet the design requirements, determining a pad enlargement value according to the non-conventional process requirements. As can be seen from this step, the fourth line layer is a line layer containing only pads to be optimized.
The design of the cross bonding pad comprises a first interval A, a second interval B and a third interval C. The first interval A is the opening width of the cross bonding pad, the second interval B is the distance between the inner side of the cross connecting position and the edge of the center via hole, and the third interval C is the width of the cross connecting position. In conventional process requirements, the first spacing is set to 12 mils, the second spacing is set to 10 mils, and the third spacing is set to 10 mils. In non-conventional process requirements, the first spacing is set to 8 mils, the second spacing is set to 8 mils, and the third spacing is set to 8 mils.
S04, copper is drawn out of the bonding pad: and superposing the fourth circuit layer with the second circuit layer by using the negative attribute to form a fifth circuit layer, and eliminating the negative property of the fifth circuit layer.
After the fourth circuit layer and the second circuit layer are overlapped, an overlapping area of the copper sheet and the enlarged bonding pad appears on the fifth circuit layer. Because the fourth circuit layer is overlapped by the negative property, after the negative property of the fifth circuit layer is eliminated, not only the negative overlapped bonding pad on the fifth circuit layer can be eliminated, but also the copper sheet property of the overlapped area of the negative overlapped bonding pad in the fifth circuit layer can be simultaneously removed. It can be seen from this step that the fifth circuit layer is a circuit layer only including copper sheet, and a part of copper sheet therein is removed.
S05, stacking copper sheets: and superposing the fifth circuit layer with the third circuit layer by negative property to form a sixth circuit layer, and eliminating the negative property of the sixth circuit layer.
The third circuit layer includes a complete copper sheet, and after the fifth circuit layer and the third circuit layer are stacked in this step, an overlapping area of the complete copper sheet (the copper sheet of the third circuit layer) and the removed copper sheet (the copper sheet of the fifth circuit layer) appears on the sixth circuit layer. Because the fifth circuit layer is overlapped by negative property, after the negative property of the sixth circuit layer is eliminated, the overlapping area between the complete copper sheet and the copper sheet after the copper sheet is removed can be removed, and the copper sheet property of the overlapping area of the rear bonding pad in the step of removing copper from the S04 bonding pad is only reserved. It can be seen from this step that the sixth wiring layer is a wiring layer containing only copper sheet, and a part of the copper sheet is removed. And combining the copper sheet in the fifth circuit layer with the copper sheet in the sixth circuit layer to form the complete copper sheet.
S06 clear fine line width: detecting the fine line width of the sixth circuit layer, and reducing and amplifying the whole copper sheet of the sixth circuit layer according to the fine line width so as to remove the fine line width.
The fine line width is smaller than 2mil, and is the position on the cross bonding pad where the gap needs to be enlarged. After the whole copper sheet of the sixth circuit layer is reduced and enlarged, the copper sheet at the position with the small line width is removed and the copper sheets at other positions are reserved based on the characteristic that the small copper sheet of the CAM software disappears after being reduced. Through the step, the width of the cross connection position in the cross bonding pad is not reduced, but the gap of the cross bonding pad is increased, so that unified treatment can be realized. It can be seen from this step that the copper sheet in the sixth wiring layer was subjected to double removal. The first removal is realized by eliminating the negativity of the sixth circuit layer in the step of S05 copper sheet stacking, and the second removal is realized by eliminating the tiny line width in the step.
S07 integrated copper sheet properties: and superposing the fifth circuit layer and the sixth circuit layer with positive properties to form a seventh circuit layer so as to complete the integration of copper sheet properties.
The seventh circuit layer is a circuit layer only containing copper sheets, the copper sheets in the seventh circuit layer are not complete copper sheets, and compared with the complete copper sheets, the missing part corresponds to the area where the copper sheets are removed secondarily in the step of removing the fine line width in S06.
S08, detecting a circuit layer: and carrying out quality detection on the seventh circuit layer to ensure that the seventh circuit layer meets merging conditions.
The quality detection of the seventh circuit layer comprises detecting whether the cross connection bit gap in the seventh circuit layer meets the process requirements of a factory. Further, performing quality detection on the seventh line layer further includes: and detecting whether the cross connection bit gap in the seventh circuit layer meets the design requirement of the original PCB file. Only if the cross connection bit gap in the seventh circuit layer meets the process requirement of the factory and the cross connection bit gap in the seventh circuit layer meets the design requirement of the original PCB file, the seventh circuit layer can be ensured to meet the merging condition of the merging circuit layer in step S09.
S09 merge line layer: and combining the first circuit layer and the seventh circuit layer to finish optimization of the cross bonding pad.
After the first circuit layer and the seventh circuit layer are combined, the generated optimized circuit layer comprises a wiring, a bonding pad and a copper sheet, so that the cross bonding pad is optimized.
Compared with the automatic optimization method for the PCB cross bonding pad in the prior art, the automatic optimization method for the PCB cross bonding pad in the embodiment of the invention has obvious improvement in the aspects of optimization efficiency and optimization quality. According to the automatic optimization method for the cross bonding pads of the PCB in the prior art, each cross bonding pad needs to be optimized in sequence, the average time for automatic optimization of each cross bonding pad is 0.5 minute, and the overall optimization of the cross bonding pads is very time-consuming due to the fact that the number of the cross bonding pads is large, so that the optimization efficiency is low. The time consumption of the automatic optimization method for the PCB cross bonding pads is not influenced by the number of the cross bonding pads, the average time consumption is 3 minutes, the optimization time consumption is equal to that of the prior art when the number of the cross bonding pads is 6, and the more the number of the cross bonding pads is, the more obvious the advantage of the automatic optimization method for the PCB cross bonding pads is.
The embodiment of the invention also provides electronic equipment which comprises a processor, wherein the processor is used for executing the PCB cross bonding pad automatic optimization method.
The embodiment of the invention also provides a PCB, which comprises the cross bonding pad, and the cross bonding pad is manufactured according to the PCB cross bonding pad automatic optimization method.
According to the embodiment of the invention, firstly, the copper sheet of the circuit layer is duplicated and backed up, the cross connection position to be optimized is screened out, then, the copper sheet of the cross connection position is rapidly optimized in a negative copper sheet overlapping mode by cutting the distance between the bonding pad and the copper sheet, the cross connection position after optimization is obtained, the cross connection position of the PCB can be rapidly and automatically processed by the series of means, the CAM processing efficiency is improved, the risk that the CAM mistakenly reduces the line width of the cross connection position or fills up gaps, the problems can occur when the client is attached is reduced, the client satisfaction degree and quality assurance are improved, the gap optimization is increased, the board yield is improved during production, and the production rejection rate is reduced.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. An automatic optimization method for a cross bonding pad of a PCB, which is characterized by comprising the following steps:
integrating the circuit layer copper sheet: eliminating the negativity of the original PCB file, and integrating the copper sheets integrally to form an initial circuit layer;
cutting and copying the copper sheet of the circuit layer: cutting copper sheets in the initial circuit layer, determining the initial circuit layer after cutting the copper sheets as a first circuit layer, copying the cut copper sheets to form a second circuit layer, and copying the second circuit layer to form a third circuit layer;
determining a pad to be optimized: copying a bonding pad to be optimized in the first circuit layer to form a fourth circuit layer, and enlarging the bonding pad of the fourth circuit layer;
copper is drawn on the bonding pad: superposing the fourth circuit layer with the second circuit layer by negative property to form a fifth circuit layer, and eliminating the negative property of the fifth circuit layer;
copper sheet lamination: superposing the fifth circuit layer with the third circuit layer by negative property to form a sixth circuit layer, and eliminating the negative property of the sixth circuit layer;
and (3) removing fine linewidth: detecting the fine line width of the sixth circuit layer, and reducing and amplifying the whole copper sheet of the sixth circuit layer according to the fine line width so as to remove the fine line width;
integrating copper sheet properties: superposing the fifth circuit layer and the sixth circuit layer with positive properties to form a seventh circuit layer so as to complete the integration of copper sheet properties;
detecting a circuit layer: performing quality detection on the seventh circuit layer to ensure that the seventh circuit layer meets merging conditions;
merging circuit layers: and combining the first circuit layer and the seventh circuit layer to finish optimization of the cross bonding pad.
2. The method of claim 1, wherein the quality testing of the seventh line layer comprises:
and detecting whether the gap of the cross connection bit in the seventh circuit layer meets the process requirements of a factory.
3. The method of claim 2, wherein the quality testing of the seventh line layer further comprises:
and detecting whether the cross connection bit gap in the seventh circuit layer meets the design requirement of the original PCB file.
4. The method of claim 1, wherein the enlarging the pads of the fourth wiring layer comprises:
determining the process requirements of a factory;
determining a bonding pad increasing value according to the process requirements of the factory;
and enlarging the bonding pad of the fourth circuit layer according to the bonding pad enlarging value.
5. The method of claim 4, wherein the process requirements include conventional process requirements and non-conventional process requirements, and wherein determining a pad up value based on the process requirements of the factory comprises:
if the conventional process requirements meet the design requirements, determining a pad increase value according to the conventional process requirements;
and if the conventional process requirements do not meet the design requirements, determining a bonding pad increasing value according to the non-conventional process requirements.
6. The method of claim 5, wherein the cross pad comprises a first pitch, a second pitch, and a third pitch, the first pitch being an opening width of the cross pad, the second pitch being a distance between an inner side of a cross connection bit and a center via edge, the third pitch being a width of the cross connection bit;
the conventional process requirements include:
the first pitch is set to 12 mils, the second pitch is set to 10 mils, and the third pitch is set to 10 mils.
7. The method of claim 6, wherein the non-conventional process requirements include:
the first pitch is set to 8 mils, the second pitch is set to 8 mils, and the third pitch is set to 8 mils.
8. The method of claim 1, wherein the fine linewidth is a linewidth of less than 2 mils.
9. An electronic device, characterized in that it comprises a processor for executing the PCB cross pad automatic optimization method according to any one of claims 1 to 8.
10. A PCB characterized in that it comprises cross pads manufactured according to the PCB cross pad automatic optimization method according to any one of claims 1 to 8.
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| CN202410026392.2A CN117560859B (en) | 2024-01-09 | 2024-01-09 | Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB |
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| CN202410026392.2A CN117560859B (en) | 2024-01-09 | 2024-01-09 | Automatic optimization method for PCB cross bonding pad, electronic equipment and PCB |
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| CN117560859B (en) | 2024-04-02 |
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