CN111863964A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN111863964A
CN111863964A CN202010030566.4A CN202010030566A CN111863964A CN 111863964 A CN111863964 A CN 111863964A CN 202010030566 A CN202010030566 A CN 202010030566A CN 111863964 A CN111863964 A CN 111863964A
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廖忠志
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本公开实施例提供半导体装置与其形成方法。在一实施例中，半导体装置包括鳍状物自基板延伸；栅极结构位于通道区上；第一间隔物，沿着栅极结构的下侧部分的侧壁延伸；以及第二间隔物，沿着栅极结构的上侧部分的侧壁延伸。鳍状物包括通道区以及与通道区相邻的源极/漏极区。栅极结构包括上侧部分与下侧部分。第二间隔物位于第一间隔物的上表面上。第一间隔物的组成为一第一介电材料，第二间隔物的组成为第二介电材料，且第一介电材料与第二介电材料不同。

Description

半导体装置
技术领域
本发明实施例涉及半导体装置结构与其形成方法，更特别涉及高效能的半导体装置结构与其形成方法。
背景技术
电子产业对更小且更快的电子装置的需求持续增加，而电子装置可同时支援大量复杂功能。综上所述，半导体产业的持续趋势为制作低成本、高效能、与低能耗的集成电路。这些目标的实现方式主要为缩小半导体集成电路尺寸(如最小结构尺寸)，以改善产能并降低相关成本。然而尺寸缩小亦增加半导体工艺的复杂度。为实现半导体集成电路与装置的持续进展，半导体工艺与技术亦须类似进展。
近来导入多栅极装置以增加栅极-通道耦合、降低关闭状态电流、并减少短通道效应，以改善栅极控制。多栅极装置之一为鳍状场效晶体管。鳍状场效晶体管的名称来自由基板延伸并形成于基板上的鳍状结构，其可用于形成场效晶体管通道。鳍状场效晶体管可与现有的互补式金属氧化物半导体工艺相容，其三维结构在大幅减少尺寸时可维持栅极控制并缓解短通道效应。即使导入鳍状场效晶体管，大幅缩小的集成电路尺寸造成寄生电容增加(比如鳍状场效晶体管的栅极与源极/漏极区或源极/漏极接点之间的寄生电容)。寄生电容会劣化装置效能。因此现有技术未完全符合所有方面的需求。
发明内容
本发明一实施例提供的半导体装置，包括：鳍状物，自基板延伸，且鳍状物包括通道区以及与通道区相邻的源极/漏极区；栅极结构，位于通道区上，且栅极结构包括上侧部分与下侧部分；第一间隔物，沿着栅极结构的下侧部分的侧壁延伸；以及第二间隔物，沿着栅极结构的上侧部分的侧壁延伸，其中第二间隔物位于第一间隔物的上表面上，其中第一间隔物的组成为第一介电材料，第二间隔物的组成为第二介电材料，且第一介电材料与第二介电材料不同。
本发明一实施例提供的半导体装置，包括：鳍状物，自基板延伸，且鳍状物包括通道区以及与通道区相邻的源极/漏极区；栅极结构，位于通道区上，且栅极结构包括上侧部分与下侧部分；栅极顶部介电层，位于栅极结构上；第一间隔物，沿着栅极结构的下侧部分的侧壁延伸；以及第二间隔物，沿着栅极结构的上侧部分的侧壁延伸，其中第二间隔物堆叠于第一间隔物的上表面上；其中第二间隔物接触栅极顶部介电层，且第一间隔物与栅极顶部介电层隔开。
本发明一实施例提供的半导体装置的制作方法，包括：接收工件，且工件包括：基板；鳍状物，自基板延伸，且鳍状物包括通道区以及与通道区相邻的源极/漏极区；栅极结构，位于通道区上；以及沿着栅极结构的侧壁形成第一间隔物；移除第一间隔物的上侧部分；形成源极/漏极结构于源极/漏极区上；以及形成第二间隔物于第一间隔物与源极/漏极结构的一部分上。
附图说明
图1是本发明多种实施例中，鳍状场效晶体管装置的上视图。
图2a、图3a、图4a、与图5a是本发明多种实施例中，图1中的鳍状场效晶体管装置沿着剖面X1-X1’的剖视图。
图2b、图3b、图4b、与图5b是本发明多种实施例中，图1中的鳍状场效晶体管装置沿着剖面X2-X2’的剖视图。
图6是本发明一些实施例中，含有堆叠栅极间隔物的半导体装置的制作方法的流程图。
附图标记说明：
H1 第一高度
H2 第二高度
H3 第三高度
H4 第四高度
T1 第一厚度
T2 第二厚度
T3 第三厚度
T4 第四厚度
X1-X1’、X2-X2’ 剖面
10 工件
100 鳍状场效晶体管装置
102 基板
104N n型井
104P p型井
106 隔离区
108 鳍状物
109 源极/漏极结构
110 栅极结构
111 金属层
112 第一间隔物
114 栅极介电层
116 第二间隔物
117 气隙
118 源极/漏极接点
120 栅极介电盖层
122 介电栅极
124 栅极末端介电层
126 第一层间介电层
128 栅极接点通孔
129 源极/漏极接点通孔
130 金属线路
132 第二层间介电层
200 方法
202、204、206、208、210、212、214、216、218 步骤
1100 通道区
1200 源极/漏极区
具体实施方式
下述内容提供的不同实施例或实例可实施本公开的不同结构。特定构件与排列的实施例是用以简化本公开而非局限本公开。举例来说，形成第一构件于第二构件上的叙述包含两者直接接触，或两者之间隔有其他额外构件而非直接接触。此外，本公开的多种例子中可重复标号，但这些重复仅用以简化与清楚说明，不代表不同实施例及/或设置之间具有相同标号的单元之间具有相同的对应关系。
此外，空间性的相对用语如“下方”、“其下”、“较下方”、“上方”、“较上方”、或类似用语可用于简化说明某一元件与另一元件在图示中的相对关系。空间性的相对用语可延伸至以其他方向使用的元件，而非局限于图示方向。元件亦可转动90°或其他角度，因此方向性用语仅用以说明图示中的方向。
值得注意的是，本发明实施例的形式为多栅极晶体管或鳍状多栅极晶体管，在此处称作鳍状场效晶体管装置。此装置可包含p型金属氧化物半导体鳍状场效晶体管装置，或n型金属氧化物半导体鳍状场效晶体管装置。鳍状场效晶体管装置可为双栅极装置、三栅极装置、基体装置、绝缘层上硅装置、及/或其他设置。本技术领域中技术人员应理解半导体装置的其他实施例可得利于本发明实施例。举例来说，此处所述的其他实施例亦可用于全绕式栅极装置、Ω-栅极装置、或Π-栅极装置。
本发明实施例关于半导体装置结构与其形成方法，更特别关于高效能的半导体装置结构与其形成方法。随着栅极间距缩小，形成半导体装置的现有工艺面临可加大工艺失误容许范围并降低电容的厚栅极间隔物，以及可加大源极/漏极结构所用空间的薄栅极间隔物之间的两难选择。当栅极间隔物薄，稍微对不准就可能造成源极/漏极接点接触栅极结构，造成短路与装置失效。当栅极间隔物的厚度增加以避免栅极结构与源极/漏极接点之间的短接，较厚的栅极间隔物留下较少的空间以形成源极/漏极结构(其可具有较高的掺质浓度或高应变)。与此同时，厚栅极间隔物可减少源极/漏极接点的着陆面积，而薄栅极间隔物可能被源极/漏极的凹陷击穿而降低装置可信度，端视装置设计而定。本发明实施例的半导体结构包括第一间隔物于栅极结构的下侧部分的侧壁上，以及堆叠于第一间隔物的上表面上的第二间隔物。第一间隔物与第二间隔物可具有不同厚度、不同组成、与不同的介电常数，使栅极间隔物设置的水平对应源极/漏极结构，而另一栅极间隔物设置的水平对应源极/漏极接点。
图1是工件10上的鳍状场效晶体管装置100的上视图。鳍状场效晶体管装置100包含一或多个鳍状物为主的多栅极场效晶体管。虽然本发明实施例采用图1中的鳍状场效晶体管装置100举例说明，本发明实施例并不限于此且可应用于其他种类的场效晶体管，比如本发明图示的鳍状物以外的半导体结构。图2a、图3a、图4a、与图5a为鳍状场效晶体管装置100沿着剖面X1-X1’的剖视图。图2b、图3b、图4b、与图5b为鳍状场效晶体管装置100沿着剖面X2-X2’的剖视图。
如图1、图2a、与图2b所示，工件10上的鳍状场效晶体管装置100包含基板102、自基板102延伸的至少一鳍状物(或鳍状单元)108、隔离区106、以及位于鳍状物108之上与周围的栅极结构110。基板102可为半导体基板如硅基板。基板102可包含多种层状物，包含形成于半导体基板上的导电层或绝缘层。基板102可包含多种掺杂设置，端视本技术领域已知的设计需求而定。举例来说，鳍状场效晶体管装置100可包含n型井104N与p型井104P。在一些实施例中，n型井104N可包含n型掺质如砷或磷，而p型井104P可包含p型掺质如硼。在一些实施方式中，一或多个p型鳍状场效晶体管可形成于n型井104N中，且一或多个n型鳍状场效晶体管可形成于p型井104P中。由于剖面X1-X1’与X2-X2’均穿过p型井104P，图2a至图5a与图2b至图5b仅显示p型井104P的剖视图。
基板102亦可包含其他半导体如锗、碳化硅、硅锗、或钻石。在其他实施例中，基板102可包含半导体化合物及/或半导体合金。此外，一些实施例的基板102可包含外延层、可具有应力以增进效能、可包含绝缘层上半导体结构、及/或其他合适的增进结构。
鳍状物108与基板102类似，可包含硅或另一半导体元素如锗、半导体化合物(包含碳化硅、砷化镓、磷化镓、磷化铟、砷化铟、及/或锑化铟)、半导体合金(包含硅锗、磷砷化镓、砷化铝铟、砷化铝镓、砷化镓铟、磷化镓铟、及/或磷砷化镓铟)、或上述的组合。鳍状物108的制作方法可采用合适工艺，包括光微影与蚀刻工艺。光微影工艺可包含形成光刻胶层于基板102上(比如形成于硅层上)、曝光光刻胶至一图案、进行曝光后烘烤工艺、以及显影光刻胶以形成含光刻胶的遮罩单元。在一些实施例中，图案画光刻胶以形成遮罩单元的方法可采用电子束微影工艺。接着在形成凹陷至基板102中的蚀刻工艺时，采用遮罩单元保护基板102的区域，以保留延伸的鳍状物108。凹陷的蚀刻方法可采用干蚀刻(如化学氧化物移除)、湿蚀刻、及/或其他合适工艺。亦可采用多种方法的其他实施例以形成鳍状物108于基板102上。
多个鳍状物108的每一者亦包含源极/漏极区1200，即位于鳍状物108上、与鳍状物108相邻、及/或围绕鳍状物108的源极/漏极结构109(未图示于图1中，但图示于图2a与图2b中)。值得注意的是在场效晶体管如鳍状场效晶体管装置100中，通道区1100夹设于源极/漏极区1200之间。为了方便说明，通道区1100的不同侧上的源极区与漏极区通常视作图1中的源极/漏极区1200。源极/漏极结构109可外延成长于鳍状物108上。通道区1100位于栅极结构110下的鳍状物108中，且沿着图1中的X方向延伸。由图1的上视图可知，栅极结构110延伸于鳍状物108的通道区1100上。在一些例子中，鳍状物108的通道区1100包含硅与高迁移率材料如锗，以及任何上述的半导体化合物或半导体合金及/或上述的组合。高迁移率材料的电子移动率大于硅，硅在室温如300K下的固有电子移动率为约1350cm2/V-s，而电动移动率为约480cm2/V-s。
隔离区106可为浅沟槽隔离结构。在其他实施例中，可实施场氧化物、局部氧化硅结构、及/或其他合适的隔离结构于基板102之上及/或之中。隔离区106的组成可为氧化硅、氮化硅、氮氧化硅、掺杂氟的硅酸盐玻璃、低介电常数的介电层、上述的组合、及/或本技术领域已知的其他合适材料。在一实施例中，隔离结构为浅沟槽隔离结构，其形成方法可为蚀刻沟槽至基板102中。接着可将隔离材料填入沟槽，再进行化学机械研磨工艺。然而其他实施例亦属可能。在一些实施例中，隔离区106可包含多层结构。
栅极结构110包含的栅极堆叠具有栅极介电层114(未图示于图1中，但图示于图2a与图2b中)，以及形成于栅极介电层114上的金属层111(栅极，未图示于)图1中，但图示于图2a与图2b中)。在一些实施例中，栅极介电层114可包含界面层(interfacial layer)形成于鳍状物108的通道区1100与界面层上的高介电常数介电层之间。栅极介电层114的界面层可包含介电材料如氧化硅层或氮氧化硅层。栅极介电层114的高介电常数介电层可包含氧化铪、氧化钛、氧化铪锆、氧化钽、氧化铪硅、氧化锆、氧化锆硅、上述的组合、或其他合适材料。栅极介电层114的形成方法可为化学氧化、热氧化、原子层沉积、物理气相沉积、化学气相沉积、及/或其他合适方法。金属层111可包含导电层如钨、氮化钛、氮化钽、氮化钨、铼、铱、钌、钼、铝、铜、钴、镍、上述的组合、及/或其他合适组成。在一些实施例中，金属层111可包含适用于n型鳍状场效晶体管的第一组金属材料，与适用于p型鳍状场效晶体管的第二组金属材料。因此鳍状场效晶体管装置100可包含双功函数金属栅极设置。举例来说，用于n型装置的第一金属材料可包含的金属，其功函数实质上对准基板的导带功函数，或至少实质上对准鳍状物108的通道区1100的导带功函数。类似地，p型装置所用的第二金属材料可包含的金属，其功函数实质上对准基板的价带功函数，或至少实质上对准鳍状物108的通道区1100的价带功函数。因此金属层111可作为鳍状场效晶体管装置100(包括形成于p型井104P上的n型鳍状场效晶体管装置与形成于n型井104N上的p型鳍状场效晶体管装置)所用的栅极。金属层111的形成方法可采用物理气相沉积、化学气相沉积、电子束蒸镀、及/或其他合适工艺。
在一些实施例中，置换栅极工艺(或栅极置换工艺)可用于形成栅极结构110。在置换栅极工艺中，先形成半导体材料如多晶硅组成的牺牲栅极结构或虚置栅极结构于鳍状物108的通道区1100上，以作为之后形成的最终栅极结构(如栅极结构110)所用的占位物。在制作虚置栅极结构周围的结构之后，可移除虚置栅极结构并取代为最终栅极结构(比如栅极结构110与栅极介电层114)。当采用置换栅极工艺时，可形成多个栅极间隔物(如图2a与图2b中的第一间隔物112与第二间隔物116)于虚置栅极上。后续阶段可移除虚置栅极结构的上表面上的栅极间隔物，以利露出并移除虚置栅极结构。在图2a与图2b所示的一些实施例中，形成第一间隔物112与第二间隔物116以覆盖虚置栅极结构的侧壁。在虚置栅极结构置换为衬垫有栅极介电层114的栅极结构110之后，第一间隔物112与第二间隔物116以类似方式覆盖栅极结构110的侧壁并接触栅极介电层114。第一间隔物112与第二间隔物116可包含介电材料如氧化硅、氮化硅、碳化硅、氮氧化硅、碳氧化硅、碳氮化硅、碳氮氧化硅、或上述的组合。在一些实施例中，在形成源极/漏极结构109之后沉积第二间隔物116，且第二间隔物116可位于源极/漏极结构109的一部分上，如图2b所示。
鳍状场效晶体管装置100可包含多种隔离结构，以定义鳍状场效晶体管装置100的次单位。在图1、图2a、与图2b所示的一些实施例中，鳍状场效晶体管装置100包含一或多个栅极末端介电层124与一或多个介电栅极122。在一些实施例中，栅极末端介电层124的形成方法可采用栅极切割工艺，其包含形成栅极切割沟槽，并将介电材料填入栅极切割沟槽中。在这些实施例中，栅极末端介电层124亦可称作栅极切割结构。介电栅极122用于将鳍状物108分成两个部位，且可称作通道隔离结构。介电栅极122与栅极末端介电层124的组成均为介电材料，且可定义鳍状场效晶体管装置100的次单位(sub-unit)如单元(cell)。介电栅极122与栅极末端介电层124可包含氧化硅、氮化硅、碳化硅、氮氧化硅、碳氧化硅、碳氮化硅、碳氮氧化硅、氧化铝、氮氧化铝、氮化铝、氧化锆、氮氧化锆铝、氮化铝、非晶硅、或上述的组合。
在一些实施例中，为避免后续工艺蚀刻或氧化金属层111，可形成栅极介电盖层120于栅极结构110上，包括形成于第二间隔物116、栅极介电层114、与金属层111的上表面上。栅极介电盖层120的组成可为介电材料如氧化硅、氮化硅、碳化硅、氮氧化硅、碳氧化硅、碳氮化硅、碳氮氧化硅、或上述的组合。栅极介电盖层120的形成方法可采用化学气相沉积、原子层沉积、等离子体辅助化学气相沉积、等离子体辅助原子层沉积、或其他合适技术。在图2a与图2b所示的实施例中，以栅极结构110置换虚置栅极结构，并以合适技术如化学机械研磨平坦化工件10的上表面之后，才形成栅极介电盖层120。
如图1、图2a、与图2b所示，鳍状场效晶体管装置100亦可包含一或多个接点结构与内连线结构，以电性连接鳍状场效晶体管装置100至其他鳍状场效晶体管装置或被动装置(比如工件10的其他部分中的电容、电感、或天线结构)。举例来说，鳍状场效晶体管装置100可包含源极/漏极接点118以电性耦接至源极/漏极结构109、源极/漏极接点通孔129以电性耦接至源极/漏极接点118、栅极接点通孔128以电性耦接至栅极结构110、以及金属线路130以电性耦接至栅极接点通孔128与源极/漏极接点通孔129。这些接点结构与内连线结构形成于一或多个层间介电层(如第一层间介电层126与第二层间介电层132)之中或穿过一或多个层间介电层。在图2a与图2b所示的实施例中，栅极接点通孔128位于第一层间介电层126中，源极/漏极接点通孔129位于第一层间介电层126中，且金属线路130位于第二层间介电层132中。
如图2a与图2b所示，第一间隔物112沿着X方向具有第一厚度T1，且第二间隔物116沿着X方向具有第二厚度T2。在一些实施例中，第一厚度T1小于第二厚度T2，可提供更多空间以用于形成源极/漏极结构109，并避免源极/漏极接点118与栅极结构110之间的桥接。形成源极/漏极结构109的关键为空间是否足够。在n型装置中，可形成n型掺杂浓度逐渐增加的多个外延层，以降低源极/漏极接点电阻，而第一间隔物112的第一厚度T1够薄，以提供多个外延层所需的空间。在p型装置中，需要空间以累积足够的内建应变于应变的硅锗外延结构中。在一些实施方式中，第二厚度T2与第一厚度T1的比例(T2/T1)介于约1.05至约1.5之间。第一间隔物112与第二间隔物116的组成可为氧化硅、氮氧化硅、碳氧化硅、或碳氮氧化硅。在一些实施例中，第一间隔物112与第二间隔物116的组成不同以具有不同特性。在一些实施方式中，第二间隔物116包含的第一介电常数大于第一间隔物112的第二介电常数。在这些实施方式中，第一间隔物112与第二间隔物116包含碳氮氧化硅或碳氮化硅，且第二间隔物116的碳浓度大于第一间隔物112的碳浓度。在一些实施例中，第一间隔物112包含沿着Z方向的第一高度H1，而第二间隔物116包含沿着Z方向的第二高度H2。在一些例子中，第一高度H1实质上对应源极/漏极结构109的高度，其介于约30nm至约70nm之间，使较小的第一厚度T1提供更多空间以用于源极/漏极结构109。第二高度H2实质上对应栅极结构110的鳍状物顶部高度(比如隆起高于鳍状物108的栅极结构110的部分)，其介于约6nm至约30nm之间。
在一些实施例中，第二间隔物116可包含超过一个介电层。在一些实施方式中，第二间隔物116可包含三层结构，其包含低介电常数介电层夹设于两个高介电常数介电层之间。此处所述的低介电常数的介电层的介电常数小于4，而高介电常数的介电层的介电常数大于4。在一些例子中，夹设于两个高介电常数的介电层之间的低介电常数的介电层可为气隙117。在这些例子中，沉积三层于虚置栅极结构(或栅极结构110)上，其含有第一材料的中间层夹设于第二材料的两个外侧层之间，且可由平坦化或凹陷工艺露出中间层，再选择性地移除中间层。在一例中，三层可包含多晶硅层夹设于两个氧化硅层之间。在另一例中，三层可包含氮化硅层夹设于两个氧化硅层之间。为了密封移除中间层所形成的气隙117，可形成密封层于开口上。在一些例子中，未形成密封层，而是由层间介电层密封气隙。在一些实施例中，栅极介电盖层120可作为密封层以密封气隙117。采用气隙与其他低介电常数介电层，可降低源极/漏极接点118与栅极结构110之间的寄生电容。在一些实施例中，第二间隔物116包括气隙117，且第一间隔物112不含任何气隙。值得注意的是，虽然只有图2a与图2b的实施例显示气隙117，图3a、图3b、图4a、图4b、图5a、与图5b所示的实施例亦可实施气隙。
如图3a与图3b所示的一些其他实施例，栅极介电盖层120形成于第二间隔物116之间的栅极结构110上，包含形成于栅极介电层114与金属层111上。在一些例子中，图3a与图3b中的栅极介电盖层120可称作第一自对准接点介电层。在这些其他实施例中，在形成第二间隔物116并将虚置栅极结构置换成含有栅极介电层114与金属层111的栅极结构110之后，选择性地使栅极结构110凹陷而实质上不蚀刻第二间隔物116。之后沉积栅极介电盖层120于工件10上，包括形成于凹陷中。栅极介电盖层120的组成与形成工艺可与图2a与图2b所示的上述实施例类似。以合适平坦化工艺如化学机械研磨移除上表面之上的多余材料之后，形成图3b所示的栅极介电盖层120。
如图3a与图3b所示的一些实施例，第一间隔物112沿着X方向具有第一厚度T1，而第二间隔物116沿着X方向具有第二厚度T2。在一些实施例中，第一厚度T1小于第二厚度T2，可提供更多空间以用于形成源极/漏极结构109，并避免源极/漏极接点118与栅极结构110之间的桥接。在一些实施方式中，第二厚度T2与第一厚度T1的比例(T2/T1)介于约1.05至约1.5之间。在这些实施例中，第一间隔物112包括沿着Z方向的第三高度H3，而第二间隔物116包括沿着Z方向的第四高度H4。在一些例子中，第三高度H3实质上对应源极/漏极结构109的高度，因此较小的第一厚度T1可提供更多空间用以形成源极/漏极结构109。第四高度H4实质上对应源极/漏极接点118沿着Z方向的高度。源极/漏极结构109的高度可介于约30nm至约70nm之间。源极/漏极接点118的高度可介于约10nm至约50nm之间。
如图4a与图4b所示的一些其他实施例中，栅极介电盖层120形成于第二间隔物116、栅极介电层114、与金属层111的上表面上，如图2a与图2b所示的实施例。栅极介电盖层120可由类似材料与类似方法形成，此处不重述以简化说明。在图4a与图4b所示的实施例中，第一间隔物112具有沿着X方向的第三厚度T3，而第二间隔物116具有沿着X方向的第四厚度T4。在一些实施例中，第四厚度T4小于第三厚度T3，以加大源极/漏极接点118的着陆面积，并确保栅极结构110与源极/漏极结构109之间的隔离层的完整性与可信度。在一些实施方式中，第三厚度T3与第四厚度T4的比例(T3/T4)介于约1.05至约1.5之间。在这些实施例中，第一间隔物112沿着Z方向具有第一高度H1，而第二间隔物116沿着Z方向具有第二高度H2。在一些例子中，第一高度H1实质上对应源极/漏极结构109的高度，且介于约30nm至约70nm之间。第二高度H2实质上对应栅极结构110的鳍状物顶部高度，且介于约5nm至约30nm之间。
在图5a与图5b所示的实施例中，栅极介电盖层120形成于第二间隔物116之间的栅极结构110上，包括形成于栅极介电层114与金属层111上。在一些例子中，图5a与图5b中的栅极介电盖层120可称作第一自对准接点介电层。在这些实施例中，第一间隔物112具有沿着X方向的第三厚度T3，而第二间隔物116具有沿着X方向的第四厚度T4。在一些实施例中，第四厚度T4小于第三厚度T3，以加大源极/漏极接点118的着陆面积，并确保栅极结构110与源极/漏极结构109之间的隔离层的可信度与完整性。在一些实施方式中，第三厚度T3与第四厚度T4的比例(T3/T4)介于约1.05至约1.5之间。在这些实施例中，第一间隔物112包括沿着Z方向的第三高度H3，而第二间隔物116包括沿着Z方向的第四高度H4。在一些例子中，第三高度H3实质上对应源极/漏极结构109的高度，因此较大的第三厚度T3可确保栅极结构110与源极/漏极结构109之间的隔离层的可信度与完整性。第四高度H4实质上对应源极/漏极接点118沿着Z方向的高度，因此较小的第四厚度H4可提供空间形成较大的源极/漏极接点118，以改善连接并加大着陆面积。在一些实施例中，源极/漏极结构109的高度介于约30nm至约70nm之间。源极/漏极接点118的高度介于约10nm至约50nm之间。
在图5a与图5b所示的实施例中，第二间隔物116接触源极/漏极接点118。在其他实施例中，以阻障层衬垫源极/漏极接点118，可阻挡氧自第二间隔物116扩散。此第二间隔物116接触阻障层，而非接触源极/漏极接点118的金属填充材料。在一些实施方式中，阻障层包含金属氮化物如氮化钛、氮化钽、氮化钨、氮化钴、或类似物。
图6是本发明实施例中，制作半导体装置如鳍状场效晶体管装置100的方法200。方法200仅为举例，而非局限本发明实施例至相关申请文件未实际记载处。在方法200之前、之中、与之后可进行额外步骤，且方法200的额外实施例可置换、省略、或调换一些所述步骤。
方法200包含步骤202、204、206、208、210、212、214、216、与218。在步骤202中，提供工件，且工件包括鳍状物位于基板上，以及栅极结构位于鳍状物上。值得注意的是，当采用栅极置换工艺时，此阶段的栅极结构可为虚置栅极结构而非功能栅极结构或最终栅极结构。在步骤204中，沉积第一间隔物于工件上，且第一间隔物沿着栅极结构的侧壁。在步骤206中，回蚀刻第一间隔物或使第一间隔物凹陷，以露出鳍状物的源极/漏极区。在步骤208中，形成源极/漏极结构于鳍状物的源极/漏极区中。在步骤210中，形成介电层于源极/漏极结构与第一间隔物的下侧部分上。举例来说，沉积介电材料于工件上，接着回蚀刻介电材料以形成介电层，其覆盖第一间隔物的下侧部分但露出第一间隔物的上侧部分(其位于第一间隔物的下侧部分上)。在步骤212中，选择性地移除介电层中露出的第一间隔物的上侧部分。在步骤214中，沉积第二间隔物于栅极结构与第一间隔物上。在步骤216中，回蚀刻第二间隔物或使第二间隔物凹陷，以移除栅极结构与源极/漏极结构上的第二间隔物。在步骤218中，进行额外步骤。
方法200的一些实施例将搭配图1、图2a、与图2b说明如下。在一些实施例中，步骤204先沉积第一间隔物112于整个高度的栅极结构110(或之后取代为栅极结构110的虚置栅极)的侧壁上。在步骤206中，接着可由合适的蚀刻技术如干蚀刻回蚀刻、凹陷、或拉回第一间隔物112。在步骤206中，沉积于第一间隔物112于顶面(如栅极结构110之间的隔离区106的上表面)上的第一间隔物112被移除，但沉积于栅极结构110的侧壁上的第一间隔物112被保留，以在后续的步骤208的源极/漏极凹陷步骤时保护栅极结构110。在步骤208中，使鳍状物108的源极/漏极区1200凹陷，接着外延成长源极/漏极结构109于鳍状物108的凹陷的源极/漏极区1200上。在一些实施例中，n型场效晶体管的源极/漏极结构109可包括硅，其可原位掺杂n型掺质如砷或磷。p型场效晶体管的源极/漏极结构109可包括硅与锗，其可原位掺杂p型掺质如硼。在一些实施方式中，可沉积接点蚀刻停止层于源极/漏极结构109上。接点蚀刻停止层可包含半导体的氮化物，其可或可不掺杂碳。
在步骤210中，形成介电层于第一间隔物112的下侧部分与源极/漏极结构109上。在一些例子中，与第一层间介电层126或第二层间介电层132类似的介电材料可沉积于工件10上。接着回蚀刻沉积的介电材料，以形成介电层覆盖第一间隔物112的下侧部分，但露出第一间隔物112的上侧部分。步骤210形成的介电层可作为移除第一间隔物112的上侧部分所用的蚀刻遮罩。
在步骤212中，步骤210形成的介电层未覆盖第一间隔物112的上侧部分，可被选择性移除，且移除方法可为合适的蚀刻技术如干蚀刻或湿蚀刻。在一些实施例中，步骤212移除的第一间隔物112的上侧部分，实质上对应之后形成的源极/漏极接点的高度。源极/漏极接点的高度可介于约10nm至约50nm之间。步骤212所保留的第一间隔物112的下侧部分实质上对应源极/漏极结构109的高度，其可介于约30nm至约70nm之间。在一些实施方式中，在步骤208形成源极/漏极结构109，且步骤212移除第一间隔物112的上侧部分之后，步骤214沉积第二间隔物116于工件10上。在这些实施方式中，第二间隔物116亦沉积于覆盖第一间隔物112的下侧部分的介电层上。在步骤216中，使第二间隔物116凹陷或回蚀刻，将沉积于栅极结构110与介电层的上表面上的第二间隔物116移除。在一些例子中，在开始进行后续工艺之前，可将覆盖第一间隔物112的下侧部分的介电层移除。在其他例子中，介电层可保留成为第一层间介电层126的一部分。
在一例中，如图2a中沿着剖面X1-X1’的剖视图所示，第一间隔物112沿着栅极结构110的侧壁的下侧部分并位于其上，即栅极结构110未包覆鳍状物108处。在另一例中，如图2b中沿着剖面X2-X2’的剖视图所示，只有第二间隔物116高于鳍状物108的上表面，且第一间隔物112不高于鳍状物108的上表面。如图2b所示，第二间隔物116位于源极/漏极结构109的一部分上，如图2b所示，第二间隔物116沉积于源极/漏极结构109的部分上，且源极/漏极结构109形成于第二间隔物116之前。
步骤218中进行的额外步骤可包括形成接点与内连线结构，以电性耦接鳍状场效晶体管装置100与最终装置中的其他主动或被动装置。步骤218可包含形成源极/漏极接点118，其包含使源极/漏极结构109凹陷、沉积一或多个阻障层于凹陷的源极/漏极结构109上、退火阻障层以形成金属硅化物、沉积金属填充层于阻障层上以形成源极/漏极接点118、以及平坦化源极/漏极接点118的上表面。步骤218可包含形成源极/漏极接点通孔129与栅极接点通孔128，其包含沉积第一层间介电层126、形成源极/漏极接点通孔洞与栅极接点通孔洞穿过第一层间介电层126与栅极介电盖层120、沉积阻障层于接点通孔洞中、沉积金属填充层于接点通孔洞中、以及平坦化接点通孔。步骤218亦可包含形成金属线路130，其包含沉积第二层间介电层132、形成金属线路沟槽、沉积阻障层、以及沉积金属填充层于金属线路沟槽中。第二间隔物116可直接接触源极/漏极接点118中的金属填充层或阻障层，端视阻障层是否形成而定。
因此此处所述的多种实施例与现有技术相较，可提供多种优点。应理解的是此处不必说明所有优点、所有实施例不必具有特定优点、且其他实施粒可提供不同优点。举例来说，本发明实施例的半导体结构包含第一间隔物位于栅极结构的下侧部分的侧壁上，以及第二监格钨位于栅极结构的上侧部分的侧壁上。第二间隔物沿着垂直于基板的方向堆叠于第一间隔物上，且半导体结构位于基板上。第一间隔物的高度对应源极/漏极结构的高度，而第二间隔物的高度对应源极/漏极接点的高度。此半导体结构可让第一间隔物与第二间隔物具有不同厚度、不同组成、与不同介电常数以符合不同的设计需求，比如加大着陆面积、降低寄生电容、加大工艺容许范围、改善装置可信度，可提供更多空间以用于形成源极/漏极结构。
因此本发明一实施例提供半导体装置，其包括：鳍状物自基板延伸；栅极结构位于通道区上；第一间隔物，沿着栅极结构的下侧部分的侧壁延伸；以及第二间隔物，沿着栅极结构的上侧部分的侧壁延伸。鳍状物包括通道区以及与通道区相邻的源极/漏极区。栅极结构包括上侧部分与下侧部分。第二间隔物位于第一间隔物的上表面上。第一间隔物的组成为一第一介电材料，第二间隔物的组成为一第二介电材料，且第一介电材料与第二介电材料不同。
在一些实施例中，半导体装置还包括源极/漏极结构位于源极/漏极区上，第二间隔物位于源极/漏极结构的一部分上。在一些实施方式中，第二间隔物包括气隙，且第一间隔物不具有任何气隙。在一些例子中，第一间隔物与第二间隔物掺杂碳。第二间隔物的第二碳浓度大于第一间隔物的第一碳浓度。在一些实施例中，第一间隔物包括第一介电常数，第二间隔物包括第二介电常数，且第二介电常数大于第一介电常数。在一些实施方式中，第一间隔物包括自栅极结构测量的第一厚度T1，且第二间隔物包括自栅极结构测量的第二厚度T2。第一厚度T1与第二厚度T2不同。在一些例子中，第二厚度T2与第一厚度T1的比例(T2/T1)介于约1.05至1.5之间。在一些其他例子中，第一厚度T1与第二厚度T2的比例(T1/T2)介于约1.05至1.5之间。
在另一实施例中，提供半导体装置，其包括：鳍状物自基板延伸；栅极结构位于鳍状物的通道区上；栅极顶部介电层位于栅极结构上；第一间隔物沿着栅极结构的下侧部分的侧壁延伸；以及第二间隔物沿着栅极结构的上侧部分的侧壁延伸。第二间隔物堆叠于第一间隔物的上表面上。第二间隔物接触栅极顶部介电层，且第一间隔物与栅极顶部介电层隔开。鳍状物包括通道区以及与通道区相邻的源极/漏极区，且栅极结构包括上侧部分与下侧部分。
在一些实施例中，栅极顶部介电层的侧壁接触第二间隔物。在一些实施例中，栅极顶部介电层的上表面接触第二间隔物。在一些实施方式中，半导体装置还包括源极/漏极结构位于源极/漏极区上。第二间隔物位于源极/漏极结构的一部分上。在一些例子中，栅极结构包括栅极介电层与栅极，且第一间隔物与第二间隔物接触栅极介电层。在一些实施例中，半导体装置还包括源极/漏极接点电性连接至源极/漏极区上的源极/漏极结构，源极/漏极接点包括阻障层，且阻障层接触第二间隔物。在一些实施方式中，第一间隔物与第二间隔物掺杂碳。第二间隔物的第二碳浓度大于第一间隔物的第一碳浓度。在一些例子中，第一间隔物包括第一介电常数，第二间隔物包括第二介电常数，且第二介电常数大于第一介电常数。在一些实施例中，第一间隔物包括自栅极结构测量的第一厚度T1，第二间隔物包括自栅极结构测量的第二厚度T2，其中第一厚度T1与第二厚度T2不同。
在又一实施例中，提供半导体装置的形成方法。方法包括接收工件。工件包括基板；鳍状物自基板延伸，且鳍状物包括通道区以及与通道区相邻的源极/漏极区；以及栅极结构，位于通道区上。方法还包括沿着栅极结构的侧壁形成第一间隔物；移除第一间隔物的上侧部分；形成源极/漏极结构于源极/漏极区上；以及形成第二间隔物于第一间隔物与源极/漏极结构的一部分上。
在一些实施例中，形成第二间隔物的步骤包括：沉积第一介电层于栅极结构的侧壁上；沉积第二介电层于第一介电层上；沉积第三介电层于第二介电层上；以及移除第二介电层以形成气隙。在一些实施例中，形成第一间隔物的步骤包括沉积第一介电层，形成第二间隔物的步骤包括沉积第二介电层，且第二介电层的碳含量大于第一介电层的碳含量。
上述实施例的特征有利于本技术领域中技术人员理解本公开。本技术领域中技术人员应理解可采用本公开作基础，设计并变化其他工艺与结构以完成上述实施例的相同目的及/或相同优点。本技术领域中技术人员亦应理解，这些等效置换并未脱离本公开构思与范围，并可在未脱离本公开的构思与范围的前提下进行改变、替换、或变动。

Claims (1)

1.一种半导体装置，包括：
一鳍状物，自一基板延伸，且该鳍状物包括一通道区以及与该通道区相邻的一源极/漏极区；
一栅极结构，位于该通道区上，且该栅极结构包括一上侧部分与一下侧部分；
一第一间隔物，沿着该栅极结构的该下侧部分的侧壁延伸；以及
一第二间隔物，沿着该栅极结构的该上侧部分的侧壁延伸，
其中该第二间隔物位于该第一间隔物的上表面上，
其中该第一间隔物的组成为一第一介电材料，该第二间隔物的组成为一第二介电材料，且该第一介电材料与该第二介电材料不同。
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