CN111641095B - 垂直表面安装c型usb连接器 - Google Patents
垂直表面安装c型usb连接器 Download PDFInfo
- Publication number
- CN111641095B CN111641095B CN201911326132.2A CN201911326132A CN111641095B CN 111641095 B CN111641095 B CN 111641095B CN 201911326132 A CN201911326132 A CN 201911326132A CN 111641095 B CN111641095 B CN 111641095B
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- connector
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- POFVJRKJJBFPII-UHFFFAOYSA-N N-cyclopentyl-5-[2-[[5-[(4-ethylpiperazin-1-yl)methyl]pyridin-2-yl]amino]-5-fluoropyrimidin-4-yl]-4-methyl-1,3-thiazol-2-amine Chemical compound C1(CCCC1)NC=1SC(=C(N=1)C)C1=NC(=NC=C1F)NC1=NC=C(C=C1)CN1CCN(CC1)CC POFVJRKJJBFPII-UHFFFAOYSA-N 0.000 description 1
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- H01R43/26—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for engaging or disengaging the two parts of a coupling device
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
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- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R2107/00—Four or more poles
Abstract
利用由一体式柔性电缆接合的半导体衬底区段以形成包括连接器的装置。连接器可以被表面安装在通孔上并被焊接以用于增强稳固性。
Description
技术领域
本申请涉及垂直表面安装C型USB连接器及其制造方法。
发明内容
在本申请的一个方面中,提供了一种方法。在一个实施例中,该方法包括:形成第一衬底区段;形成第二衬底区段;在所述第一衬底区段与所述第二衬底区段之间形成柔性电缆;在所述第一衬底区段上形成第一模塑料层;在所述第二衬底区段上形成第二模塑料层;将表面安装连接器的安装引脚装配到所述第一衬底区段和所述第一模塑料层的通孔中;以及将所述柔性电缆弯曲使得所述第二模塑料层邻近于所述第一模塑料层并与所述第一模塑料层共面。
在本申请的另一个方面中,提供了一种装置。在一个实施例中,该装置可以包括:至少一个表面安装式连接器;以及多个制造层,包括:第一衬底区段,其支撑所述连接器;第一模塑料层,其邻近于所述第一衬底区段并与所述第一衬底区段共面;第二模塑料层,其邻近于所述第一模塑料层并与所述第一模塑料层共面;以及第二衬底区段,其邻近于所述第二模塑料层并与所述第二模塑料层共面;柔性电缆,其将所述第一衬底区段接合到所述第二衬底区段;且其中用于所述连接器的安装引脚的安装孔延伸穿过所述第一衬底区段和所述第一模塑料层。
在另一个实施例中,该装置可以包括:第一装置部分,其包含第一衬底区段和安装在所述第一衬底区段上的第一连接器,所述第一装置部分进一步包括与所述第一连接器电连接的第一装置部分导体;第二装置部分,其包含第二衬底区段和定位在所述第二衬底区段内的半导体装置,所述第二装置部分进一步包括与所述半导体装置电连接的第二装置部分导体;以及第一柔性电缆,其在所述第一装置部分与所述第二装置部分之间弯曲成弧形,所述第一柔性电缆包括能够在所述第一装置部分导体与所述第二装置导体之间提供电连接的导体。
附图说明
为了容易识别对任何特定元件或动作的论述,附图标记中的一个或多个最高有效数字是指首次介绍所述元件的图号。
图1示出了根据一个实施例的设备。
图2示出了根据一个实施例的中间制造阶段。
图3示出了根据一个实施例的另一中间制造阶段。
图4示出了根据一个实施例的另一中间制造阶段。
图5示出了根据一个实施例的设备。
图6示出了中间制造阶段的替代实施例。
图7示出了根据一个实施例的替代设备。
图8示出了根据一个实施例的另一替代设备。
具体实施方式
现在将参考附图描述实施例,该实施例涉及通用串行总线(“USB”)装置和系统级封装(SIP)。应理解,本发明技术可以以许多不同形式来体现,且不应被解释为限于本文中所阐述的实施例。相反,提供这些实施例是为了使得本公开将透彻且完整,并向所属领域的技术人员充分地传达本发明。实际上,本发明意图涵盖这些实施例的替代、修改和等效方案,这些替代、修改和等效方案包含在如由所附权利要求书所限定的本发明的范围和精神内。此外,在本发明的以下详细描述中,阐述了许多具体细节以便提供对本发明的透彻理解。然而,所属领域的一般技术人员将明白,可以在没有此类具体细节的情况下实践本发明。
如可以在本文中使用的术语“顶部”与“底部”、“上部”与“下部”和“垂直”与“水平”以及其形式仅是作为示例和说明性目的,且并不意图限制所述技术的描述,因为所引用的项目可以在位置和取向上交换。此外,如本文中所使用,术语“大体上”和/或“约”意味着:对于给定应用,所指定的尺寸或参数可以在可接受的制造公差内变化。在一个实施例中,可接受的制造公差为给定尺寸的±.25%。
在本公开内,可以将不同实体(其可以被不同地称为“单元”、“电路”、其它组件等等)描述或要求为“被配置”成进行一个或多个任务或操作。此表述—被配置成[进行一个或多个任务]的[实体]—在本文中被用于指代结构(即,诸如电子电路的物理物体)。更具体地,此表述用于指示此结构被布置成在操作期间进行一个或多个任务。结构可以被称为“被配置成”进行某种任务,即使该结构当前未被操作。“被配置成将信用分配到多个处理器核心的信用分配电路”意图涵盖例如具有在操作期间进行此功能的电路的集成电路,即使所论述的集成电路当前未被使用(例如未连接到电源)。因此,被描述或记载为“被配置成”进行某种任务的实体指代物理物体,诸如装置、电路、存储可执行以实现任务的程序指令的存储器等。此短语在本文中并不用于指代无形物体。
术语“配置成”并不意图指代“可配置成”。例如,未编程的FPGA将不被认为“被配置成”进行某种具体功能,尽管其可以在编程之后“可配置成”进行该功能。
如本文中所使用,术语“基于”用于描述影响确定的一个或多个因素。此术语并不排除额外因素可能会影响确定的可能性。也就是说,确定可能完全基于所指定的因素或基于所指定的因素以及其它未指定的因素。考虑短语“基于B确定A”。此短语指出B为用于确定A或影响A的确定的因素。此短语并不排除A的确定还可以基于诸如C的一些其它因素。此短语还意图涵盖完全基于B确定A的实施例。如本文中所使用,短语“基于”与短语“至少部分地基于”同义。
如本文中所使用,短语“响应于”描述触发效果的一个或多个因素。此短语并不排除额外因素可能会影响或以其它方式触发效果的可能性。也就是说,效果可能完全响应于那些因素,或可能响应于所指定的因素以及其它未指定的因素。考虑短语“响应于B而进行A”。此短语指出B为触发A的进行的因素。此短语并不排除也可以响应于诸如C的一些其它因素而执行A。此短语还意图涵盖完全响应于B而进行A的实施例。
如本文中所使用,除非另有陈述,否则术语“第一”、“第二”等等用作在其之后的名词的标签,且并不暗示任何类型的排序(例如,空间、时间、逻辑等等)。例如,在具有八个寄存器的寄存器组中,术语“第一寄存器”和“第二寄存器”可以用于是指八个寄存器中的任两个,而非例如仅仅为逻辑寄存器0和1。
当在权利要求中使用时,术语“或”用作包含性的或,而非排它性的或。例如,短语“x、y或z中的至少一个”意指x、y和z中的任一个,以及其任何组合。
图1示出了一个实施例中的设备,其包括第一衬底区段102,该第一衬底区段102经由柔性电缆110耦接到第二衬底区段106。本文中,对‘电缆’的引用指代任何多导体信号路径,其可以包含被组织到总线中的信号导体,且还可以包含并非为总线架构或协议的一部分的导体。衬底区段可以例如由多晶硅形成,且可以根据工艺技术和实现方式在厚度上变化。在一个实施例中,衬底区段为0.13mm厚(在限定的公差内有所增减)。更一般来说,取决于工艺技术,衬底区段可以为任何厚度,但通常可能在介于0.5mm与0.05mm之间的厚度范围内。衬底区段包括用于将信号路由到表面安装式连接器104的引脚和从表面安装式连接器104的引脚路由信号的导体。这些信号例如可以在柔性电缆110之上传播到半导体裸芯和从半导体裸芯传播。
连接器104可以用安装引脚112(不要与携载信号的信号引脚混淆)被表面安装到第一衬底区段102,该安装引脚112延伸穿过通孔114且在其终止点处用焊点进行固定。连接器104可以是但不限于C型USB连接器(例如,具有24个信号引脚)。为了电气安全起见,安装引脚112还可以与第一衬底区段102的接地平面接触。取决于工艺实现方式,通孔114可以形成于用于施加模塑料的模腔中,或可以被钻孔或蚀刻而成。
第一衬底区段102和第二衬底区段106由第一模塑料层108和第二模塑料层116分离。如所属领域中所知的,模塑料可以是环氧树脂或其它保护性绝缘材料(例如,塑料)。安装引脚112终止并焊接在第一模塑料层108和第二模塑料层116的结点附近。本文中,连接器104的安装引脚112将被描述为焊接就位,然而,应理解,可以利用固定安装引脚112的其它方法,诸如用强环氧树脂或借助于机械扣件进行键合。
半导体裸芯堆叠118形成并嵌入到第二模塑料层116中。半导体裸芯堆叠118可以包含任何数目的(一个或多个)半导体裸芯,该半导体裸芯包括集成电路和其它电组件以及在其间路由的信号。如果半导体裸芯堆叠118包含多个半导体裸芯,那么该多个半导体裸芯可以由键合引线120电气连接。键合引线120可以由所属领域中所知的材料并以所属领域中所知的方式形成。例如,键合引线120可以是金或铜并且使用诸如“裸芯附接”(DieAttachment,DA)和“引线键合”(wire bonding,WB)的技术附接。取决于诸如半导体裸芯的数目和每个半导体裸芯的厚度的因素,第二模塑料层116可以具有任何厚度。第二模塑料层116的示例厚度为0.49mm,取决于实现方式的公差而有所增减。第一模塑料层108可以具有与第二模塑料层116相同的厚度或不同的厚度。在一个实施例中,第一模塑料层108和第二模塑料层116二者为0.49mm,第一衬底区段102和第二衬底区段106的每一个为0.13mm厚,组合厚度为1.24mm。
在一个实施例中,可以如图2到图4所描绘的序列中所示,进行图1所描绘的设备的制造。图2示出了一个实施例中的第一衬底区段102、第二衬底区段106和一体式柔性电缆110。使用常规的制造技术,形成第一衬底区段102,并在第一衬底区段102中钻孔、蚀刻或以其它方式创建通孔114。以同样的常规方式形成第二衬底区段106。柔性电缆110与第一衬底区段102和第二衬底区段106一体形成,例如通过在衬底中蚀刻信号迹线、蚀刻或切割周围材料并施加一个或多个绝缘层。柔性电缆110携载第一衬底区段102与第二衬底区段106之间的信号,例如去往和来自连接器104的信号引脚和半导体裸芯堆叠118的一个或多个层的信号。在其它实施例中,柔性电缆110可以是耦接到第一衬底区段102和第二衬底区段106上的电连接块的卡入电缆。
图3示出了经由键合引线120耦接到第二衬底区段106的半导体裸芯堆叠118的形成。半导体裸芯堆叠118层以常规方式形成,并使用键合引线120彼此电气键合且电气键合到第二衬底区段106。还可以使用倒装芯片技术或硅穿孔(TSV)技术实现多个裸芯之间或半导体裸芯堆叠118与第二衬底区段106之间的电连接。在典型实施例中,半导体裸芯堆叠的单独的半导体裸芯电气键合在一起,且至少一个单独的半导体裸芯直接电气键合到第二衬底区段。在此实施例中,由于制造方式,单独的半导体裸芯都不直接电气键合到第一衬底区段102。
图4示出了形成于第一衬底区段102下的第一模塑料层108和延伸穿过第一模塑料层108的通孔114。第二模塑料层116形成于第二衬底区段106下以包覆半导体裸芯堆叠118。连接器104的安装引脚112插入到通孔114中,并在安装引脚112的末端处的点处用焊点进行固定,所述点例如是安装引脚从第一模塑料层108略微突出或突出到通孔114的对接套件中(counter-set)(例如与通孔114同轴形成的较大直径的浅孔)之处。第二衬底区段106和第二模塑料层116旋转(即,经由折线402大致示出的路径)到第一模塑料层108下,从而产生图1所示出的装置设计。可以施加胶带、胶粘剂和/或机械扣件以将折叠区段(第二衬底区段106和第二模塑料层116)保持到顶部区段(第一衬底区段102和第一模塑料层108)。
第一衬底区段102、第一模塑料层108、安装引脚112和连接器104可以被称为装置第一部分122。此外,第二衬底区段106和第二模塑料层116可以被称为装置第二部分124。
如图5所示,设备的实施例包括外壳502、连接器罩盖504和具有连接器506的系统级封装。此类装置的示例为移动电话和便携式音乐播放器。在一个实施例中,设备可以是快闪存储器驱动器、可插拔式安全存储装置(SSD,例如‘拇指驱动器’)或其它可拆卸式存储器装置。“可拆卸式”是指可以通过连接或断开例如C型USB连接器的连接器而添加到计算机系统或从计算机系统移除的装置。
图6中示出替代实施例。此实施例可以包含如前所述的具有通孔114的第一衬底区段102、第二衬底区段106和柔性电缆110,但进一步包含具有第二通孔602的第三衬底区段604和第二柔性电缆606。替代实施例可以制造成图7所示的设备或图8所示的设备。
图7的设备具有与图1的设备一样的特征,且这些特征是以结合图1所描述的相同方式形成。然而,图7中的设备进一步包含形成于第三衬底区段604下的第三模塑料层702和第四模塑料层706。第四模塑料层706包括用第二键合引线710接合的第二半导体裸芯堆叠708。在形成第三模塑料层702和第四模塑料层706之后,将第二连接器712的第二连接器安装引脚714插入穿过第三衬底区段604和第三模塑料层702的第二通孔602,并用焊点固定就位。接着通过将第二柔性电缆606弯曲而使第四模塑料层706旋转(折叠)到第二衬底区段106下。
第三衬底区段604、第三模塑料层702和第四模塑料层706可以被称为装置第三部分704。
以此方式,可以将连接器安装在设备的两侧上。可以施加胶带、胶粘剂和/或机械扣件以将折叠区段保持到该折叠区段被折叠到其下的区段。
第四模塑料层706无需包括第二半导体裸芯堆叠708。如图8所示,设备可以形成为仅具有不包含第二半导体裸芯堆叠708的薄的第四模塑料层706。在这样的实施例中,第四模塑料层706仅用于使第二衬底区段106的组件免于接触固定第二连接器安装引脚714的焊点。如果焊点接触第二衬底区段106的电气非活性表面,或例如如果在第二通孔602中钻孔凹槽反向螺孔(recess counter tap hole),使得第二连接器安装引脚714无需从第三模塑料层702突出以便通过焊接进行固定,那么可以完全移除第四模塑料层706。
Claims (15)
1.一种形成连接器的方法,包括:
形成第一衬底区段;
形成第二衬底区段;
在所述第一衬底区段与所述第二衬底区段之间形成柔性电缆;
在所述第一衬底区段上形成第一模塑料层;
在所述第二衬底区段上形成第二模塑料层;
将表面安装连接器的安装引脚装配到所述第一衬底区段和所述第一模塑料层的通孔中;
用焊点固定所述表面安装连接器的所述安装引脚,所述安装引脚被配置为结构性地支撑所述表面安装连接器并且不携载信号;以及
在固定所述安装引脚之后,将所述柔性电缆弯曲使得所述第二模塑料层邻近于所述第一模塑料层并与所述第一模塑料层共面。
2.根据权利要求1所述的方法,其中所述第一模塑料层和第二模塑料层的模塑料包括保护性塑料材料。
3.根据权利要求1所述的方法,其中所述连接器为C型USB连接器。
4.根据权利要求1所述的方法,进一步包括将半导体裸芯堆叠键合到所述第二衬底区段。
5.根据权利要求4所述的方法,进一步包括将所述半导体裸芯堆叠嵌入在所述第二模塑料层中。
6.根据权利要求4所述的方法,进一步包括形成从所述柔性电缆到所述连接器的信号引脚的电连接。
7.根据权利要求1所述的方法,进一步包括:
形成第三衬底区段;
在所述第二衬底区段与所述第三衬底区段之间形成第二柔性电缆;
将第二连接器的安装引脚插入到所述第三衬底区段的通孔中;以及
将所述第二柔性电缆弯曲使得所述第三衬底区段与所述第二衬底区段共面。
8.一种连接器装置,其包括:
至少一个表面安装式连接器;以及
多个制造层,包括:
第一衬底区段,其支撑所述连接器;
第一模塑料层,其邻近于所述第一衬底区段并与所述第一衬底区段共面;
第二模塑料层,其邻近于所述第一模塑料层并与所述第一模塑料层共面;以及
第二衬底区段,其邻近于所述第二模塑料层并与所述第二模塑料层共面;
柔性电缆,其将所述第一衬底区段接合到所述第二衬底区段;且
其中用于所述连接器的安装引脚的安装孔延伸穿过所述第一衬底区段和所述第一模塑料层;
其中焊点在所述安装引脚的末端处形成于所述安装引脚上,所述安装引脚、所述安装孔、所述第一衬底区段和所述第一模塑料层配置为在所述连接器装置内结构性地支撑所述表面安装式连接器;
其中所述第一模塑料层和第二模塑料层的模塑料包括保护性塑料材料;并且
其中所述第二模塑料包封电气键合到所述第二衬底区段的半导体裸芯。
9.根据权利要求8所述的连接器装置,其中所述连接器为C型USB连接器。
10.根据权利要求8所述的连接器装置,其中所述第二模塑料包封电气键合到所述第二衬底区段的半导体裸芯堆叠。
11.根据权利要求10所述的连接器装置,其中所述半导体裸芯堆叠实现安全存储装置。
12.根据权利要求8所述的连接器装置,其中所述第一模塑料层具有约0.49mm的厚度。
13.根据权利要求8所述的连接器装置,其中所述柔性电缆包括从半导体裸芯堆叠到所述连接器的信号引脚的电连接。
14.根据权利要求8所述的连接器装置,进一步包括:
第三衬底区段;
第二柔性电缆,其包括在所述第二衬底区段与所述第三衬底区段之间的信号导体;
第二连接器,其安装在所述第三衬底区段的通孔上;以及
所述第二柔性电缆被弯曲使得所述第三衬底区段与所述第二衬底区段共面。
15.一种连接器装置,其包括:
至少一个表面安装式连接器;以及
多个制造层,包括:
第一衬底区段,其支撑所述至少一个表面安装式连接器;
第一模塑料层,其邻近于所述第一衬底区段并与所述第一衬底区段共面;
第二模塑料层,其邻近于所述第一模塑料层并与所述第一模塑料层共面;以及
第二衬底区段,其邻近于所述第二模塑料层并与所述第二模塑料层共面;
柔性电缆,其将所述第一衬底区段接合到所述第二衬底区段;
其中用于所述连接器的安装引脚的安装孔延伸穿过所述第一衬底区段和所述第一模塑料层;
其中焊点在所述安装引脚的末端处形成于所述安装引脚上,所述安装引脚、所述安装孔、所述第一衬底区段和所述第一模塑料层配置为在所述连接器装置内结构性地支撑所述表面安装式连接器;
其中所述第一模塑料层和第二模塑料层的模塑料包括保护性塑料材料;
其中所述第二模塑料包封电气键合到所述第二衬底区段的半导体裸芯;
其中所述至少一个表面安装式连接器为C型USB连接器;并且
其中所述第一模塑料层具有约0.49mm的厚度。
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US16/290,116 US10733136B1 (en) | 2019-03-01 | 2019-03-01 | Vertical surface mount type C USB connector |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003158221A (ja) * | 2002-11-28 | 2003-05-30 | Hitachi Ltd | 半導体装置およびその製造方法ならびにその実装方法 |
KR20080104601A (ko) * | 2007-05-28 | 2008-12-03 | 삼성테크윈 주식회사 | 폴딩되는 반도체 패키지용 기판 |
CN104835415A (zh) * | 2014-02-12 | 2015-08-12 | 三星显示有限公司 | 显示装置 |
CN108575044A (zh) * | 2017-03-13 | 2018-09-25 | 富士康(昆山)电脑接插件有限公司 | 印刷电路板及其组件 |
Family Cites Families (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3946477A (en) * | 1974-03-28 | 1976-03-30 | Amp Incorporated | Apparatus for aligning and inserting pins into holes of a substrate |
US4580858A (en) * | 1985-05-09 | 1986-04-08 | System Development Corporation | Alignment fixture assembly for surface-mount connectors |
US4645287A (en) * | 1985-09-09 | 1987-02-24 | Amp Incorporated | Surface mount connector |
US4685886A (en) * | 1986-06-27 | 1987-08-11 | Amp Incorporated | Electrical plug header |
US5029748A (en) * | 1987-07-10 | 1991-07-09 | Amp Incorporated | Solder preforms in a cast array |
US5147210A (en) * | 1988-03-03 | 1992-09-15 | Western Digital Corporation | Polymer film interconnect |
US5351393A (en) * | 1991-05-28 | 1994-10-04 | Dimensonal Circuits Corporation | Method of mounting a surface-mountable IC to a converter board |
JPH0799133A (ja) * | 1993-09-27 | 1995-04-11 | Taiyo Yuden Co Ltd | 貫通コンデンサアレイ |
US5386341A (en) * | 1993-11-01 | 1995-01-31 | Motorola, Inc. | Flexible substrate folded in a U-shape with a rigidizer plate located in the notch of the U-shape |
US5646446A (en) * | 1995-12-22 | 1997-07-08 | Fairchild Space And Defense Corporation | Three-dimensional flexible assembly of integrated circuits |
US5751556A (en) * | 1996-03-29 | 1998-05-12 | Intel Corporation | Method and apparatus for reducing warpage of an assembly substrate |
US7149095B2 (en) * | 1996-12-13 | 2006-12-12 | Tessera, Inc. | Stacked microelectronic assemblies |
US6121676A (en) * | 1996-12-13 | 2000-09-19 | Tessera, Inc. | Stacked microelectronic assembly and method therefor |
US6208521B1 (en) * | 1997-05-19 | 2001-03-27 | Nitto Denko Corporation | Film carrier and laminate type mounting structure using same |
JP3186700B2 (ja) * | 1998-06-24 | 2001-07-11 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US6259039B1 (en) * | 1998-12-29 | 2001-07-10 | Intel Corporation | Surface mount connector with pins in vias |
JP2001217388A (ja) * | 2000-02-01 | 2001-08-10 | Sony Corp | 電子装置およびその製造方法 |
US6683377B1 (en) * | 2000-05-30 | 2004-01-27 | Amkor Technology, Inc. | Multi-stacked memory package |
US7091598B2 (en) * | 2001-01-19 | 2006-08-15 | Renesas Technology Corporation | Electronic circuit device |
US6884653B2 (en) * | 2001-03-21 | 2005-04-26 | Micron Technology, Inc. | Folded interposer |
US6940729B2 (en) * | 2001-10-26 | 2005-09-06 | Staktek Group L.P. | Integrated circuit stacking system and method |
US6881096B2 (en) | 2002-04-15 | 2005-04-19 | Lantronix, Inc. | Compact serial-to-ethernet conversion port |
US7161238B2 (en) * | 2002-12-31 | 2007-01-09 | Intel Corporation | Structural reinforcement for electronic substrate |
US7057116B2 (en) * | 2003-06-02 | 2006-06-06 | Intel Corporation | Selective reference plane bridge(s) on folded package |
JP2005051144A (ja) * | 2003-07-31 | 2005-02-24 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法 |
US20100025089A1 (en) * | 2004-01-07 | 2010-02-04 | Jun Taketatsu | Circuit connection material, film-shaped circuit connection material using the same, circuit member connection structure, and manufacturing method thereof |
TWI277381B (en) * | 2005-04-12 | 2007-03-21 | Au Optronics Corp | Double-sided flexible printed circuit board |
US7623354B2 (en) | 2005-09-29 | 2009-11-24 | Kingston Technology Corporation | Folding USB drive |
CN100511614C (zh) * | 2006-06-13 | 2009-07-08 | 日月光半导体制造股份有限公司 | 多芯片堆叠的封装方法及其封装结构 |
KR20090010403A (ko) * | 2007-07-23 | 2009-01-30 | 삼성전자주식회사 | 적층형 메모리 모듈 및 이의 제조방법 |
CN201113076Y (zh) | 2007-08-10 | 2008-09-10 | 富士康(昆山)电脑接插件有限公司 | 插座电连接器 |
US7479017B1 (en) * | 2007-08-31 | 2009-01-20 | Samtec, Inc. | Right angle electrical connector |
JP4317245B2 (ja) * | 2007-09-27 | 2009-08-19 | 新光電気工業株式会社 | 電子装置及びその製造方法 |
JP2009164387A (ja) * | 2008-01-08 | 2009-07-23 | Fujitsu Ltd | プリント基板ユニット及びプリント基板ユニットの固定具 |
US9831612B1 (en) * | 2010-08-06 | 2017-11-28 | Western Digital Technologies, Inc. | High speed electrical connector with improved EMI suppression and mechanical retention shield |
JP5720222B2 (ja) * | 2010-12-13 | 2015-05-20 | ソニー株式会社 | 表示装置及び電子機器 |
US8355255B2 (en) * | 2010-12-22 | 2013-01-15 | Raytheon Company | Cooling of coplanar active circuits |
KR20120079742A (ko) * | 2011-01-05 | 2012-07-13 | 삼성전자주식회사 | 폴디드 적층 패키지 및 그 제조방법 |
US20120194990A1 (en) * | 2011-01-31 | 2012-08-02 | Martin Kuster | Semiconductor Arrangements |
JP5785788B2 (ja) | 2011-06-10 | 2015-09-30 | 株式会社アイ・オー・データ機器 | ユニバーサルシリアルバス装置 |
CN103094256B (zh) * | 2011-11-08 | 2015-12-02 | 华进半导体封装先导技术研发中心有限公司 | 一种封装系统 |
US8925189B2 (en) * | 2012-08-21 | 2015-01-06 | Delphi Technologies, Inc. | Method for assembling an electrical connector assembly |
TWI550409B (zh) * | 2015-05-13 | 2016-09-21 | 巧連科技股份有限公司 | USB Type-C連接器模組(二) |
CN204884440U (zh) * | 2015-08-27 | 2015-12-16 | 京东方科技集团股份有限公司 | 柔性显示面板和柔性显示装置 |
US9646946B2 (en) * | 2015-10-07 | 2017-05-09 | Invensas Corporation | Fan-out wafer-level packaging using metal foil lamination |
US10126127B2 (en) * | 2016-04-29 | 2018-11-13 | Microsoft Technology Licensing, Llc | Athermalized mounting of inertial measurement unit |
JP7010239B2 (ja) | 2016-12-22 | 2022-01-26 | ソニーグループ株式会社 | 電子機器、およびコネクタ |
CN207124315U (zh) | 2017-08-02 | 2018-03-20 | 连展科技(深圳)有限公司 | 多合一插座电连接器 |
-
2019
- 2019-03-01 US US16/290,116 patent/US10733136B1/en active Active
- 2019-11-22 TW TW108142437A patent/TWI703769B/zh active
- 2019-12-16 KR KR1020190167796A patent/KR102308674B1/ko active IP Right Grant
- 2019-12-20 CN CN201911326132.2A patent/CN111641095B/zh not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003158221A (ja) * | 2002-11-28 | 2003-05-30 | Hitachi Ltd | 半導体装置およびその製造方法ならびにその実装方法 |
KR20080104601A (ko) * | 2007-05-28 | 2008-12-03 | 삼성테크윈 주식회사 | 폴딩되는 반도체 패키지용 기판 |
CN104835415A (zh) * | 2014-02-12 | 2015-08-12 | 三星显示有限公司 | 显示装置 |
CN108575044A (zh) * | 2017-03-13 | 2018-09-25 | 富士康(昆山)电脑接插件有限公司 | 印刷电路板及其组件 |
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KR102308674B1 (ko) | 2021-10-01 |
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