CN111584618A - 具有阶梯环结构的肖特基两级管及其制造方法 - Google Patents
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Abstract
本发明涉及一种具有阶梯环结构的肖特基两级管及其制造方法,包括第一导电类型重掺杂衬底及第一导电类型外延层,第一导电类型外延层的上表面设有肖特基金属层,在第一导电类型重掺杂衬底的下表面连接有欧姆金属层;在第一导电类型外延层的上表面且与肖特基金属层邻接的氧化层,在第一导电类型外延层内沿着肖特基金属层和氧化层的结合界面下方设有终端外环,终端外环呈阶梯型结构,且终端外环的宽度从上往下呈逐层缩小设置。本发明利用阶梯型终端外环结构来有效调节优化分散平面型碳化硅肖特基两级管器件的表面电场强度,可以达到提高器件耐压、降低漏电电流并且可以进一步优化器件的可靠性。
Description
技术领域
本发明属于第三代宽禁带半导体材料碳化硅肖特基两级管技术领域,具体地说是一种具有阶梯环结构的肖特基两级管及其制造方法。
背景技术
使用第一代半导体硅材料制作的肖特基两级管由于正向导通电压低,在逆向反偏电压操作时没有P-N结所造成的乏区恢复电流,所以特别适合高频率,低能耗的绿色电源应用要求。但是因为硅和肖特基金属界面的特性,硅基肖特基两级管器件的额定电压只能局限在12V到200V之间。处于第三代宽禁带半导体材料领域的碳化硅化合物,具有耐高压,耐高温,高热传导系数,非常适合高压大功率器件市场应用。
自从2001年第一颗600V碳化硅肖特基两级管市场商用化之后,碳化硅器件优异的电参数特性,已经给功率因数改善(power factor correction), 光伏逆变器,交流到直流电源转换电路,新能源汽车等领域带来了全新的终端应用。但是由于碳化硅肖特基两级管的表面电场强度大约是硅材料器件的8到10倍,在肖特基金属层和碳化硅材料接触面之间的隧道(tunneling)效应和纳米洞(nano pit)缺陷都会扩大高温反偏电压下的漏电电流,这也一直是碳化硅肖特基两级管在终端系统应用上的一个可靠性隐忧。
发明内容
本发明的目的之一是克服现有技术中存在的不足,提供一种能减低表面电场强度、减少漏电电流和改善器件可靠性的具有阶梯环结构的肖特基两级管。
本发明的另一目的提供一种具有阶梯环结构的肖特基两级管的制造方法。
按照本发明提供的技术方案,所述具有阶梯环结构的肖特基两级管,包括平面型肖特基金属区和氧化层保护区,平面型肖特基金属区位于器件的中心区,平面型肖特基金属区包括半导体基板,半导体基板包括第一导电类型重掺杂衬底及位于第一导电类型重掺杂衬底上表面的第一导电类型外延层,第一导电类型外延层的上表面设有肖特基金属层,肖特基金属层作为器件的阳极,在第一导电类型重掺杂衬底的下表面连接有欧姆金属层,欧姆金属层作为器件的阴极;所述氧化层保护区是设置在第一导电类型外延层的上表面且与肖特基金属层邻接的氧化层,在第一导电类型外延层内仅沿着肖特基金属层和氧化层的结合界面下方设有终端外环,由第一导电类型外延层的上表面注入第二导电类型材料而形成所述的终端外环;且所述终端外环呈阶梯型结构,且终端外环的宽度从上往下呈逐层缩小设置。
作为优选,所述肖特基金属层的厚度为 100–1000 Å。
作为优选,所述氧化层位于芯片周围,包围保护位于中间的平面型肖特基金属层。
作为优选,所述第一导电类型为N型导电,第二导电类型为P型导电。
作为优选,所述欧姆金属层的材质为Ti/Ni/Ag合金或者Ti/Ni/Al合金。
一种具有阶梯环结构的肖特基两级管的制造方法包括以下步骤:
步骤一. 提供第一导电类型重掺杂衬底,在第一导电类型重掺杂衬底的上表面生长第一导电类型外延层,第一导电类型外延层的上表面为第一主面,第一导电类型重掺杂衬底的下表面为第二主面;
步骤二. 通过器件设计的图形化光刻板的遮挡,对第一主面进行第一次高温高能离子注入第二导电类型材料,在第一导电类型外延层内形成左右两个第一层的第二导电类型体区,注入结束后采用湿法腐蚀或是热HF去掉表面氧化层;
步骤三. 通过器件设计的图形化光刻板的遮挡,对第一主面进行至少两次高温高能离子注入第二导电类型材料,每一次注入的宽度均大于上一次注入的宽度,每一次注入的深度均小于上一次注入的深度,在第一导电类型外延层内再形成至少两层的第二导电类型体区,使得由多次高温高能离子注入第二导电类型材料而形成的第二导电类型体区呈阶梯型结构,该阶梯型结构的宽度从下往上呈逐层增大设置,每一次注入结束后采用湿法腐蚀或是热HF去掉表面氧化层,最后一次清除表面氧化层后,采用热氮气清除表面残留的杂质;
步骤四. 采用热氧化工艺,在第一导电类型外延层和第二导电类型体区的上方生长一层氧化层;
步骤五. 在图形化光刻板的遮挡下,在氧化层的中间进行干法蚀刻,形成中间的肖特基金属区和边缘的氧化层保护区;
步骤六. 在肖特基金属区内镀上一层肖特基金属材料,形成肖特基金属层;
步骤七. 在第二主面镀上一层低电阻值的欧姆金属材料,形成欧姆金属层,欧姆金属层作为器件的阴极。
本发明利用阶梯型终端外环结构来有效调节优化分散平面型碳化硅肖特基两级管器件的表面电场强度,可以达到提高器件耐压、降低漏电电流并且可以进一步优化器件的可靠性。
附图说明
图1本发明实施例1中第一导电类型碳化硅重掺杂衬底和第一导电类型外延层剖面结构示意图。
图2本发明实施例1中第一次第二导电类型材料离子注入及第一层阶梯终端外环形成的剖面结构示意图。
图3本发明实施例1中第二次第二导电类型材料离子注入及第二层阶梯终端外环形成的剖面结构示意图。
图4本发明实施例1中第三次第二导电类型材料离子注入及第三层阶梯终端外环形成的剖面结构示意图。
图5本发明实施例1中氧化层形成的剖面结构示意图。
图6本发明实施例1中氧化层腐蚀后形成肖特基金属层区的剖面结构示意图。
图7本发明实施例1中肖特基金属层形成的剖面结构示意图
图8本发明实施例1中背面欧姆金属层形成的剖面结构示意图。
图9是传统平面碳化硅肖特基两级管剖面结构示意图。
图10是传统具有终端环的平面碳化硅肖特基二极管剖面结构示意图。
具体实施方式
下面结合具体实施例对本发明作进一步说明。
实施例1
一种具有阶梯环结构的肖特基两级管以N型导电为例,如图8所示,包括平面型肖特基金属区和氧化层保护区,平面型肖特基金属区位于器件的中心区,平面型肖特基金属区包括半导体基板,半导体基板包括N+型导电的第一导电类型重掺杂衬底1及位于第一导电类型重掺杂衬底1上表面的N-型导电的第一导电类型外延层2,第一导电类型外延层2的上表面设有肖特基金属层6,肖特基金属层6作为器件的阳极,在第一导电类型重掺杂衬底1的下表面连接有欧姆金属层7,欧姆金属层7作为器件的阴极;所述氧化层保护区是设置在第一导电类型外延层2的上表面且与肖特基金属层6邻接的氧化层5,在第一导电类型外延层2内仅沿着肖特基金属层6和氧化层5的结合界面下方设有终端外环3,由第一导电类型外延层2的上表面注入P+型导电的第二导电类型材料4而形成所述的终端外环3;且所述终端外环3呈阶梯型结构,且终端外环3的宽度从上往下呈逐层缩小设置,
所述肖特基金属层6的厚度为 100–1000 Å。
所述氧化层5位于芯片周围,包围保护位于中间的平面型肖特基金属层6。
所述第一导电类型为N型导电,第二导电类型为P型导电。
所述欧姆金属层7的材质为Ti/Ni/Ag合金或者Ti/Ni/Al合金。
一种具有阶梯环结构的肖特基两级管的制造方法包括以下步骤:
步骤一. 如图1所示,提供N+型碳化硅材质的第一导电类型重掺杂衬底1,在第一导电类型重掺杂衬底1的上表面生长N-型碳化硅材质的第一导电类型外延层2,第一导电类型外延层2的上表面为第一主面,第一导电类型重掺杂衬底1的下表面为第二主面;
步骤二. 如图2所示,通过器件设计的图形化光刻板的遮挡,采用高温高能离子注入装置,对第一主面进行第一次硼或铝离子注入P+型的第二导电类型材料4,在第一导电类型外延层2内形成左右两个第一层的第二导电类型体区3,注入结束后采用湿法腐蚀或是热HF去掉表面氧化层;
步骤三. 如图3所示,通过器件设计的图形化光刻板的遮挡,采用高温高能离子注入装置,对第一主面进行第二次硼或铝离子注入P+型的第二导电类型材料4,第二次注入的宽度大于第一次注入的宽度,第二次注入的深度小于第一次注入的深度,在第一导电类型外延层2内形成左右两个第二层的第二导电类型体区3,注入结束后采用湿法腐蚀或是热HF去掉表面氧化层;
步骤四、如图4所示,通过器件设计的图形化光刻板的遮挡,采用高温高能离子注入装置,对第一主面进行第三次硼或铝离子注入P+型的第二导电类型材料4,第三次注入的宽度大于第二次注入的宽度,第三次注入的深度小于第二次注入的深度,在第一导电类型外延层2内再形成第三层的第二导电类型体区3,使得经过三次硼或铝离子注入P+型的第二导电类型材料4后,形成阶梯型结构的第二导电类型体区3,第二导电类型体区3的宽度从下往上呈逐层增大设置,注入结束后采用湿法腐蚀或是热HF去掉表面氧化层,再采用热氮气清除表面残留的杂质;
步骤五. 如图5所示,采用热氧化工艺,在N-型碳化硅材质的第一导电类型外延层2和P+型的第二导电类型体区3的上方生长一层氧化层5;
步骤六. 如图6所示,在图形化光刻板的遮挡下,在氧化层5的中间进行干法蚀刻,形成中间的肖特基金属区和边缘的氧化层保护区;
步骤七. 如图7所示,在肖特基金属区内镀上一层肖特基金属材料,形成肖特基金属层6;
步骤八. 如图8所示,在第二主面镀上一层低电阻值的Ti/Ni/Ag合金或者Ti/Ni/Al合金欧姆金属材料,形成欧姆金属层7,欧姆金属层7作为器件的阴极。
由于第三代宽禁带半导体碳化硅材料的特性,无法使用常规硅基制程的注入扩散方法,所以改而采用高温高能装置将B或是Al的P+型的第二导电类型材料4离子注入的终端外环3,相对的单层终端外延结构,本发明中的阶梯型终端外环3在器件设计上对阶梯的层数、高度和宽度可以更好的依据器件电压参数设计需求决定,调整控制阶梯的层数、深度和宽度来优化器件特性、降低表面电场强度并减少漏电电。
本发明在现有的平面型碳化硅肖特基两级管器件基础上,在第一导电类型外延层2的上表面,沿着平面型肖特基金属层6和氧化层5的结合处的下面采用阶梯型的终端外环3结构,并且由于硼或铝离子注入P+型的第二导电类材料4,使得器件在反偏电压时和第一导电类型外延层2形成P-N结界面,同时经由对阶梯型终端外环3的阶梯数量和每一个阶梯的宽度控制,可以有效调节优化,进而降低第一导电类型外延层2和肖特基金属层6中间的表面电场强度,减少器件在反偏电压下的漏电电流,大幅提高碳化硅肖特基两级管器件的可靠性能。
与传统平面碳化硅肖特基两级管结构(如图9所示)和传统具有终端环的平面碳化硅肖特基二极管(如图10所示)相比,本发明的器件,由于采用阶梯型的终端外环3结构,在阶梯型、P+型的终端外环3和N-型碳化硅材质的第一导电类型外延层2之间形成多层次的P-N结界面结构,所以可以根据器件电参数特性,针对阶梯的层数、深度和宽度做三维调整,在承受反偏耐压时,能更好的分散表面电场强度,使器件表面峰值电场的电场分布可以变得更加平缓均匀,器件耐压时峰值处不易被击穿,因此可以有效提高器件的击穿电压。
Claims (6)
1.一种具有阶梯环结构的肖特基两级管,包括平面型肖特基金属区和氧化层保护区,平面型肖特基金属区位于器件的中心区,平面型肖特基金属区包括半导体基板,半导体基板包括第一导电类型重掺杂衬底(1)及位于第一导电类型重掺杂衬底(1)上表面的第一导电类型外延层(2),第一导电类型外延层(2)的上表面设有肖特基金属层(6),肖特基金属层(6)作为器件的阳极,在第一导电类型重掺杂衬底(1)的下表面连接有欧姆金属层(7),欧姆金属层(7)作为器件的阴极;所述氧化层保护区是设置在第一导电类型外延层(2)的上表面且与肖特基金属层(6)邻接的氧化层(5),其特征是:在第一导电类型外延层(2)内仅沿着肖特基金属层(6)和氧化层(5)的结合界面下方设有终端外环(3),由第一导电类型外延层(2)的上表面注入第二导电类型材料(4)而形成所述的终端外环(3);且所述终端外环(3)呈阶梯型结构,且终端外环(3)的宽度从上往下呈逐层缩小设置。
2.根据权利要求1所述的具有阶梯环结构的肖特基两级管,其特征是:所述肖特基金属层(6)的厚度为 100–1000 Å。
3.根据权利要求1所述的具有阶梯环结构的肖特基两级管,其特征是:所述氧化层(5)位于芯片周围,包围保护位于中间的平面型肖特基金属层(6)。
4.根据权利要求1所述的具有阶梯环结构的肖特基两级管,其特征是:所述第一导电类型为N型导电,第二导电类型为P型导电。
5.根据权利要求1所述的具有阶梯环结构的肖特基两级管,其特征是:所述欧姆金属层(7)的材质为Ti/Ni/Ag合金或者Ti/Ni/Al合金。
6.权利要求1至5任意一项所述的具有阶梯环结构的肖特基两级管的制造方法包括以下步骤:
步骤一. 提供第一导电类型重掺杂衬底(1),在第一导电类型重掺杂衬底(1)的上表面生长第一导电类型外延层(2),第一导电类型外延层(2)的上表面为第一主面,第一导电类型重掺杂衬底(1)的下表面为第二主面;
步骤二. 通过器件设计的图形化光刻板的遮挡,对第一主面进行第一次高温高能离子注入第二导电类型材料(4),在第一导电类型外延层(2)内形成左右两个第一层的第二导电类型体区(3),注入结束后采用湿法腐蚀或是热HF去掉表面氧化层;
步骤三. 通过器件设计的图形化光刻板的遮挡,对第一主面进行至少两次高温高能离子注入第二导电类型材料(4),每一次注入的宽度均大于上一次注入的宽度,每一次注入的深度均小于上一次注入的深度,在第一导电类型外延层(2)内再形成至少两层的第二导电类型体区(3),使得由多次高温高能离子注入第二导电类型材料(4)而形成的第二导电类型体区(3)呈阶梯型结构,该阶梯型结构的宽度从下往上呈逐层增大设置,每一次注入结束后采用湿法腐蚀或是热HF去掉表面氧化层,最后一次清除表面氧化层后,采用热氮气清除表面残留的杂质;
步骤四. 采用热氧化工艺,在第一导电类型外延层(2)和第二导电类型体区(3)的上方生长一层氧化层(5);
步骤五. 在图形化光刻板的遮挡下,在氧化层(5)的中间进行干法蚀刻,形成中间的肖特基金属区和边缘的氧化层保护区;
步骤六. 在肖特基金属区内镀上一层肖特基金属材料,形成肖特基金属层(6);
步骤七. 在第二主面镀上一层低电阻值的欧姆金属材料,形成欧姆金属层(7),欧姆金属层(7)作为器件的阴极。
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