CN111474457A - Test device for realizing power aging of field effect transistor - Google Patents
Test device for realizing power aging of field effect transistor Download PDFInfo
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- CN111474457A CN111474457A CN202010301204.4A CN202010301204A CN111474457A CN 111474457 A CN111474457 A CN 111474457A CN 202010301204 A CN202010301204 A CN 202010301204A CN 111474457 A CN111474457 A CN 111474457A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
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Abstract
The invention discloses a test device for realizing power burn-in of a field effect tube, which comprises a burn-in board and a monitoring board which are matched, wherein a test field effect tube is arranged on the burn-in board, a source electrode of the test field effect tube is connected with a sampling resistor, the voltage on the sampling resistor is fed back to the negative end of an amplification comparator and is compared with the preset voltage of the positive end of the amplification comparator, and the output end of the amplification comparator controls the grid electrode of the test field effect tube to realize power burn-in of the field effect tube; the voltage, the current and the junction temperature of the aging board during power-up work are monitored through the monitoring board, and are displayed in real time through the data display screen. The invention has good stability and strong universality, field effect transistors with large and small power can be aged by the testing device, and field effect transistors which are commonly packaged in the market can be aged with large power, so that the aging state is stable, the reliability is high, and the cost is low.
Description
Technical Field
The invention belongs to the field of reliability screening of electronic components, and particularly relates to a test device for realizing power aging of a field effect transistor.
Background
The power aging test is an important screening project for examining the reliability of the field effect transistor. According to GJB128 method for testing micro semiconductor discrete devices 1039 and 1042, power burn-in tests are used to eliminate potential devices or those devices that suffer from manufacturing defects, and these devices fail in time and stress dependent, and without burn-in, they fail early under normal operating conditions. The test operates the semiconductor device under specified conditions to reveal time and stress dependent electrical failure modes. The power aging equipment of the field effect transistor in the current market is large in size and large in noise, the adopted aging technical circuit excessively pursues the universality of various discrete devices, so that the devices are easy to oscillate and damaged during aging, the test tool is simple, different aging technical requirements of the field effect transistor cannot be met, the power aging test of different packaged field effect transistor devices cannot be guaranteed, and the operation is inconvenient.
Disclosure of Invention
The invention aims to solve the problems that power aging operation of field effect transistors is inconvenient and different aging technical requirements cannot be met in the prior art, and provides a test device for realizing power aging of the field effect transistors, so that various packaged field effect transistors can be subjected to power aging for a long time, the working voltage and current of a device are ensured not to oscillate, junction temperature is monitored in real time, and reliability is high.
In order to achieve the purpose, the invention discloses a device for realizing power aging test of a field effect transistor, which adopts the following scheme: the power aging device comprises an aging plate and a monitoring plate which are arranged in a matched mode, a testing field effect tube is installed on the aging plate, a source electrode of the testing field effect tube is connected with a sampling resistor, voltage on the sampling resistor is fed back to the negative end of an amplification comparator and is compared with preset voltage of the positive end of the amplification comparator, the output end of the amplification comparator controls a grid electrode of the testing field effect tube, and power aging of the field effect tube is achieved; the voltage, the current and the junction temperature of the aging board during power-up work are monitored through the monitoring board, and are displayed in real time through the data display screen.
As a preferred scheme of the field effect tube power aging test device, the aging plate and the monitoring plate are separately packaged in the same equipment frame, a plurality of aging plates are inserted in the aging box, and a plurality of aging stations are arranged on the aging plates; the test field effect tube is installed on the aging station through the heat dissipation tool clamp.
As a preferable scheme of the field effect transistor power aging test device, the heat dissipation tool fixture is adapted TO multiple field effect transistor packaging forms such as F2, F1, TO-220, TO-254, TO-257, SMD0.5, SMD1.0 and SMD 2.0.
As a preferred scheme of the field effect transistor power aging test device, the aging board is connected with an aging power supply and a current control knob, and the aging power supply and the current control knob are matched for use to enable the field effect transistor to perform steady-state power aging.
As a preferred scheme of the field effect transistor power aging test device, the aging power supply is arranged below an equipment frame, the upper part of the equipment frame is divided into a front part and a rear part, an aging plate is arranged at the front part of the equipment frame, a monitoring plate is arranged at the rear part of the equipment frame, and the monitoring plates correspond to the aging plate one by one through special interface sockets.
As a preferred scheme of the field effect transistor power aging test device, a plurality of fans are arranged on the left side and the right side of the front part of the equipment frame for air cooling and heat dissipation, the fans supply air from the lower part of one side of the equipment and exhaust air from the upper part of the other side of the equipment, the air flow rate is fully utilized for heat dissipation, and the influence on the environment and other nearby equipment is reduced.
As a preferred scheme of the field effect transistor power aging test device, a current control end outputs corresponding voltage by adjusting a current control knob, and the aging stations are not interfered with each other by the isolation of a follower; the voltage on the positive end of the amplification comparator is kept consistent with the voltage of the current control end at the moment, and according to the working principle of the comparator, the voltage on the negative feedback end, namely the sampling resistor, is also consistent with the voltage of the current control end at the moment; the current control end realizes the purpose of current regulation by controlling the voltage value on the sampling resistor; the accurate voltage values at the two ends of the sampling resistor enter the monitoring board through the differential pressure comparator, and the data entering the monitoring board simultaneously comprises drain voltages of all the testing field effect tubes and shell temperatures of the testing field effect tubes at all stations.
As a preferred scheme of the field effect transistor power aging test device, the steady state aging data of the field effect transistor, including drain-source voltage, drain-source current and junction temperature, are calculated according to the resistance values of the thermal resistance and the sampling resistor.
Compared with the prior art, the invention has the following beneficial effects: the stability is good, the source electrode of the test field effect tube is connected with the sampling resistor, the voltage on the sampling resistor is fed back to the negative end of the amplification comparator and is compared with the preset voltage of the positive end of the amplification comparator, the output end of the amplification comparator controls the grid electrode of the test field effect tube, the power aging of the field effect tube is realized, the field effect tube cannot oscillate under the condition of voltage and current which can be provided by equipment, and the problem that common field effect tube aging equipment in the market is easy to oscillate under the high-voltage and low-current states to cause damage to devices is solved; the field effect transistor with high universality and high and low power can be aged through the testing device, and high-power aging can be carried out on field effect transistors which are commonly packaged in the market. The invention has simple structure, stable aging state, high reliability, low cost, support of various packaging forms and strong expansibility.
Furthermore, the aging plate is simple in design, the aging plate and the monitoring plate are separately packaged in the same equipment frame, the aging plates are inserted into the aging box, a plurality of aging stations are arranged on the aging plates, the testing field effect tubes are mounted on the aging stations through the heat dissipation tool fixtures, and the monitoring plates correspond to the aging plates one by one through special interface sockets.
Drawings
FIG. 1 is a schematic circuit diagram of a field effect transistor power burn-in test apparatus of the present invention;
FIG. 2 is a layout diagram of the design of the burn-in board of the present invention;
FIG. 3 is a front view of the apparatus frame of the present invention;
FIG. 4 is a side view of the apparatus frame of the present invention;
FIG. 5 is a schematic view of a heat dissipation fixture according to an embodiment of the present invention;
FIG. 6 is a schematic view of a second heat dissipation fixture according to an embodiment of the present invention;
in the drawings: 1-aging a plate; 2-a monitoring board; 3-aging a power supply; 4-current control knob; 5-aging in a box; 11-device mounting area; 12-a shell temperature monitoring device; 13-a terminal post; 14-connecting lines; 15-golden finger; 6-equipment main power supply control area; 7-data display screen.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and examples.
Referring to fig. 1, the device for testing power burn-in of the field effect transistor according to the present invention connects the source of the field effect transistor to the sampling resistor, feeds the voltage on the sampling resistor back to the negative terminal of the amplification comparator, compares the voltage with the preset voltage of the positive terminal of the amplification comparator, controls the gate of the field effect transistor by the output terminal of the amplification comparator, and realizes power burn-in of the field effect transistor. An isolation loop, a filtering loop and an anti-interference device are designed in the circuit structure, so that the reliable implementation of the circuit is guaranteed, and the multipath devices can not interfere with each other to operate.
Referring to fig. 2, the test device of the invention designs a aging plate 1 and a monitoring plate 2 which are matched, wherein the aging plate 1 is provided with a plurality of aging stations, and a test field effect tube is arranged on the aging stations through a heat dissipation tool clamp. The heat dissipation tool clamp is adaptive TO various packages, the packaging forms of F2, F1, TO-220, TO-254, TO-257, SMD0.5, SMD1.0 and SMD2.0 field effect tubes are met, and the voltage, the current and the junction temperature of the aging board 1 during power-up work are monitored through the monitoring board 2.
Referring to fig. 3-4, the aging board 1 and the monitoring board 2 are separately packaged in the same equipment frame, a plurality of aging boards 1 are inserted in the aging box 5, the aging board 1 is connected with an aging power supply 3 and a current control knob 4, and the aging boards and the aging power supply are matched to use to enable the field effect transistor to perform stable power aging. The aging power supply 3 is arranged below the equipment frame, the upper part of the equipment frame is divided into a front part and a rear part, the aging plate 1 is arranged at the front part of the equipment frame, the monitoring plate 2 is arranged at the rear part of the equipment frame, and the monitoring plate 2 is in one-to-one correspondence with the aging plate 1 through a special interface socket. The left and right sides of the front part of the equipment frame are provided with a plurality of fans for air cooling and heat dissipation, the fans intake air from the lower part of one side of the equipment and exhaust air from the upper part of the other side, the air flow rate is fully utilized for heat dissipation, and the influence on the environment and other nearby equipment is reduced. The testing device can simultaneously burn in a plurality of large and small power field effect transistors, and is high in production efficiency.
Examples
For illustration, a common fet IRF540N is selected as an example, and the package type TO-220 is selected as a heat dissipation fixture shown in fig. 5, and the device is mounted TO the TO package mounting position. And then installing a heat dissipation tool clamp on any aging station of the aging plate. The aging board is inserted into an aging box 5 in the frame structure of the equipment, and the preparation work is completed before aging.
The aging power supply 3 and the current control knob 4 are matched for use to enable the field effect transistor to perform steady-state power aging. The specific internal operating conditions are explained in conjunction with fig. 1 as follows: the current control knob 4 is rotated, the current control end outputs corresponding voltage, and the aging stations are not interfered with each other through the isolation of OP07 serving as a follower; the voltage on the positive terminal of the comparator OP07 which is used for controlling the grid of the test device is kept consistent with the voltage of the current control terminal at the moment, and according to the working principle of the comparator, the voltage on the negative feedback terminal, namely the sampling resistor, is also consistent with the voltage of the current control terminal at the moment; and finally, the current control end realizes the purpose of current regulation by controlling the voltage value on the sampling resistor. The accurate voltage values at the two ends of the sampling resistor enter the monitoring plate 2 through the differential pressure comparator OP07, and the data entering the monitoring plate 2 comprise the drain voltages of all the experimental devices and the shell temperatures of the experimental devices at all stations. And calculating the steady state aging data of the field effect transistor according to the data of the thermal resistance, the resistance value of the sampling resistor and the like which are input into the data display screen in advance, wherein the steady state aging data comprises drain-source voltage, drain-source current, junction temperature and the like. And the data detection board measures aging data of the field effect transistor in the whole process and displays the aging data on the data display screen in real time.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the technical solution of the present invention, and it should be understood by those skilled in the art that the technical solution can be modified and replaced by a plurality of simple modifications and replacements without departing from the spirit and principle of the present invention, and the obvious modifications and replacements also belong to the scope covered by the claims.
Claims (8)
1. The utility model provides a realize field effect transistor power burn-in test device which characterized in that: the power aging device comprises an aging plate (1) and a monitoring plate (2) which are arranged in a matched mode, a testing field effect tube is installed on the aging plate (1), a source electrode of the testing field effect tube is connected with a sampling resistor, voltage on the sampling resistor is fed back to the negative end of an amplification comparator and compared with preset voltage of the positive end of the amplification comparator, the output end of the amplification comparator controls a grid electrode of the testing field effect tube, and power aging of the field effect tube is achieved; the voltage, the current and the junction temperature of the aging board (1) during power-on work are monitored through the monitoring board (2) and displayed in real time through the data display screen.
2. The device for testing the power aging of the field effect transistor according to claim 1, wherein: the aging plate (1) and the monitoring plate (2) are separately packaged in the same equipment frame, a plurality of aging plates (1) are inserted in the aging box (5), and a plurality of aging stations are arranged on the aging plates (1); the test field effect tube is installed on the aging station through the heat dissipation tool clamp.
3. The device for testing the power aging of the field effect transistor according to claim 2, wherein: heat dissipation frock clamp adaptation F2, F1, TO-220, TO-254, TO-257, SMD0.5, SMD1.0, SMD2.0 field effect tube packaging form.
4. The device for testing the power aging of the field effect transistor according to claim 1, wherein: the aging board (1) is connected with an aging power supply (3) and a current control knob (4), and the aging power supply and the current control knob are matched to use so that the field effect transistor is used for aging in steady-state power.
5. The device for testing the power aging of the field effect transistor according to claim 4, wherein: the aging power supply (3) is arranged below the equipment frame, the upper part of the equipment frame is divided into a front part and a rear part, the aging plate (1) is arranged at the front part of the equipment frame, the monitoring plate (2) is arranged at the rear part of the equipment frame, and the monitoring plate (2) is in one-to-one correspondence with the aging plate (1) through a special interface socket.
6. The device for testing the power aging of the field effect transistor according to claim 5, wherein: the left side and the right side of the front part of the equipment frame are provided with a plurality of fans for air cooling and heat dissipation, the fans supply air from the lower part of one side of the equipment and exhaust air from the upper part of the other side, air flow rate is fully utilized for heat dissipation, and influences on the environment and other nearby equipment are reduced.
7. The device for testing the power aging of the field effect transistor according to claim 4, wherein: a current control knob (4) is adjusted, a current control end outputs corresponding voltage, the voltage is isolated by a follower, and aging stations are not interfered with each other; the voltage on the positive end of the amplification comparator is kept consistent with the voltage of the current control end at the moment, and according to the working principle of the comparator, the voltage on the negative feedback end, namely the sampling resistor, is also consistent with the voltage of the current control end at the moment; the current control end realizes the purpose of current regulation by controlling the voltage value on the sampling resistor; the accurate voltage values at two ends of the sampling resistor enter the monitoring plate (2) through the differential pressure comparator, and data entering the monitoring plate (2) comprise drain voltage of all testing field effect tubes and shell temperature of the testing field effect tubes at each station.
8. The device for testing the power aging of the field effect transistor according to claim 7, wherein: and calculating the steady state aging data of the field effect tube according to the thermal resistance and the resistance value of the sampling resistor, wherein the steady state aging data comprises drain-source voltage, drain-source current and junction temperature.
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Cited By (6)
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CN112557860A (en) * | 2020-11-02 | 2021-03-26 | 中国南方电网有限责任公司超高压输电公司广州局 | Aging method of IGBT switch of buck converter circuit under power frequency |
CN112630571A (en) * | 2020-12-24 | 2021-04-09 | 贵州航天计量测试技术研究所 | Dynamic aging test device for power driving module and test method thereof |
CN112698172A (en) * | 2020-11-27 | 2021-04-23 | 北京无线电计量测试研究所 | Device and method for realizing electric aging |
CN112946322A (en) * | 2021-03-31 | 2021-06-11 | 四创电子股份有限公司 | Extensible microwave component aging test system |
CN113589132A (en) * | 2021-08-30 | 2021-11-02 | 中国振华集团永光电子有限公司(国营第八七三厂) | High-temperature aging reverse bias test device suitable for transistor and field effect transistor |
CN115308453A (en) * | 2022-10-10 | 2022-11-08 | 杭州三海电子有限公司 | Burn-in test fixture and burn-in test system |
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CN112630571A (en) * | 2020-12-24 | 2021-04-09 | 贵州航天计量测试技术研究所 | Dynamic aging test device for power driving module and test method thereof |
CN112946322A (en) * | 2021-03-31 | 2021-06-11 | 四创电子股份有限公司 | Extensible microwave component aging test system |
CN113589132A (en) * | 2021-08-30 | 2021-11-02 | 中国振华集团永光电子有限公司(国营第八七三厂) | High-temperature aging reverse bias test device suitable for transistor and field effect transistor |
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Application publication date: 20200731 |