CN212622913U - Crimping type power semiconductor device and temperature distribution measuring system thereof - Google Patents

Crimping type power semiconductor device and temperature distribution measuring system thereof Download PDF

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CN212622913U
CN212622913U CN202020917871.0U CN202020917871U CN212622913U CN 212622913 U CN212622913 U CN 212622913U CN 202020917871 U CN202020917871 U CN 202020917871U CN 212622913 U CN212622913 U CN 212622913U
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type power
semiconductor device
power semiconductor
crimping type
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邓二平
张一鸣
郭佳奇
陈杰
赵雨山
赵志斌
崔翔
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North China Electric Power University
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North China Electric Power University
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Abstract

The utility model relates to a crimping type power semiconductor device and temperature distribution measurement system thereof. The grid electrode of each semiconductor chip of the crimping type power semiconductor device is respectively connected to the interface terminal of the PCB, so that the junction temperature of each semiconductor chip of the crimping type power semiconductor device can be conveniently measured, and the accuracy of temperature distribution measurement is further improved. The temperature distribution measuring system of the crimping type power semiconductor device enables the crimping type power semiconductor device to be tested to be periodically switched on and off by adopting the time sequence driving circuit so as to simulate the heating condition of the crimping type power semiconductor device under different working conditions. And by matching with the time sequence of the measuring branch switch, the accurate time sequence measurement of the junction temperature distribution of each semiconductor chip can be realized, and the limitation that the average junction temperature of each semiconductor chip can only be obtained by the existing measuring method is broken through.

Description

Crimping type power semiconductor device and temperature distribution measuring system thereof
Technical Field
The utility model relates to a semiconductor device and temperature measurement technical field especially relate to a crimping type power semiconductor device and temperature distribution measurement system thereof.
Background
With the development of the flexible dc power transmission technology, an Insulated Gate Bipolar Transistor (IGBT) device is increasingly regarded as a key device in a converter valve and a circuit breaker. In recent years, a crimping and packaging type IGBT device has the advantages of high power density, easiness in series connection, failure short circuit and the like compared with a traditional welding type IGBT module, and is gradually applied to occasions of high-voltage and high-power transmission.
For a multi-chip large-scale parallel connection grouped crimping type IGBT device, due to the interaction of internal physical fields, junction temperatures of semiconductor chips are different, and further the performance and reliability of the device are affected. Therefore, accurate measurement of the junction temperature of each semiconductor chip becomes one of the most significant concerns in the application of the crimp-type IGBT device.
Due to the particularity of the compression joint packaging form, an infrared temperature measurement method and a contact temperature measurement method which are widely applied to the welding packaging form are difficult to be applied to temperature measurement of compression joint devices. The temperature measuring method widely applied to the crimping type IGBT device at present is a thermal sensitive electrical parameter method, and the principle of the method is that the relation between the saturation voltage drop and the junction temperature of the device under low current is firstly obtained, and then the junction temperature of the device is obtained through conversion by measuring the saturation voltage drop of the device under low current. For a single chip device, the temperature-sensitive electrical parameter method can obtain the junction temperature of the chip to meet the measurement requirement, but for a multi-chip device, the temperature-sensitive electrical parameter method can only obtain the average junction temperature of all chips, and cannot accurately obtain the distribution condition of the junction temperature of each semiconductor chip.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a crimping type power semiconductor device and temperature distribution measurement system thereof to solve the problem that can not accurately obtain the junction temperature distribution condition of each semiconductor chip that exists among the prior art, and have characteristics such as simple structure, measurement accuracy.
In order to achieve the above object, the utility model provides a following scheme:
a crimping-type power semiconductor device comprising: the PCB comprises a plurality of sub-modules, a plurality of bosses and a PCB; the sub-modules are arranged on the bosses in a one-to-one correspondence manner; the PCB is provided with a plurality of through holes, and the bosses are arranged in the through holes; the PCB is provided with a plurality of interface terminals;
the sub-module comprises: an upper molybdenum sheet, a semiconductor chip and a lower molybdenum sheet;
the semiconductor chip is arranged between the upper molybdenum sheet and the lower molybdenum sheet; the grid electrodes of the semiconductor chips are connected with the interface terminals on the PCB in a one-to-one correspondence manner;
the PCB is used for driving each sub-module; the upper molybdenum sheet and the lower molybdenum sheet form a stress buffer area.
Preferably, the crimp-type power semiconductor device further includes: a collector plate and an emitter plate;
the collector electrode plate and the emitter electrode plate are used for being connected with an external circuit; and the collector electrode plate, the upper molybdenum sheet, the semiconductor chip, the lower molybdenum sheet and the emitter electrode plate form a current loop.
Preferably, the sub-module further comprises: the number of the sub-module frames is the same as that of the sub-modules; the sub-module frame is sleeved on the sub-module; the sub-module frame is used for fixing the sub-module.
Preferably, the sub-module further comprises: a silver pad; the silver gasket is arranged between the lower molybdenum sheet and the boss; the silver pads are used for compensating height tolerance of components in each sub-module.
Preferably, the crimp-type power semiconductor device further includes: connecting a lead wire externally; the number of the external leads is the same as that of the interface terminals on the PCB, and the external leads are connected with the interface terminals in a one-to-one correspondence manner.
A temperature distribution measuring system of a crimping type power semiconductor device is used for measuring the temperature distribution of the crimping type power semiconductor device; the temperature distribution measuring system includes: the test circuit comprises a first current source, a test branch switch, a second current source, a time sequence driving circuit and a probe;
the first current source, the test branch switch and the to-be-tested crimping type power semiconductor device are sequentially connected in series to form a heating path; the first current source is used for providing heating current; the test branch switch is used for controlling the heating path to be switched on and off;
the second current source and the probe are connected with the to-be-tested crimping type power semiconductor device in parallel; the second current source is used for providing a measuring current; the probe is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device;
the time sequence driving circuit is connected with an interface terminal on a PCB board in the crimping type power semiconductor device to be tested through an external lead; and the time sequence driving circuit is used for controlling the connection and disconnection of each semiconductor chip in the to-be-tested crimping type power semiconductor device.
Preferably, the probe comprises a voltage probe;
the voltage probe is connected with the to-be-tested crimping type power semiconductor device in parallel; and the voltage probe is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device.
According to the utility model provides a concrete embodiment, the utility model discloses a following technological effect:
the utility model provides a crimping type power semiconductor device connects each semiconductor chip's grid respectively on the interface terminal of PCB board to in measuring crimping type power semiconductor device each semiconductor chip's junction temperature, and then improve the measuring accuracy of temperature distribution.
And, the utility model provides a crimping type power semiconductor device's temperature distribution measurement system makes crimping type power semiconductor device that awaits measuring carry out the cycle through adopting chronogenesis drive circuit and cuts off to the condition of generating heat of simulation crimping type power semiconductor device under different work condition. And by matching with the time sequence of the measuring branch switch, the accurate time sequence measurement of the junction temperature distribution of each semiconductor chip can be realized, and the limitation that the average junction temperature of each semiconductor chip can only be obtained by the existing measuring method is broken through.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a crimping type power semiconductor device according to the present invention;
fig. 2 is a schematic diagram illustrating the connection between the gates of the semiconductor chips and the interface terminals on the PCB according to an embodiment of the present invention;
fig. 3 is a circuit diagram of a temperature distribution measuring system of a crimping type power semiconductor device according to the present invention;
fig. 4 is a schematic diagram of the gate voltage applying timing sequence of each semiconductor chip in the calibration process according to the embodiment of the present invention;
fig. 5 is a schematic diagram of a conversion process for obtaining calibration curves of each semiconductor chip according to an embodiment of the present invention;
FIG. 6 is a timing diagram of the driving control in the embodiment of the present invention;
fig. 7 is a schematic diagram of a conversion process for obtaining temperature distribution of each semiconductor chip according to an embodiment of the present invention.
Symbolic illustrations in the drawings:
the device comprises a collector electrode plate 1, an upper molybdenum sheet 2, a semiconductor chip 3, a grid electrode of a semiconductor chip 3-1, a lower molybdenum sheet 4, a silver gasket 5, a boss 6, a sub-module frame 7, a PCB 8, an interface terminal 8-1, an emitter electrode plate 9, an electrode flange 10, a ceramic tube shell 11, an external lead 12, a first current source 21, a test branch switch 22, a device to be tested 23, a second current source 24 and a probe 25.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model aims at providing a crimping type power semiconductor device and temperature distribution measurement system thereof to solve the problem that can not accurately obtain the junction temperature distribution condition of each semiconductor chip that exists among the prior art, and have characteristics such as simple structure, measurement accuracy.
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
Fig. 1 is a schematic structural diagram of a crimping type power semiconductor device provided by the present invention, as shown in fig. 1, a crimping type power semiconductor device includes: the collector electrode plate 1, a plurality of sub-modules (not specifically labeled in fig. 1), a boss 6, a PCB 8, a ceramic package 11 and an external lead 12.
The sub-modules are arranged on the bosses 6 in a one-to-one correspondence manner; the PCB is provided with a plurality of through holes, and the bosses are arranged in the through holes; the PCB board 8 is provided with a plurality of interface terminals 8-1; the boss 6 is used for supporting the sub-modules and positioning each sub-module.
The sub-module comprises: an upper molybdenum sheet 2, a semiconductor chip 3, a lower molybdenum sheet 4, a silver gasket 5 and a sub-module frame 7.
The semiconductor chip 3 is arranged between the upper molybdenum sheet 2 and the lower molybdenum sheet 4; the grid 3-1 of the semiconductor chip 3 is correspondingly connected with the interface terminals 8-1 on the PCB 8 one by one; the specific connection relationship is shown in fig. 2.
The collector electrode plate 1 and the emitter electrode plate 9 are used for being connected with an external circuit;
the PCB 8 is used for driving each sub-module; the upper molybdenum sheet 2 and the lower molybdenum sheet 4 form a stress buffer area, so that the stress distribution of the semiconductor chip 3 is more uniform, and the protection effect is achieved.
The silver gasket 5 is arranged between the lower molybdenum sheet 4 and the boss 6; the silver pads 5 are used to compensate for the height tolerance of the components in each of the sub-modules.
The sub-module frame 7 is sleeved on the sub-module; the sub-module frame 7 is used for fixing the sub-module.
The number of the external leads 12 is the same as that of the interface terminals 8-1 on the PCB board 8, and the external leads 12 are connected with the interface terminals 8-1 in a one-to-one correspondence manner. The PCB board 8 and the leads 12 are used to provide gate driving signals. In order to cooperate with the temperature distribution time sequence measuring method, for the PCB board among the current commercial device, the utility model discloses each drive circuit among the PCB board 8 that adopts is independent control.
In addition, in order to protect the device from external contamination, the crimping type power semiconductor device may further include an electrode flange 10 and a ceramic package 11 to provide a sealed environment thereto.
The utility model also correspondingly provides a temperature distribution measuring system of the crimping type power semiconductor device, which is used for measuring the temperature distribution of the crimping type power semiconductor device; in the process of measuring the temperature of a crimping type power semiconductor device, a collector electrode plate 1 and an emitter electrode plate 9 are connected with an external circuit, the collector electrode plate 1, an upper molybdenum sheet 2, a semiconductor chip 3, a lower molybdenum sheet 4, a silver gasket 5, a boss 6 and the emitter electrode plate 9 form a current and heat flow path, a grid electrode of the semiconductor chip 3 is connected with an external driving circuit through a PCB (printed circuit board) 8 and a lead 12, and then is led out of the device through an external lead 12 in the figure 1 and connected with the driving circuit, so that the grid electrodes of the semiconductor chips connected in parallel are independently controlled, and the timing control of driving signals is matched, thereby breaking through the limitation that the grid electrodes of the semiconductor chips connected in parallel are controlled together in the existing measuring mode, and only the average junction temperature of the device can.
Fig. 3 is a schematic structural diagram of a temperature distribution measurement system of a crimping type power semiconductor device, as shown in fig. 3, the temperature distribution measurement system includes: first current source 21 (current source I)heating) A test branch switch 22, a second current source 24 (current source I)sense) A timing drive circuit (not shown in fig. 3) and a probe 25 (probe V).
The first current source 21, the test branch switch 22 and the to-be-tested crimping type power semiconductor device (to-be-tested device 23) are sequentially connected in series to form a heating path; the first current source 21 is used for providing heating current; the test branch switch 22 is used to control the heating path to be turned on and off.
The second current source 24 and the probe 25 are both connected with the to-be-tested crimping type power semiconductor device in parallel; the second current source 24 is used for providing a measuring current; the probe 25 is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device.
The time sequence driving circuit is connected with an interface terminal 8-1 on a PCB 8 in the to-be-tested crimping type power semiconductor device through an external lead 12; the time sequence driving circuit is used for controlling the connection and disconnection of each semiconductor chip 3 in the crimping type power semiconductor device to be tested.
The probe 25 may comprise a voltage probe.
The voltage probe is connected with the to-be-tested crimping type power semiconductor device in parallel; and the voltage probe is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device.
Further, the first connection end of the voltage probe is connected with the collector electrode plate 1 of the to-be-tested crimping type power semiconductor device, and the second connection end of the voltage probe is connected with the emitter electrode plate 9 of the to-be-tested crimping type power semiconductor device.
Specifically, each semiconductor chip gate signal g in the dut 231,g2,…,gnBy means of FIG. 2The PCB board 8 is led out and connected with an external driving circuit. The voltage probe is connected with the collector plate 1 and the emitter plate 9 of the device shown in fig. 1 and is used for recording the voltage drop at two ends of the to-be-tested crimping type power semiconductor device in real time. Current source IsenseProviding a small direct current (usually tens of milliamperes) for measurement, and measuring the saturation voltage drop VceThe magnitude of the current is enough to make VceThe saturation value is exceeded, the linear relation with the junction temperature of the chip is better, and the self-heating effect under large current can be avoided. Current source IheatingFor heating the current, by testing the branch switch S1And controlling the on-off of the branch to realize the heating of the pressure welding type power semiconductor device to be tested under different working conditions. Compared with the prior art in which the gates of all the semiconductor chips are controlled together, the gates of all the semiconductor chips are controlled by the PCB 8 through an external driving circuit in the measurement process, so that the junction temperature of each semiconductor chip can be measured in time sequence.
Adopt the utility model provides a temperature distribution measurement system carries out the measured step to the temperature distribution of above-mentioned crimping type power semiconductor device and divide into two, and the first step is each semiconductor chip electrical parameter V of calibrationceAs a function of junction temperature Tj; and the second step is to periodically measure the junction temperature of each semiconductor chip in the DUT according to the calibration curve.
The method comprises the following steps: measuring electrical parameters V of each semiconductor chipceJunction temperature TjObtaining a calibration curve
11) Test branch switch S as described in fig. 3 during calibration1Cutting off and measuring the current IsenseThe DUT flows through the DUT, and the DUT and the corresponding measuring clamp are placed in the incubator. The constant temperature box is raised to a specified temperature (manually set according to requirements), and then the saturated pressure drop V at two ends of the device is recorded in real time through the probe V in the cooling processceValue and temperature T of DUTj. In the cooling process, the grid g of each semiconductor chip is controlled by an external drive circuit1,g2,…,gnSequentially turning on and off, and periodically circulating to make the measuring current IsenseSequentially flows through all semiconductor chips to keep the chip at a constant temperatureAll parallel chips can be calibrated at one time under the condition of keeping the original packaging structure, and the time sequence of the driving signal is shown in figure 4.
12) Recording the saturation voltage drop V of the two ends of the DUTceValue and temperature TjIs converted into the saturation voltage drop V of each semiconductor chipceValue and temperature TjTo obtain a calibration curve.
The above conversion process is shown in FIG. 5, according to V measured in step 11) at different timesceAnd TjData, can obtain the saturation voltage drop V of the DUT both ends of the device to be tested at different momentsceAnd TjPoint-by-point correspondence of (V)ce,Tj). Furthermore, in conjunction with the conduction status of each semiconductor chip at different times in fig. 4, (V) at the corresponding time when different semiconductor chips are conducted can be respectively setce,Tj) The wires are connected to generate a calibration curve for each semiconductor chip.
Step two: the junction temperature of each semiconductor chip in the device to be tested DUT is periodically measured according to the calibration curve to obtain the junction temperature distribution of each semiconductor chip in the device to be tested DUT.
21) During the temperature measurement, the circuit described in FIG. 3 includes a test branch switch S1Signal G in part (a) of fig. 61Is periodically switched on and off under the control of (1). When testing branch switch S1When it is on, the current source IheatingThe DUT is warmed up. When testing branch switch S1When the DUT is turned off, the DUT is cooled down, and the temperature of each semiconductor chip in the DUT is shown in part (b) of fig. 6. In the cooling process of the DUT (device under test) with different periods, the current source IsenseThrough the section (b) in fig. 6 to the section (f) in fig. 6, the timing control of the driving signal sequentially flows through the semiconductor chips, and at the same time, the saturation voltage drop V across the DUT is recorded in real time by the voltage probeceThe numerical value of (c).
22) According to the calibration curve of each semiconductor chip obtained in the step one, the saturated voltage drop V at two ends of the device is obtainedceTo the junction temperature of each semiconductor chip. The conversion process is shown in fig. 7. First, part (b) of FIG. 6And 6(f) controlling the time sequence by the driving signal, and determining the number of the semiconductor chip switched on in the cooling process of each period. Next, V of each semiconductor chip obtained in the first step is selectedce-TjCalibrating the curve, i.e. the saturated voltage drop V at both ends of the DUTceTo the junction temperature of the corresponding semiconductor chip. Finally, because the DUT reaches a steady state in the periodic heating process, and the junction temperature distribution of each semiconductor chip in the DUT is the same in each period, the junction temperature distribution of each semiconductor chip in the same period can be equivalently obtained through the process.
In a word, compare with the average junction temperature that present temperature sensitive electrical parameter method can only obtain the device that awaits measuring, the utility model provides a temperature distribution measurement system can obtain the junction temperature of different semiconductor chips in different periods through the independent control to each semiconductor chip grid, and then obtains the junction temperature distribution of each semiconductor chip in same period, provides the reliability reference for the design of crimping type power semiconductor device.
The DUT that is adopted in the above-mentioned measurement process is the utility model provides a crimping type power semiconductor device, but is not limited to this.
Compared with the closest prior art, the technical scheme provided by the novel use has the following advantages:
1. the existing crimping type IGBT device junction temperature measurement technology adopts a thermal sensitive electrical parameter method, can only measure the average junction temperature of each semiconductor chip, and can not obtain the junction temperature distribution condition among the semiconductor chips. The utility model provides a technical scheme is through being the independent control with the design of grid drive circuit, and through the chronogenesis cooperation with measuring branch switch, can obtain each semiconductor chip's junction temperature distribution under the different work condition.
2. The utility model provides a technical scheme has only carried out optimal design to the gate drive return circuit, and the transformation part is few, changes in a flexible way, the scientific research of being convenient for. In addition, the device can be conveniently integrated in a device, and the aging condition of each semiconductor chip in the device is evaluated in an off-line condition.
3. The utility model provides a technical scheme can also realize the quick calibration of many semiconductor chip electrical parameters and junction temperature relation through the independent control of each semiconductor chip grid, further facilitates for the measurement of the junction temperature distribution of each semiconductor chip.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principle and the implementation of the present invention are explained herein by using specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the concrete implementation and the application scope. In summary, the content of the present specification should not be construed as a limitation of the present invention.

Claims (7)

1. A crimp-type power semiconductor device, characterized by comprising: the PCB comprises a plurality of sub-modules, a plurality of bosses and a PCB; the sub-modules are arranged on the bosses in a one-to-one correspondence manner; the PCB is provided with a plurality of through holes, and the bosses are arranged in the through holes; the PCB is provided with a plurality of interface terminals;
the sub-module comprises: an upper molybdenum sheet, a semiconductor chip and a lower molybdenum sheet;
the semiconductor chip is arranged between the upper molybdenum sheet and the lower molybdenum sheet; the grid electrodes of the semiconductor chips are connected with the interface terminals on the PCB in a one-to-one correspondence manner;
the PCB is used for driving each sub-module; the upper molybdenum sheet and the lower molybdenum sheet form a stress buffer area.
2. The crimp-type power semiconductor device according to claim 1, further comprising: a collector plate and an emitter plate;
the collector electrode plate and the emitter electrode plate are used for being connected with an external circuit; and the collector electrode plate, the upper molybdenum sheet, the semiconductor chip, the lower molybdenum sheet and the emitter electrode plate form a current loop.
3. The crimping type power semiconductor device according to claim 1, wherein the sub-module further comprises: the number of the sub-module frames is the same as that of the sub-modules; the sub-module frame is sleeved on the sub-module; the sub-module frame is used for fixing the sub-module.
4. The crimping type power semiconductor device according to claim 1, wherein the sub-module further comprises: a silver pad; the silver gasket is arranged between the lower molybdenum sheet and the boss; the silver pads are used for compensating height tolerance of components in each sub-module.
5. The crimp-type power semiconductor device according to claim 1, further comprising: connecting a lead wire externally; the number of the external leads is the same as that of the interface terminals on the PCB, and the external leads are connected with the interface terminals in a one-to-one correspondence manner.
6. A temperature distribution measuring system of a crimping type power semiconductor device, characterized by measuring a temperature distribution of the crimping type power semiconductor device according to any one of claims 1 to 5; the temperature distribution measuring system includes: the test circuit comprises a first current source, a test branch switch, a second current source, a time sequence driving circuit and a probe;
the first current source, the test branch switch and the to-be-tested crimping type power semiconductor device are sequentially connected in series to form a heating path; the first current source is used for providing heating current; the test branch switch is used for controlling the heating path to be switched on and off;
the second current source and the probe are connected with the to-be-tested crimping type power semiconductor device in parallel; the second current source is used for providing a measuring current; the probe is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device;
the time sequence driving circuit is connected with an interface terminal on a PCB board in the crimping type power semiconductor device to be tested through an external lead; and the time sequence driving circuit is used for controlling the connection and disconnection of each semiconductor chip in the to-be-tested crimping type power semiconductor device.
7. The temperature distribution measuring system of the crimping type power semiconductor device according to claim 6, wherein the probe includes a voltage probe;
the voltage probe is connected with the to-be-tested crimping type power semiconductor device in parallel; and the voltage probe is used for measuring the saturation voltage drop of the to-be-measured crimping type power semiconductor device.
CN202020917871.0U 2020-05-27 2020-05-27 Crimping type power semiconductor device and temperature distribution measuring system thereof Active CN212622913U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113514747A (en) * 2021-04-15 2021-10-19 华电(烟台)功率半导体技术研究院有限公司 Electrical method for measuring temperature distribution of power electronic device
CN115993516A (en) * 2023-03-23 2023-04-21 深圳平创半导体有限公司 Method and system for measuring junction temperature distribution inside crimping type power semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113514747A (en) * 2021-04-15 2021-10-19 华电(烟台)功率半导体技术研究院有限公司 Electrical method for measuring temperature distribution of power electronic device
CN115993516A (en) * 2023-03-23 2023-04-21 深圳平创半导体有限公司 Method and system for measuring junction temperature distribution inside crimping type power semiconductor device
CN115993516B (en) * 2023-03-23 2023-06-20 深圳平创半导体有限公司 Method and system for measuring junction temperature distribution inside crimping type power semiconductor device

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