CN105510794B - High electron mobility transistor PHEMT thermo-resistance measurement methods - Google Patents
High electron mobility transistor PHEMT thermo-resistance measurement methods Download PDFInfo
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- CN105510794B CN105510794B CN201610015695.XA CN201610015695A CN105510794B CN 105510794 B CN105510794 B CN 105510794B CN 201610015695 A CN201610015695 A CN 201610015695A CN 105510794 B CN105510794 B CN 105510794B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N25/00—Investigating or analyzing materials by the use of thermal means
- G01N25/20—Investigating or analyzing materials by the use of thermal means by investigating the development of heat, i.e. calorimetry, e.g. by measuring specific heat, by measuring thermal conductivity
Abstract
A kind of test method of high electron mobility transistor PHEMT thermal resistances disclosed by the invention, it is accurate using thermometric of the present invention, PHEMT damages and test error are not easily caused, the technical scheme is that：Current source loading current between the drain-source of PHEMT transistors is provided by semiconductor thermal resistance test equipment T3ster, the raceway groove of PHEMT transistors is heated by the internal resistance of pipe, then switched by the circuit of T3ster peripheral control circuits moments, heat moment stopping, T3ster voltage output ends Ucb makes fast recovery diode positively biased in this process, Ucb is under the partial pressure effect of connection divider resistance R1, pinch-off voltage is generated between PHEMT transistor gates G to be measured and source S, it is reverse-biased between PHEMT grid Gs and source S, after circuit switching, positively biased between grid G and source S, its pressure drop reflects its temperature.The temperature change value that T3ster is measured obtains thermal resistance using the data processing software Master of T3ster in a computer.
Description
Technical field
The present invention relates to semiconductor thermal test field, for measuring the thermal resistance of high electron mobility transistor PHEMT chips
Measuring device and its test method.
Background technology
High electron mobility transistor PHEMT is the core devices in solid-state amplifying circuit.High electron mobility transistor
PHEMT, with the advantages such as its high frequency, high speed, low noise, high-power, has started communicating as one kind in field-effect transistor
Fields extensive use is waited, is then mostly used to make gas sensor and radio-frequency power sensor as sensing unit.PHEMT is actually
It is the appellation to a kind of field effect tube chip, although there is Xiao formed by technique that temperature survey is carried out available for electric method in the inside
Te Ji shieldings are Schottky.But the characteristic of Schottky lead to not carry larger current, can not by the use of Schottky itself as
Heat source.So often Thermal test is carried out using the pattern heated between PHEMT drain electrodes and source electrode by electric current.
When PHEMT drains and source electrode is powered, PHEMT pipes start to generate heat, and since conventionally used PHEMT pipes are depletion types, need
Pre- pinch-off voltage is added in gate-source, otherwise can directly result in the permanent damage of PHEMT transistors.
Since the efficiency of the monolithic millimeter-wave integrated circuit mmic chip using PHEMT is not generally high, the caloric value of chip
Larger, the problem is more prominent particularly in the applications such as phased-array radar.Therefore thermal design must be carried out to it so that setting
The working junction temperature of device is just obtained at the beginning of meter.This is the important channel for improving application system such as radar etc equipment performance, and
PHEMT transistor chips raceway groove to chip mounting surface or heat sink thermal resistance be carry out thermal design core devices parameter.To common
Field-effect tube, the parasitic diode in generally use pipe, if the parasitic fly-wheel diode between drain-source is as sense temperature element (TE,
It measures its forward voltage drop and varies with temperature process, so as to analyze its structure function.Used test equipment is usually
The semiconductors thermal resistance dedicated tester such as Phase11 or T3ster.The common thermo-resistance measurement method of measurement of PHEMT chip thermal resistances has
Infrared scanning imaging method, thermochromic liquid crystal tempil pellets, electric method.
Infrared scanning imaging method the infra-red radiation on PHEMT transistor chips surface and is provided when being worked by measurement device
The two-dimension temperature distribution of chip surface, to characterize junction temperature and its distribution；Thermochromic liquid crystal tempil pellets is in different temperature using liquid crystal
To the light of constant light source reflection different wave length under degree, different colors is presented to carry out temperature survey.Infrared survey method, that is, red
The problem of outer scanning imagery method is, it is necessary to carry out processing of uncapping to PHEMT transistor devices, and destruction encapsulation easily causes device
Permanent damage；Moreover, for packaging, infrared imaging method changes the hot road of system, causes the junction temperature measured relatively low, portion
Heat transfer is divided to be difficult to estimate so as to cause the error to measurement to exterior space；Infrared survey method is easily subject to other back ofs the body
Scape invests the influence of the radiation energy of surface reflection to be measured and background invests body surface, and through the radiation energy of body surface
Influence, cause the inaccuracy of thermometric；Infrared survey method is also influenced by slin emissivity, and the low body surface of emissivity is than hair
Penetrate the high body surface of rate is influenced bigger by ambient temperature, can be caused in dut temperature and smaller ambient temperature difference very big
Measurement error.Infrared scan image is easily influenced by thermal background emission, and heated chip functions structure is affected by the surrounding environment it
Imaging effect may be very poor, possibly can not obtain clearly PHEMT transistor chips key structure image.
The main problem of the problem of thermochromic liquid crystal tempil pellets is measured using thermochromic liquid crystal and infrared survey is similar, wherein
Following other problems are further related to, i.e.,：The thermochromic liquid crystal of use is needed coated in measured object surface, PHEMT chip majority sizes pole
It is small and for bare chip, poor operability, and measurement error is compared with infrared survey bigger.
The basic principle of general electric method is to utilize existing diode or parasitic diode in PHEMT transistor devices,
Device is placed on one constantly to change in environment temperature, retainer member is consistent with environment temperature, persistently gives two poles in the process
Pipe makes semiconductor PN variations injunction temperature Tj and forward junction voltage change Vf use temperature in good linear relationship by low current
Calibration factor K is represented, meets relational expression Tj=K Vf+T0, so as to obtain k-factor value；Then, by tested PHEMT transistors
Part is placed into normal temperature environment, applies power P to entire device, device is waited to reach thermal balance.The power of application causes junction temperature to become
Change, utilize relational expression Tj=K Vf+T0, wherein T0To apply the initial junction temperature before power, k-factor has been obtained in first portion,
Therefore the junction temperature Tj reached after thermal balance can be calculated.It can directly be surveyed by thermocouple at the end of heating power simultaneously
The temperature of shell is obtained, utilizes the calculation formula (1) of thermal resistance, you can obtains device steady state heat resistance value
Electricity rule is measured using transient thermal, using the forward voltage drop of diode and the relation of temperature, is rung from thermal transient
It answers and the structure function comprising thermal resistance, thermal capacitance is analyzed in curve, obtain the heat of each structure sheaf inside PHEMT transistors packaging
Resistance value, such as chip solder layer shell position judge the quality of PHEMT transistor device hot propertys with this.PHEMT transistors are adopted
Such chip thermo-resistance measurement is carried out with electric method to be disadvantageous in that, it is necessary to which manual switching, the time of manual switching is second grade
, speed is not fast enough, be easy to cause the damage of PHEMT transistor chips or very big test error.Such as in PHEMT transistor drains
Between source level plus electric current heats, and grid and source electrode need to add pinch-off voltage；Heating finishes, and electricity is heated between hand off drain electrode and source level
Stream, then turning off manually again makes grid and the reverse-biased voltage of source electrode, while loading makes its positively biased on grid and source electrode manually
The low current of Isense.In this process, if gate source voltage across poles is too early by the reverse-biased positively biased that switchs to, it is easy to cause Xiao Te
Base damage, too late then channel temperature decline stage process can not complete measument arrive, cause measurement error.Using electric method pair
The main problem that PHEMT is tested is that its Schottky is very fragile, can not directly utilize Xiao parasitic between grid G, source S
Special based diode if used as heat source, carries out loading fever, Schottky will using high current to parasitic diode
Breakdown, damage, causes measured device permanent damage.
By retrieval, discovery corresponds to the less and of the invention mostly concerned patent of invention Shen of relevant patent of invention at present
It please be as follows：
[1] China Patent Publication No. CN201310185075.7 [P] .2013-9-4, title disclosed in Beijing University of Technology
For a kind of method for measuring thin layer heterogeneous semiconductor material interface Wen Sheng and thermal resistance, describe a kind of to be heated using laser
The method that temperature test is carried out using Schottky, [1] are employed external laser as heat source, are measured Schottky as sensor
Small film heterogeneous interface Wen Sheng, Schottky are always at forward bias condition, add when avoiding using the measurement of common electric method
The problem of heat is needed using reverse-biased.But this method is not suitable for the measurement of practical devices, practical devices are if there is envelope
Dress must just uncap, and easily lead to device failure, if device size is small, the power heated can not accurately determine to apply on earth
In MMIC, that is tied, and test needs powerful optical device etc..The operability of itself and test is poor, the cost of test compared with
It is high.
[2] Chinese patent application publication number CN201310591383.X [P] .2014-3-5 discloses a kind of Schottky gate field
Effect transistor Wen Sheng and thermal resistance measurement method and device.The peripheral control circuits of [1] are described, employ FPGA controlling parties
Formula devises corresponding power-up, power-off, record control circuit, employs FPGA as control core unit, cooperation voltage, electricity
Capture card and host computer are flowed, using being heated between drain-source in a manner that electric current does heat source to raceway groove.
[3] China Patent Publication No. CN201110066983.5 [P] .2011-10-5. discloses a kind of utilization Schottky and surveys
The test method and the method and its device using pn-junction measurement LED heat resistance for measuring LED junction temperature.Patent application [3] then only will be in LED
Schottky used as temperature element, the foundation as design lamps.
Above-mentioned patent application [1]-[3] are all as temperature element, the difference is that right from basic principle using Schottky
On the Row control of measurement and in purposes.
The content of the invention
In place of in view of the shortcomings of the prior art, with reference to the work(of existing T3ster Thermal tests instrument
Can, a kind of good operability is provided, switching is quick, and thermometric is accurate, does not easily cause the damage of PHEMT transistor chips and test error
The test method of high electron mobility transistor PHEMT thermal resistances.
The present invention realizes the solution of above-mentioned purpose：A kind of test side of high electron mobility transistor PHEMT thermal resistances
Method, it is characterised in that include the following steps：It is used as sensor using the Schottky inside PHEMT, is surveyed by semiconductor thermal resistance
Test instrument T3ster provide current source directly between the drain D and source S of PHEMT transistors loading current to PHEMT transistors
Raceway groove heats, and then realizes that moment circuit switches by T3ster thermo-resistance measurements peripheral control circuits outside PHEMT transistors, makes
Moment stopping is heated, after circuit switching, positively biased between grid G and source S, while T3ster voltage output ends Ucb is controlled to make soon
Recovery diode positively biased；The drain D of PHEMT and divider resistance R are electrically connected in the peripheral control circuits, in voltage output end
Under the partial pressure effect of the divider resistance R1 of Ucb electrical connections, pinch-off voltage is generated between PHEMT transistor gates G to be measured and source S,
Between PHEMT grid Gs and source S after reverse-biased, PHEMT transistors thermal balance to be measured, stop heating, break drain D
Heated current between source S, while the voltage output end Ucb of T3ster is controlled to export so that fast recovery diode is reverse-biased；
＜ is loaded by the test current output terminal Sensor current of T3ster between the grid G and source S of PHEMT transistors simultaneously
The low current of 10mA is measured the voltage change of Schottky between gate and source by T3ster Measurement channels, measures temperature change
Change numerical value, the data measured utilize the data processing software Master of T3ster and known heat sink temperature, root in a computer
The junction temperature and the thermal resistance to PHEMT installation surface backplates for obtaining PHEMT according to measured temperature change curve.
A kind of high electron mobility transistor PHEMT heat resistance test apparatus using above-mentioned PHEMT thermo-resistance measurements method, bag
It includes PHEMT thermo-resistance measurements circuit and the outer of thermo-resistance measurement is carried out to PHEMT using semiconductor thermal resistance test equipment T3ster and contain
Circuit processed, it is characterised in that：PHEMT thermo-resistance measurements circuit is connected by two divider resistances R1, R2 with fast recovery diode FRD
PHEMT transistor gates G is formed, and the anode IE+ of T3ster passes through the wire connection terminal between the drain Ds of PHEMT transistors, source S
Contact 1,2 is electrically connected the drain D of PHEMT and divider resistance R1, and voltage output end Ucb is electrically connected to divider resistance R1, divides
The wire connection terminal contact 6 of wire connection terminal contact 5 and resistance R2 input terminals between piezoresistance R2, the sensor current of T3ster are defeated
The output channel voltage output end Ucb of outlet Sensor current and T3ster respectively by fast recovery diode FRD with
The terminals between wire connection terminal contact 3 and wire connection terminal contact 6 and wire connection terminal contact 2 between PHEMT transistor gates G
The closed loop that the sub- composition of contact 4 is calculated；By between drain D of the current source of T3ster offers directly in PHEMT transistors, source S
Loading current, T3ster voltage output ends Ucb makes fast recovery diode positively biased, between PHEMT transistor drains D to be measured and source S
Pinch-off voltage is generated, temperature is obtained immediately in reverse-biased, Schottky between grid source electrode as temperature transducer and becomes at any time
The numerical value of change by the voltage change of T3ster Measurement channels measurement Schottky between grid G and source S, measures temperature change
Numerical value obtains the thermal resistance value of corresponding PHEMT chips.
The present invention has the advantages that compared with the prior art.
It is switched fast.The present invention utilizes existing test equipment T3ster.The data acquisition provided based on T3ster testers
Platform and controller are used by the use of the Schottky in PHEMT to be measured as Schottky diode and its forward voltage drop become with temperature
The relation of change carries out junction temperature measurement for sensor.Commercial semiconductors thermo-resistance measurement instrument is based oneself upon, Chinese patent application [2] is open
A kind of Schottky gate field effect transistor tube temperature disclosed in number CN201310591383.X [P] .2014-3-5 rises and thermal resistance measurement side
Commercial apparatus are all given to complete in the part of data acquisition of method and control section, and it is right in test to be realized using fast recovery diode
The protection of Schottky and the conversion work of test signal are mainly used for the measurement of depletion type pipe.Only in peripheral control circuits
Increase the accurately and fast switching that a bleeder circuit being made of fast recovery diode is achieved that ns magnitudes, realize and treat
Survey the measurement of the junction temperature and thermal resistance of PHEMT.Its precision is guaranteed.By controlling the output interface of T3ster, output is different
Positive and negative voltage, test electric current cooperation peripheral control circuits, realize the heating to PHEMT raceway grooves to be measured, the survey of channel temperature
Amount.
Good operability.The present invention is by the use of as high-frequency rectification semiconductor diode, fly-wheel diode or damper diode
The characteristic that diode fast recovery diode FRD switching characteristics are good, reverse recovery time is short, it is direct by current source in the heating period
The loading current in the drain electrode of PHEMT to be measured and source electrode, while the fast recovery diode positively biased in peripheral control circuits, it is to be measured
There is pinch-off voltage between PHEMT grids and source electrode, and PHEMT crystalline substances are ensure that in reverse-biased between PHEMT grids to be measured and source electrode
Unlikely electric current is excessive between body drain pole and source electrode caused cause thermal damage.In cooling stage, peripheral control circuits make soon soon recover two
Pole pipe is reverse-biased, without pinch-off voltage between PHEMT grids and source electrode to be measured, while leads to small electricity between PHEMT grids to be measured and source electrode
Stream, and in positively biased state between PHEMT grids and source electrode, the Measurement channel of measuring instrument T3ster measures the grid of PHEMT to be measured
The pressure drop of Schottky between pole and source electrode so as to measure temperature change numerical value, completes chip testing, solves the prior art well
Using special FPGA control circuit testing cost it is high the problem of the above problem.Using between drain-source inside PHEMT to be measured directly
The mode of heating simply employs fast recovery diode and carries out signal switching, avoids the deficiency of prior art operation difference.
Thermometric is accurate, and the present invention is different from common PN junction diode using internal structure, in P-type silicon material and N-type silicon material
Base I is added among material, forms the fast recovery diode of PIN silicon chips, because base is very thin, reverse recovery charge very little, with fast
The characteristics of reverse recovery time of recovery diode is shorter, and forward voltage drop is relatively low, and breakdown reverse voltage (pressure voltage) is higher is designed
Peripheral control circuits and T3ster several output ports and its control function, it is direct using the current source provided by T3ster
Loading current between drain D, source S in PHEMT transistors, T3ster voltage output ends Ucb make fast recovery diode positively biased, treat
It surveys between PHEMT transistor drains D and source S and generates pinch-off voltage, in reverse-biased between grid source electrode, Schottky is as thermometric
Sensor obtains the numerical value that temperature changes over time immediately, by T3ster Measurement channels measurement Xiao Te between grid G and source S
The voltage change of base measures temperature change numerical value, obtains the thermal resistance value of corresponding PHEMT chips, and thermometric is accurate.
The damage of PHEMT transistor chips and test error are not easily caused.The present invention using by two divider resistances R1, R2 with
The PHEMT thermo-resistance measurement circuits of fast recovery diode FRD series connection PHEMT transistor gates G compositions, the anode IE+ of T3ster lead to
The wire connection terminal contact 1,2 crossed between the drain Ds of PHEMT transistors, source S is electrically connected the drain D of PHEMT and resistance R1,
Voltage output end Ucb is electrically connected to wire connection terminal contact 5 between divider resistance R1, divider resistance R2 and resistance R2 input terminals
Wire connection terminal contact 6, the output channel voltage of sensor current output terminal the Sensor current and T3ster of T3ster are defeated
Outlet Ucb passes through the wire connection terminal contact 3 and wire connection terminal between fast recovery diode FRD and PHEMT transistor gate G respectively
The closed loop that the composition of wire connection terminal contact 4 between contact 6 and wire connection terminal contact 2 is calculated, is made using the Schottky in PHEMT
Thermal test is carried out for sensor, can not be broken a seal dress for PHEMT devices, and in the case of not generating any irreversible damage,
Side measures the thermal resistance of PHEMT devices in a short period of time.It avoids the prior art and directly does heat source or straight using Schottky
The permanent damage of PHEMT transistors to be measured caused by being heated between drain electrode and source electrode with high current is connected on, damages measured device
Problem.
Description of the drawings
Fig. 1 be high electron mobility transistor PHEMT heat resistance test apparatus of the present invention peripheral control circuits principle and with
The connection relationship diagram of T3ster.
In figure：1st, 2,3,4,5,6 be peripheral control circuits wire connection terminal contact.
Specific embodiment
Refering to Fig. 1.In embodiment described below, it is peripheral control circuits below dotted line, more than dotted line is commercial
T3ster semiconductor thermal resistance testers.High electron mobility transistor PHEMT heat resistance test apparatus, including：PHEMT thermo-resistance measurements
Circuit and the peripheral control circuits for carrying out thermo-resistance measurement to PHEMT using semiconductor thermal resistance test equipment T3ster, wherein：
PHEMT thermo-resistance measurements circuit is connected PHEMT transistor gate G groups by two divider resistances R1, R2 with fast recovery diode FRD
Anode IE+ into, T3ster is electrically connected by the wire connection terminal contact 1,2 between the drain Ds of PHEMT transistors, source S
The drain D of PHEMT and resistance R1, voltage output end Ucb are electrically connected to 5 and of wire connection terminal contact between resistance R1, resistance R2
The wire connection terminal contact 6 of resistance R2 input terminals, sensor current output terminal the Sensor current's and T3ster of T3ster
Output channel voltage output end Ucb passes through the wire connection terminal between fast recovery diode FRD and PHEMT transistor gate G respectively
The closed loop that the composition of wire connection terminal contact 4 between contact 3 and wire connection terminal contact 6 and wire connection terminal contact 2 is calculated；By
Loading current between drain D of the current source directly in PHEMT transistors that T3ster is provided, source S, T3ster voltage output ends
Ucb makes fast recovery diode positively biased, generates pinch-off voltage between PHEMT transistor drains D to be measured and source S, between grid source electrode
In reverse-biased, Schottky obtains the numerical value that temperature changes over time as temperature transducer immediately, by T3ster Measurement channels
The voltage change of the Schottky between grid G and source S is measured, measures temperature change numerical value, obtains the heat of corresponding PHEMT chips
Resistance value.
It is main to wrap using the test method of above-mentioned PHEMT heat resistance test apparatus high electron mobility transistor PHEMT thermal resistances
Include following steps：It is used using the Schottky inside PHEMT as sensor, current source is provided directly in PHEMT by T3ster
Loading current between the drain-source of transistor is recycled and realized between the drain Ds of PHEMT transistors, source S by electric current to Xiao Te
Then the heating of base realizes wink by PHEMT transistor external semiconductor thermo-resistance measurement instrument thermo-resistance measurements peripheral control circuits
Between circuit switching so that heating moment stops, while semiconductor thermal resistance test equipment T3ster voltage output ends Ucb is controlled to make
Fast recovery diode positively biased is electrically connected the drain D of PHEMT and divider resistance R1, voltage output end in the peripheral control circuits
Under the partial pressure effect of the divider resistance R1 of Ucb electrical connections, pinch-off voltage is generated between PHEMT transistor drains D to be measured and source S,
In reverse-biased between PHEMT drain Ds and source S, after PHEMT transistor thermal balances, stop heating, break drain D and
Heated current between source S, while the voltage output end Ucb of T3ster is controlled to export so that fast recovery diode is reverse-biased；Together
When PHEMT transistors grid G and source S between low current added by the test current output terminal Sensor current of T3ster,
The voltage change of Schottky between gate and source is measured by T3ster Measurement channels, temperature change numerical value is measured, measures
Data utilize the data processing software Master of T3ster and known heat sink temperature in a computer, are changed according to measured temperature
The junction temperature and the thermal resistance to PHEMT installation surface backplates that curve obtains PHEMT.
In step is implemented, first, by the voltage of the data processing software control T3ster testers on computer
The output of output terminal Ucb output channels is-U；Fast recovery diode D1 positively biaseds turn on, and PHEMT thermal resistances are divided in peripheral control circuits
Under the partial pressure effect of resistance R2, wire connection terminal 3, the wire connection terminal 4 of PHEMT to be measured have reverse bias voltage to cause PHEMT grids
G, source S is reverse-biased, provides the pre- pinch-off voltage between PHEMT grid Gs to be measured, source S；
At the same time, larger heated current is exported extremely by the IE+ of the data processing software control T3ster on computer
Between wire connection terminal 1, wire connection terminal 2 so that have heated current between the drain electrode of PHEMT to be measured and source electrode, for heating PHEMT to be measured
Raceway groove；To the PHEMT transistor channel heating periods, directly loaded by current source in the drain D and source S of PHEMT to be measured
Electric current, while the fast recovery diode positively biased in peripheral control circuits have pinch-off voltage between PHEMT grid Gs to be measured, source S, and
In reverse-biased between PHEMT grids and source electrode to be measured, to ensure that unlikely electric current is excessive between PHEMT crystal drain D and source S
Caused cause thermal damage.
After being heated to stable state, the output channel voltage output end Ucb outputs for controlling T3ster testers are+U, are caused
The reverse-biased cut-offs of fast recovery diode D1, the reversed bias voltage between the grid and source electrode of PHEMT disappears, while wire connection terminal 3, wiring
＜ 10mA low currents are exported by the sensor current output terminal Sensor current of T3ster between terminal 4 so that PHEMT to be measured
Grid G, have forward bias voltage between source S；And simultaneously, T3ster controls what its IE+ current output terminal exported simultaneously
Heated current is 0 between drain electrode and source electrode, and the heating of PHEMT raceway grooves to be measured is stopped；In cooling stage, peripheral control circuits make soon
Fast recovery diode is reverse-biased, without pinch-off voltage between PHEMT grids and source electrode to be measured, while PHEMT grid Gs to be measured and source electrode
Lead to low current between S, and treated between PHEMT grid Gs and source S in positively biased state, the Measurement channel measurement of measuring instrument T3ster
The pressure drop of Schottky, so as to measure PHEMT temperature changes numerical value to be measured, completes PHEMT to be measured between the grid and source electrode of survey PHEMT
Chip testing.
Due to having low current between the grid G and source S of PHEMT to be measured by Schottky, the generation of Schottky interpolar is forward pressed
Drop, change in pressure drop have recorded channel temperature change procedure after heating stops, and as sensor output temperature voltage signal, by
The TCH test channel port Uch1 TCH test channels of T3ster pass semiconductor thermal resistance tester T3ster records back, and test is completed.
PHEMT to be measured has carried out change in pressure drop and has been demarcated with temperature relation k-factor in advance, and the data measured are sharp in a computer
Data processing software Master and known heat sink temperature with T3ster, you can obtained according to measured temperature change curve
The junction temperature of PHEMT and the thermal resistance to installation surface backplate.
Claims (5)
1. a kind of test method of high electron mobility transistor PHEMT thermal resistances, it is characterised in that：Using in transistor PHEMT
The Schottky in portion provides current source, directly transistor PHEMT's as sensor by semiconductor thermal resistance test equipment T3ster
Loading current heats transistor PHEMT raceway grooves between drain D and source S, then by carrying out thermo-resistance measurement to transistor PHEMT
Peripheral control circuits realize moment circuit switching, make heating moment stop, circuit switching after, between grid G and source S just
Partially, peripheral control circuits include the cathode, fast extensive of sequentially connected divider resistance R1, divider resistance R2, fast recovery diode FRD
The anode of multiple diode FRD, the grid G of transistor PHEMT, the source S of transistor PHEMT connect with the other end of divider resistance R1
It connects, thus forms closed circuit, the voltage output end Ucb electrical connection divider resistances R1 of semiconductor thermal resistance test equipment T3ster,
Wire connection terminal contact 5 between divider resistance R2, voltage output end Ucb are also electrically connected divider resistance R1, the source of transistor PHEMT
Wire connection terminal contact 6 between the S of pole；The current output terminal anode IE+ of semiconductor thermal resistance test equipment T3ster passes through terminals
Sub- contact 1,2 is connected with drain D, the source S of transistor PHEMT, so as to be loaded between the drain D and source S of transistor PHEMT
Electric current heats transistor PHEMT raceway grooves, in the voltage output of semiconductor thermal resistance test equipment T3ster while loading current
It holds under the partial pressure effect of the divider resistance R1 of Ucb electrical connections, the conducting of fast recovery diode FRD positively biaseds, transistor PHEMT grid Gs
Pinch-off voltage is generated between source S, is put down between transistor PHEMT grid Gs and source S in reverse-biased, transistor PHEMT heat
After weighing apparatus, stop heating, break the loading current between drain D and source S, while control semiconductor thermal resistance test equipment T3ster
Voltage output end Ucb output so that fast recovery diode FRD is reverse-biased, at the same between the grid G and source S of transistor PHEMT by
The low current of the test current output terminal Sensor current loading ＜ 10mA of semiconductor thermal resistance test equipment T3ster, partly leads
The sensor current output terminal Sensor current of body heat resistance test equipment T3ster pass through fast recovery diode FRD and crystal
The wire connection terminal between wire connection terminal contact 3 and wire connection terminal contact 6 and wire connection terminal contact 2 between pipe PHEMT grid Gs connects
4 composition closed loop of point, is measured by semiconductor thermal resistance test equipment T3ster TCH test channels port Uch1 in grid G and source S
Between Schottky voltage change, measure temperature change numerical value, the data measured in a computer utilize semiconductor thermo-resistance measurement
The data processing software Master and known heat sink temperature of instrument T3ster obtains transistor according to measured temperature change curve
The junction temperature of PHEMT and the thermal resistance to transistor PHEMT installation surface backplates.
2. the test method of high electron mobility transistor PHEMT thermal resistances as described in claim 1, it is characterised in that：Computer
On data processing software Master the voltage output end Ucb of semiconductor thermal resistance test equipment T3ster is controlled to export as-U, soon
Recovery diode FRD positively biaseds turn on, and have reverse bias voltage to cause transistor between wire connection terminal contact 3, wire connection terminal contact 4
PHEMT grid Gs, source S are reverse-biased, provide the pinch-off voltage between transistor PHEMT grid Gs, source S.
3. the test method of high electron mobility transistor PHEMT thermal resistances as described in claim 1, it is characterised in that：It is heated to
After stable state, the voltage output end Ucb of semiconductor thermal resistance test equipment T3ster is controlled to export as+U, fast recovery diode
The reverse-biased cut-offs of FRD, the reversed bias voltage between the grid G and source S of transistor PHEMT disappears, while wire connection terminal contact 3, wiring
＜ is exported by the sensor current output terminal Sensor current of semiconductor thermal resistance test equipment T3ster between terminal connections 4
The low current of 10mA generates forward bias voltage, while semiconductor thermal resistance tester between the grid G of transistor PHEMT, source S
Heated current is 0 between device T3ster controls the drain D and source S that current output terminal anode IE+ is exported, to transistor PHEMT ditches
The heating in road stops.
4. the test method of high electron mobility transistor PHEMT thermal resistances as described in claim 1, it is characterised in that：Semiconductor
The pressure drop of thermo-resistance measurement instrument T3ster TCH test channels port Uch1 measurements Schottky between grid G and source S, change in pressure drop
Channel temperature change procedure after heating stops is had recorded, and as the output temperature voltage signal of sensor.
5. a kind of high electron mobility transistor PHEMT heat resistance test apparatus using test method described in claim 1, including
Semiconductor thermal resistance test equipment T3ster and using semiconductor thermal resistance test equipment T3ster to transistor PHEMT carry out thermal resistance survey
The peripheral control circuits of examination, it is characterised in that：Peripheral control circuits include sequentially connected divider resistance R1, divider resistance R2,
The cathode of fast recovery diode FRD, the anode of fast recovery diode FRD, the grid G of transistor PHEMT, transistor PHEMT's
Source S is connected with the other end of divider resistance R1, thus forms closed circuit；The electric current of semiconductor thermal resistance test equipment T3ster
Output head anode IE+ is connected by wire connection terminal contact 1,2 with drain D, the source S of transistor PHEMT, voltage output end Ucb
The wire connection terminal contact 5 being electrically connected between divider resistance R1, divider resistance R2, voltage output end Ucb are also electrically connected divider resistance
R1, transistor PHEMT source S between wire connection terminal contact 6, the sensor current of semiconductor thermal resistance test equipment T3ster
Output terminal Sensor current pass through the wire connection terminal contact 3 between fast recovery diode FRD and transistor PHEMT grid Gs
Wire connection terminal contact 4 between wire connection terminal contact 6 and wire connection terminal contact 2 forms closed loop, semiconductor thermo-resistance measurement
The TCH test channel port Uch1 of instrument T3ster passes through the terminals between fast recovery diode FRD and transistor PHEMT grid Gs
Wire connection terminal contact 4 between sub- contact 3 and wire connection terminal contact 6 and wire connection terminal contact 2 forms closed loop.
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