CN115372782B - Test system and semiconductor test method - Google Patents

Test system and semiconductor test method Download PDF

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Publication number
CN115372782B
CN115372782B CN202211321956.2A CN202211321956A CN115372782B CN 115372782 B CN115372782 B CN 115372782B CN 202211321956 A CN202211321956 A CN 202211321956A CN 115372782 B CN115372782 B CN 115372782B
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component
opening
temperature
test system
cover structure
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CN115372782A (en
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肖世玉
曹凯
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Innoscience Suzhou Semiconductor Co Ltd
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Innoscience Suzhou Semiconductor Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N25/00Investigating or analyzing materials by the use of thermal means
    • G01N25/20Investigating or analyzing materials by the use of thermal means by investigating the development of heat, i.e. calorimetry, e.g. by measuring specific heat, by measuring thermal conductivity

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Or Analyzing Materials Using Thermal Means (AREA)

Abstract

The invention provides a test system and a test method thereof. A test system includes a first opening, a second opening, and a plurality of voltage input structures. A thermal sensor is configured to obtain a first temperature of a component through the first opening. A light sensor is configured to measure a second temperature of the component through the second opening. The voltage input structure is configured to provide a first voltage to the component to calculate a thermal power consumption of the component. The first temperature, the second temperature, and the heat power consumption are used to calculate a thermal resistance of the component.

Description

Test system and semiconductor test method
Technical Field
The present invention relates to a test system and a semiconductor test method, and more particularly, to a test system and a semiconductor test method for measuring thermal resistance.
Background
Semiconductor devices, including direct bandgap semiconductors, such as devices comprising III-V materials or III-V compounds (class: III-V compounds), may operate or function under a variety of conditions or in a variety of environments (e.g., at different voltages and frequencies).
The semiconductor components may include heterojunction bipolar transistors (HBTs, heterojunction bipolar transistor), heterojunction field effect transistors (HFETs, heterojunction field effect transistor), high-electron-mobility transistor, modulation-doped field effect transistors (MODFETs), and the like.
Disclosure of Invention
According to some embodiments of the present invention, a test system includes a first opening, a second opening, and a plurality of voltage input structures. A thermal sensor is configured to obtain a first temperature of a component through the first opening. A light sensor is configured to measure a second temperature of the component through the second opening. The voltage input structure is configured to provide a first voltage to the component to calculate a thermal power consumption of the component. The first temperature, the second temperature, and the heat power consumption are used to calculate a thermal resistance of the component.
According to some embodiments of the present invention, a method for semiconductor testing includes: providing a first opening, wherein a thermal sensor is configured to obtain a first temperature of a component through the first opening; providing a second opening, wherein a light sensor is configured to measure a second temperature of the component through the second opening; providing a plurality of voltage input structures configured to provide a first voltage to the component to calculate a thermal power consumption of the component; and calculating a thermal resistance of the component according to the first temperature, the second temperature and the heat power consumption.
According to some embodiments of the invention, a test system comprises: a bottom structure, a heat sink structure and a first opening. A heat sink structure is located over the base structure and is configured to conduct heat from a component to the base structure. A first opening is in the heat sink structure configured to receive a thermal sensor in contact with the component to obtain a first temperature of the component.
The invention provides a test system, which comprises a first opening, a second opening and a plurality of voltage input structures. The first and second openings can use a thermal sensor and a photo sensor, respectively, to measure the first and second temperatures of the component and calculate the thermal resistance of the component accordingly. The surface of the thermal sensor is processed by using an insulating material, so that the influence of voltage can be avoided, and the accuracy of measuring the thermal resistance of the component can be improved.
Drawings
The aspects of the invention may be readily understood from the following detailed description when read in conjunction with the accompanying drawings. It is contemplated that various features may not be drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.
FIG. 1 is a schematic diagram of a control system, a sensing system, and a testing system according to some embodiments of the invention.
FIG. 2 is a schematic diagram of a test system according to some embodiments of the invention.
FIG. 3 is a cross-sectional view of a test system according to some embodiments of the invention.
Fig. 4A is an enlarged view of a portion of a test system according to some embodiments of the invention.
Fig. 4B is a partial top view of a test system according to some embodiments of the invention.
FIG. 5 is a schematic diagram of testing thermal resistance according to some embodiments of the invention.
Fig. 6 is a schematic diagram of a thermocouple according to some embodiments of the present invention.
Fig. 7 illustrates various stages of a method for semiconductor testing according to some embodiments of the invention.
Common reference numerals are used throughout the drawings and the detailed description to refer to the same or like components. The invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.
Detailed Description
The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to be limiting. In the present disclosure, references to forming or disposing a first feature on or over a second feature may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features such that the first and second features may not be in direct contact. In addition, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself limit the relationship between the various embodiments and/or configurations discussed.
Embodiments of the present invention are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable concepts that can be embodied in a wide variety of specific contexts. The particular embodiments discussed are illustrative only and are not limiting of the scope of the invention.
The invention provides a semiconductor device. The semiconductor device may include a conductive element. The conductive member may have an electrical connection function and also has a function of easily conducting heat generated from the semiconductor device to the outside. The semiconductor device of the present invention has a relatively good heat dissipation efficiency compared to the conventional semiconductor device.
FIG. 1 is a schematic diagram of a control system 10A, a sensing system 10B, and a testing system 10C according to some embodiments of the invention. Control system 10A may include hardware and software to provide a suitable operating or functional environment to test component 120. In some embodiments, signals and commands may be transmitted between each of control system 10A, sensing system 10B, and testing system 10C.
As shown in fig. 1, control system 10A may include, but is not limited to, a processor 102, a signal generator 104, a monitor 106, and a coupler 108. The sensing system 10B may include, but is not limited to, a thermal sensor 110 and a light sensor 112. Test system 10C may include, but is not limited to, a component 120 to be tested.
The processor 102 may use any central-processing unit (CPU), commercially available processor, controller, microprocessor (MCU), state machine, application Specific Integrated Circuit (ASIC), or other programmable logic components, discrete logic circuits or transistor logic gates, discrete hardware components, or any combination thereof for performing the functions described herein.
The signal generator 104 may be configured to provide or receive a test signal. The signal generator 104 provides various types of optical and electrical signals, such as acoustic signals, microwave signals, data signals, clock signals, or power signals, to the sensing system 10B and the testing system 10C.
Monitor 106 may be configured to determine whether component 120 meets the test criteria. The signal fed back from the component 120 may be evaluated by the monitor 106 and it may be determined whether the component 120 meets the test criteria. Monitor 106 may provide information and/or instructions to a user. Further, in some embodiments, coupler 108 may be configured to couple processor 102 and monitor 106 to sensing system 10B. Coupler 108 may be configured to couple processor 102 and monitor 106 to sensing system 10B and testing system 10C. Coupler 108 may be configured to couple processor 102 and monitor 106 to sensing system 10B to measure component 120.
The thermal sensor 110 may comprise a thermocouple. The surface of the thermocouple may be covered with a thermally conductive insulating material. The thermocouple may include a first metal and a second metal. The material of the first metal may be different from the material of the second metal. The first metal may be located between the first end and the second end of the thermocouple. The second metal may be located between the first end and the third end of the thermocouple. In some embodiments, the light sensor 112 may comprise an infrared sensor. The configuration of the first, second and third ends of the thermocouple can be seen in fig. 6.
Component 120 may comprise an HBT. The component 120 may comprise an HFET. The component 120 may comprise a HEMT. Component 120 may comprise a MOSFET. In some embodiments, the component 120 may comprise a GaN HEMT, a SiC JFET, a SiC MOSFET, or a Silicon MOSFET, and the invention is not limited.
The component 120 may include a substrate, a buffer layer, a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer. The substrate may include, but is not limited to, silicon (Si), doped Si, silicon carbide (SiC), germanium silicide (SiGe), gallium arsenide (GaAs), or other semiconductor materials. The substrate may include, but is not limited to, sapphire, silicon-on-insulator (SOI, silicon on insulator), or other suitable materials. The thickness of the substrate may be in the range of about 200 μm to about 400 μm, for example 220 μm, 240 μm, 260 μm, 280 μm, 300 μm, 320 μm, 340 μm, 360 μm or 380 μm.
The buffer layer may be disposed on the substrate. The buffer layer may be configured to reduce defects caused by lattice mismatch (lattice mismatch) between the substrate and the first nitride semiconductor layer.
The first nitride semiconductor layer (or channel layer) may be disposed on the substrate. The first nitride semiconductor layer may be disposed on the buffer layer. The first nitride semiconductor layer may include a group III-V layer. The first nitride semiconductor layer may include, but is not limited to, group III nitrides, such as the compound InaAlbGa1-a-bN, where a+b+.ltoreq.1. The group III nitride further includes, but is not limited to, for example, the compound AlaGa (1-a) N, where a+.1. The first nitride semiconductor layer may include a gallium nitride (GaN) layer. The energy gap of GaN is about 3.4. 3.4 eV. The thickness of the first nitride semiconductor layer may range from, but is not limited to, about 0.1 μm to about 1 μm.
A second nitride semiconductor layer (or barrier layer) may be disposed on the first nitride semiconductor layer. The second nitride semiconductor layer may include a group III-V layer. The second nitride semiconductor layer may include, but is not limited to, group III nitrides, such as the compound InaAlbGa1-a-bN, where a+b+.ltoreq.1. The group III nitride may further include, but is not limited to, for example, the compound AlaGa (1-a) N, where a+.1. The energy gap of the second nitride semiconductor layer may be greater than the energy gap of the first nitride semiconductor layer. The second nitride semiconductor layer may include an aluminum gallium nitride (AlGaN) layer. The energy gap of AlGaN is about 4.0. 4.0 eV. The thickness of the second nitride semiconductor layer may range from, but is not limited to, about 10a nm a to about 100 a nm a.
A heterojunction is formed between the second nitride semiconductor layer and the first nitride semiconductor layer, and polarization of the heterojunction forms a two-dimensional electron gas (2 deg, two-dimensional electron gas) region in the first nitride semiconductor layer.
A third nitride semiconductor layer may be disposed on the second nitride semiconductor layer. The third nitride semiconductor layer may be in direct contact with the second nitride semiconductor layer. The third nitride semiconductor layer may be doped with impurities (dopant). The third nitride semiconductor layer may include a p-type dopant. The third nitride semiconductor layer may include a p-type doped GaN layer, a p-type doped AlGaN layer, a p-type doped AlN layer, or other suitable III-V layer. The p-type dopant may include magnesium (Mg), beryllium (Be), zinc (Zn), and cadmium (Cd). The third nitride semiconductor layer may be configured to control a concentration of the 2DEG in the first nitride semiconductor layer. The third nitride semiconductor layer may be used to deplete the 2DEG directly under the third nitride semiconductor layer.
Fig. 2 is a schematic diagram of a test system 20 according to some embodiments of the invention. The test system 20 may include, but is not limited to, an opening 262 and a cover structure 250. The test system 20 may have a component to be tested therein. In one embodiment, the light sensor may be configured to measure the temperature of the component through the opening 262. Test system 20 may provide a voltage to a component to calculate the thermal power consumption of the component. The test system 20 may calculate a thermal resistance of the component based on the temperature and the thermal power.
Fig. 3 is a cross-sectional view of a test system 30 according to some embodiments of the invention. Fig. 3 may correspond to a cross-sectional view along section lines a-a' of the test system 20 of fig. 2.
Test system 30 may include, but is not limited to, base structure 310, component 320, heat sink structure 330, voltage input structure 341, voltage input structure 342, cap structure 350, cap structure 351, cap structure 352, opening 361, and opening 362. In some embodiments, the test system 30 may be used to measure the thermal resistance of the component 320.
The bottom structure 310 may include, but is not limited to, a material that is highly thermally conductive. The bottom structure 310 may include, but is not limited to, metal. The bottom structure 310 may include, but is not limited to, stainless steel. The heat sink structure 330, the cover structure 351, the cover structure 352, and the opening 361 may be disposed on the bottom structure 310.
The heat sink structure 330 may include, but is not limited to, a highly thermally conductive material. The heat sink structure 330 may include, but is not limited to, a metal. The heat sink structure 330 may include, but is not limited to, an alloy. The heat sink structure 330 may include, but is not limited to, copper. The heat sink structure 330 may include, but is not limited to, nickel. The heat sink structure 330 may include, but is not limited to, copper and electroplated nickel on its outer layer. A heat sink structure 330 may be disposed between the component 320 and the bottom structure 310. The heat sink structure 330 may be configured to conduct heat from the component 320 to the base structure 310.
Openings 361 may be provided between the component 320, the heat sink structure 330, and the bottom structure 310. The opening 361 may include a cavity or space. The heat sink structure 330 may surround the opening 361. The opening 361 may be disposed in the heat sink structure 330. The opening 361 may extend through the heat sink structure 330. The opening 361 may contact the lower surface 3202b of the contact pad 3202. The opening 361 may be configured to receive a thermal sensor contacting the component 320 to obtain a temperature Tc of the component 320. The thermal sensor may comprise a thermocouple.
The voltage input structure 341 and the voltage input structure 342 may include, but are not limited to, highly conductive materials. The voltage input structure 341 and the voltage input structure 342 may include, but are not limited to, metals. The voltage input structure 341 may be disposed between the cap structure 350 and the cap structure 351. The voltage input structure 342 may be disposed between the cap structure 350 and the cap structure 352. The voltage input structure 341 and the voltage input structure 342 may be configured to provide a first voltage to the component 320 to calculate thermal power consumption of the component 320. In some embodiments, the voltage input structures 341 and 342 provide the voltage V1 to the component 320, and the current flowing through the component 320 is I1, so that the heat consumption P of the component 320 can be calculated as the product of the voltage V1 and the current I1.
The cap structures 350, 351, 352 may include, but are not limited to, high durometer materials. The cap structures 350, 351, 352 may include, but are not limited to, highly rigid materials. The cap structures 350, 351, 352 may include, but are not limited to, metals. Cap structures 350, 351, 352 may include, but are not limited to, alloys. The cap structures 350, 351, 352 may include, but are not limited to, tungsten steel. Cover structure 350 may cover assembly 320. Cover structure 350 may surround assembly 320. The cap structure 350 may contact an upper surface of the assembly 320. Cover structure 350 may contact a side surface of assembly 320. The cover structure 350 may be used to protect the assembly 320 from external forces.
An opening 362 may be provided between the cover structure 350 and the component 320. The opening 362 may include a cavity or space. Cover structure 350 may surround opening 362. Openings 362 may be provided in the cover structure 350. An opening 362 may extend through the cover structure 350. The opening 362 may contact an upper surface 3201t of the chip 3201. The opening 362 may contact a side surface of the package structure 3206. The opening 362 may contact a side surface of the cap structure 350. The aperture of opening 361 may be smaller than the aperture of opening 362. The aperture of opening 361 may be substantially equal to the aperture of opening 362. The aperture of opening 361 may be larger than the aperture of opening 362. In some embodiments, a light sensor may be configured to measure the temperature Tj of the component 320 through the opening 362. Temperature Tj may include a temperature of chip 3201 of component 320. The temperature Tj may include a temperature of the upper surface 3201t of the chip 3201.
In some embodiments, the temperature Tc, the temperature Tj, and the heat power P described above may be used to calculate the thermal resistance of the component 320. In some embodiments, the thermal resistance of the component 320 may be calculated as the difference between the temperature Tc and the temperature Tj divided by the thermal power consumption P. The thermal resistance of the component 320 can be used to measure or evaluate the temperature change from the upper surface 3201t of the chip 3201 to the lower surface 3202b of the contact pad 3202.
Component 320 may include, but is not limited to, a chip 3201, contact pads 3202, contact pads 3203, contact pads 3204, package structure 3206, wire 3207, and wire 3208. In some embodiments, the component 320 may be disposed on the heat sink structure 330. The component 320 may be disposed on the voltage input structure 341 and the voltage input structure 342. The assembly 320 may be surrounded by a cover structure 350. Opening 361 may be located below assembly 320. The opening 362 may be located above the assembly 320. The opening 361 may be located between the voltage input structure 341 and the voltage input structure 342.
The chip 3201 may be disposed on the contact pads 3202. The upper surface 3201t of the chip 3201 may face the opening 362. The opening 362 may contact a portion of the upper surface 3201t of the chip 3201. The opening 362 may contact a central portion of the upper surface 3201t of the chip 3201.
Contact pads 3202 may be disposed on heatsink structure 330. Contact pads 3203 may be disposed on voltage input structure 341. Contact pads 3204 may be disposed on voltage input structure 342. The chip 3201 may be electrically connected to the contact pads 3203 through wires 3207. The chip 3201 may be electrically connected to the contact pads 3204 through wires 3208. Contact pads 3202, 3203, and 3204 may include, but are not limited to, highly conductive materials. Contact pads 3202, 3203, and 3204 may include, but are not limited to, metal. Contact pads 3202, 3203, and 3204 may include, but are not limited to, a compound or other suitable material.
The package structure 3206 may cover the chip 3201, the contact pad 3202, the contact pad 3203, the contact pad 3204, the wire 3207, and the wire 3208. The chip 3201, the contact pad 3202, the contact pad 3203, the contact pad 3204, the wire 3207, and the wire 3208 may be surrounded or encapsulated by the package structure 3206. The package structure 3206 may include, but is not limited to, a high-k dielectric material. The package structure 3206 may include, but is not limited to, a low-k dielectric material. The package structure 3206 may include, but is not limited to, an oxide, nitride, oxynitride, or other suitable material.
Fig. 4A is an enlarged view of a portion of a test system 40A according to some embodiments of the invention. Test system 40A of fig. 4A may correspond to or be similar to test system 30 of fig. 3.
The test system 40A may include an opening 461, a spring 471, and a heat sensitive sleeve 472. The heat sensitive sleeve 472 of the test system 40A may include an opening 461. Opening 461 of test system 40A may be configured to receive a thermocouple 470. The spring 471 of the test system 40A may surround the thermocouple 470. A thermo-sensitive sleeve 472 can be used to receive a thermocouple 470. The spring 471 can help the thermocouple 470 be smoothly inserted into or withdrawn from the port 461. In addition, the front end of thermocouple 470 may include an end point 4701. The terminal point 4701 of thermocouple 470 may contact the lower surface of the contact pad of the assembly. The terminal point 4701 of the thermocouple 470 may contact the lower surface 3202b of the contact pad 3202 of the assembly 320 as shown in fig. 3. The surface of thermocouple 470 may be covered with a thermally conductive and insulating material to avoid being affected by the voltage on the contact pad and to improve the accuracy of the measured temperature.
Fig. 4B is a partial top view of a test system 40B according to some embodiments of the invention. Test system 40B of fig. 4B may correspond to or be similar to test system 30 of fig. 3.
As shown in fig. 4B, the test system 40B may include an opening 462 and a cover structure 450. The opening 462 may be located in a central portion of the cover structure 450. The opening 462 may extend through some or all of the cover structure 450. The light sensor may be configured to measure the temperature of the component through the opening 462. The above-described light sensor may use a photoelectric device to detect radiation emitted by an object to evaluate its surface temperature. The above-described light sensor may use a photoelectric device to detect radiation emitted from the upper surface 3201t of the chip 3201 of the assembly 320 as shown in fig. 3 to evaluate the surface temperature thereof. The light sensor may include, but is not limited to, a QFI infrared analyzer.
FIG. 5 is a schematic diagram of testing thermal resistance according to some embodiments of the invention. Component 520 of fig. 5 may correspond to or be similar to component 320 of fig. 3. In some embodiments, component 520 may comprise an HBT. The component 520 may comprise an HFET. The component 520 may include a HEMT. Component 520 may comprise a MOSFET. The component 520 may comprise a GaN HEMT, siC JFET, siC MOSFET, or Silicon MOSFET, and the invention is not limited.
As shown in fig. 5, the component 520 may include a drain 520d, a gate 520g, and a source 520s. A voltage source Vgs may be provided between the gate 520g and the source 520s. A voltage source Vds may be provided between the drain 520d and the source 520s. The voltage source Vgs may be electrically connected to the voltage input structure 341 of fig. 3. The voltage source Vgs may be electrically connected to the voltage input structure 342 of fig. 3. The voltage source Vds may be electrically connected to the voltage input structure 341 of fig. 3. The voltage source Vds may be electrically connected to the voltage input structure 342 of fig. 3, which is not limited by the present invention.
Fig. 6 is a schematic diagram of a thermocouple 670 according to some embodiments of the invention. Thermocouple 670 of fig. 6 may correspond to or be similar to thermocouple 470 of fig. 4A.
Thermocouple 670 may include metal 674 and metal 675. The material of metal 674 may be different from the material of metal 675. Metal 674 may be disposed between terminal 6701 and terminal 6702. Metal 675 may be disposed between terminal 6701 and terminal 6703. In some embodiments, endpoint 6701 may be disposed in an ambient or cryogenic environment. The endpoint 6702 and the endpoint 6703 may be disposed in a high temperature environment. The voltage difference is generated due to the different temperatures of the terminals and the different materials of metal 674 and metal 675. The thermocouple 670 may have a linear coefficient K between temperature and voltage. The voltage difference V2 between the terminal 6702 and the terminal 6703 is measured using the voltmeter 676. In some embodiments, the temperature Tc may be calculated according to the product of the voltage difference V2 and the linear coefficient K.
Fig. 7 illustrates various stages of a method for semiconductor testing according to some embodiments of the invention. In step 702, a first opening may be provided. In some embodiments, a thermal sensor may be configured to obtain a first temperature of a component through the first opening. In step 704, a second opening may be provided. In some embodiments, a light sensor may be configured to measure a second temperature of the component through the second opening. In step 706, a plurality of voltage input structures may be provided that are configured to provide a first voltage to the component to calculate a thermal power consumption of the component.
In step 708, a thermal resistance of the component may be calculated based on the first temperature, the second temperature, and the heat power consumption. In some embodiments, the method of semiconductor testing may include providing a plurality of first temperatures to a bottom structure of the testing system; and measuring a plurality of second temperatures of the surface of the bottom structure using the thermocouples. In some embodiments, the method of testing a semiconductor further includes fitting the first temperatures and the second temperatures to obtain a temperature coefficient, and obtaining an actual temperature using the temperature coefficient to further improve accuracy of measuring the thermal resistance of the component. It should be appreciated that the depicted order of steps, acts, or events described above are not to be interpreted in a limiting sense. For example, some steps may occur in a different order or simultaneously.
According to some embodiments of the present invention, a test system includes a first opening, a second opening, and a plurality of voltage input structures. A thermal sensor is configured to obtain a first temperature of a component through the first opening. A light sensor is configured to measure a second temperature of the component through the second opening. The voltage input structure is configured to provide a first voltage to the component to calculate a thermal power consumption of the component. The first temperature, the second temperature, and the heat power consumption are used to calculate a thermal resistance of the component.
According to some embodiments of the present invention, a method for semiconductor testing includes: providing a first opening, wherein a thermal sensor is configured to obtain a first temperature of a component through the first opening; providing a second opening, wherein a light sensor is configured to measure a second temperature of the component through the second opening; providing a plurality of voltage input structures configured to provide a first voltage to the component to calculate a thermal power consumption of the component; and calculating a thermal resistance of the component according to the first temperature, the second temperature and the heat power consumption.
According to some embodiments of the invention, a test system comprises: a bottom structure, a heat sink structure and a first opening. A heat sink structure is located over the base structure and is configured to conduct heat from a component to the base structure. A first opening is in the heat sink structure configured to receive a thermal sensor in contact with the component to obtain a first temperature of the component.
Unless otherwise specified, spatial descriptions as "on …", "under …", "upward", "left", "right", "downward", "top", "bottom", "vertical", "horizontal", "side", "above", "below", "upper", "above …", "below …" are indicated relative to the orientation shown in the drawings. It should be understood that the spatial descriptions used herein are for illustration purposes only, and that the actual implementation of the structures described herein may be spatially arranged in any orientation or manner, provided that the advantages of the embodiments of the present invention do not deviate from such an arrangement.
As used herein, the term "vertical" is used to refer to both upward and downward directions, while the term "horizontal" refers to a direction transverse to the vertical direction.
As used herein, the terms "about," "substantially," "generally," and "about" are used to describe and explain minor variations. When used in connection with an event or circumstance, the term can refer to instances where the event or circumstance occurs precisely and instances where it occurs to the close approximation. For example, when used in connection with a numerical value, the term can refer to a range of variation of less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, a first value may be considered "substantially" the same as or equal to a second value if the first value is within less than or equal to ±10% of the second value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, "substantially" perpendicular may refer to a range of angular variation of less than or equal to ±10° relative to 90 °, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1° or less than or equal to ±0.05°.
Two surfaces may be considered to be coplanar or substantially coplanar if the displacement between the two surfaces is no more than 5 μm, no more than 2 μm, no more than 1 μm, or no more than 0.5 μm. A surface may be considered substantially flat if the displacement between the highest point and the lowest point of the surface is not more than 5 μm, not more than 2 μm, not more than 1 μm or not more than 0.5 μm.
As used herein, the singular terms "a" and "an" may include plural referents unless the context clearly dictates otherwise.
As used herein, the terms "conductive", "conductive (electrically conductive)" and "conductivity" refer to the ability to carry electrical current. Conductive materials generally indicate those materials that exhibit little or no opposition to the flow of current. One measure of conductivity is Siemens per meter (S/m). Typically, the conductive material is one having a conductivity greater than about 104S/m (e.g., at least 105S/m or at least 106S/m). The conductivity of a material can sometimes vary with temperature. Unless specified otherwise, the conductivity of the material is measured at room temperature.
Further, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity and should be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited.
While the invention has been described and illustrated with reference to specific embodiments thereof, the description and illustration is not intended to be limiting. It will be understood by those skilled in the art that various changes may be made and equivalents substituted without departing from the true spirit and scope of the invention as defined by the appended claims. The illustrations may not be drawn to scale. There may be a distinction between process reproduction and actual equipment in the present invention due to manufacturing processes and tolerances. Other embodiments of the invention not specifically described are possible. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method or process to the objective, spirit and scope of the present invention. All such modifications are intended to be within the scope of the appended claims. Although the methods disclosed herein have been described with reference to particular operations being performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form an equivalent method without departing from the teachings of the present invention. Accordingly, unless specifically indicated herein, the order and grouping of operations is not a limitation of the present invention.

Claims (23)

1. A test system, comprising:
a bottom structure;
a heat sink structure located above the base structure and configured to conduct heat from a component to the base structure;
a first opening in the heat sink structure configured to receive a thermal sensor in contact with the component to obtain a first temperature of a lower surface of the component through the first opening;
a second opening, wherein a light sensor is configured to measure a second temperature of the upper surface of the component through the second opening;
a cover structure over the base structure, wherein the cover structure comprises an upper cover structure (350) and a lower cover structure (351, 352), the lower cover structure (351, 352) being located between the upper cover structure (350) and the base structure, the upper cover structure (350), the lower cover structure (351, 352) and the base structure surrounding the assembly, the first opening, the second opening and the heat sink structure;
a plurality of voltage input structures between the upper and lower cap structures (350, 351, 352) configured to provide a first voltage to the component to calculate a thermal power consumption of the component, wherein the first temperature, the second temperature, and the thermal power consumption are used to calculate a thermal resistance of the component.
2. The test system of claim 1, wherein the component comprises:
a substrate;
a first nitride semiconductor layer on the substrate;
and a second nitride semiconductor layer on the first nitride semiconductor layer, and an energy gap of the second nitride semiconductor layer is larger than an energy gap of the first nitride semiconductor layer.
3. The test system of claim 1, wherein the first opening is located below the component, the second opening is located above the component, and the first opening is located between the plurality of voltage input structures.
4. The test system of claim 3, wherein the aperture of the first opening is smaller than the aperture of the second opening.
5. The test system of claim 1, wherein the thermal sensor comprises a thermocouple, a surface of the thermocouple being covered with a thermally conductive insulating material.
6. The test system of claim 5, wherein the thermocouple comprises a first metal and a second metal, the first metal being of a different material than the second metal, the first metal being located between a first end and a second end of the thermocouple, the second metal being located between the first end and a third end of the thermocouple.
7. The test system of claim 6, wherein the first end is configured to pass through the first opening and contact a first contact pad of the component.
8. The test system of claim 6, wherein the first temperature is obtained as a function of a second voltage between the second terminal and the third terminal.
9. The test system of claim 7, the heat sink structure being located between the first contact pad and the bottom structure.
10. The test system defined in claim 9, wherein the heat sink structure surrounds the first opening and the heat sink structure is located between the plurality of voltage input structures.
11. The test system of claim 3, wherein the light sensor comprises an infrared sensor.
12. The test system of claim 11, wherein the infrared sensor measures the second temperature of the component through the second opening, and the second temperature comprises a surface temperature of a chip of the component.
13. The test system of claim 12, wherein the assembly comprises a second contact pad and a third contact pad, the second contact pad and the third contact pad being located over the plurality of voltage input structures, the chip being electrically connected to the second contact pad and the third contact pad by wires.
14. The test system of claim 1, wherein the current of the component is measured when the plurality of voltage input structures provide the first voltage to the component, the thermal power consumption being a product of the first voltage and the current.
15. The test system of claim 14, wherein the thermal resistance is the difference between the first temperature and the second temperature divided by the thermal power consumption.
16. A method for semiconductor testing, comprising:
providing a bottom structure;
providing a heat sink structure located above the base structure configured to conduct heat of a component to the base structure;
providing a first opening in the heat sink structure configured to receive a thermal sensor in contact with the component to obtain a first temperature of the component through the first opening;
providing a second opening, wherein a light sensor is configured to measure a second temperature of the component through the second opening;
providing a cover structure over the base structure, wherein the cover structure comprises an upper cover structure (350) and a lower cover structure (351, 352), the lower cover structure (351, 352) being located between the upper cover structure (350) and the base structure, the upper cover structure (350), the lower cover structure (351, 352) and the base structure surrounding the assembly, the first opening, the second opening and the heat sink structure;
providing a plurality of voltage input structures located between the upper and lower cap structures (350, 351, 352) configured to provide a first voltage to the component to calculate a thermal power consumption of the component; and
A thermal resistance of the component is calculated based on the first temperature, the second temperature, and the heat power consumption.
17. The method of claim 16, wherein the light sensor comprises an infrared sensor, the method further comprising:
the infrared sensor is enabled to measure the second temperature of the chip of the component through the second opening.
18. The method of claim 17, wherein the thermal sensor comprises a thermocouple, the method further comprising:
the thermocouple is passed through the first opening and contacts a first contact pad of the component to obtain the first temperature.
19. The method as recited in claim 18, further comprising:
setting a plurality of first temperatures for the bottom structure; and
A plurality of second temperatures of the surface of the bottom structure are measured using the thermocouples.
20. The method as recited in claim 19, further comprising:
fitting the plurality of first temperatures and the plurality of second temperatures to obtain a temperature coefficient; and
An actual temperature is obtained using the temperature coefficient.
21. A test system, comprising:
a bottom structure;
a heat sink structure located above the base structure and configured to conduct heat from a component to the base structure; and
A first opening in the heat sink structure configured to receive a thermal sensor in contact with the component to obtain a first temperature of the component;
a second opening, wherein a light sensor is configured to measure a second temperature of the component through the second opening;
a cover structure located above the base structure, wherein the cover structure comprises an upper cover structure (350) and a lower cover structure (351, 352), the lower cover structure (351, 352) being located between the upper cover structure (350) and the base structure, the upper cover structure (350), the lower cover structure (351, 352) and the base structure enclosing the assembly, the first opening, the second opening and the heat sink structure.
22. The test system of claim 21, wherein the component comprises:
a contact pad;
a chip located above the contact pad; and
And the packaging structure covers the chip and the contact pads.
23. The test system defined in claim 22, wherein the first opening is surrounded by the heat sink structure and the second opening is surrounded by the package structure and the cover structure.
CN202211321956.2A 2022-10-27 2022-10-27 Test system and semiconductor test method Active CN115372782B (en)

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