CN111463137A - 一种硅基三维扇出集成封装方法及其结构 - Google Patents
一种硅基三维扇出集成封装方法及其结构 Download PDFInfo
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Abstract
本发明公开一种硅基三维扇出集成封装方法及其结构,属于集成电路晶圆级封装技术领域。在硅基正面制作TSV盲孔并在表面沉积无机钝化层;在TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫;在硅基正面键合玻璃载板;通过刻蚀使TSV盲孔露出,在硅基背面刻蚀出凹槽并通过粘结剂埋入第一芯片;在硅基背面填充干膜材料,并在第一芯片的焊垫和TSV盲孔处开孔,开孔尺寸不小于1μm;将TSV盲孔表层的无机钝化层刻蚀干净并保持过刻蚀10%,在硅基背面依次制作钝化层、第二n层再布线和凸点;拆掉玻璃载板,在硅基正面焊接若干个第二芯片。本发明通过使用硅基实现三维扇出型晶圆级封装,完成高密度异构芯片三维集成,其封装效率、集成度、性能大大提高。
Description
技术领域
本发明涉及集成电路晶圆级封装技术领域,特别涉及一种硅基三维扇出集成封装方法及其结构。
背景技术
随着晶体管特征尺寸缩小到10nm以下,栅氧化层厚度只有十几甚至几个原子,这已经开始接近物理极限。由于量子隧穿效应导致的漏电将会非常严重,基于摩尔定律(Moore Law)的芯片研发和制造成本也将成几何倍数增加。因此,大家开把目光转向先进封装,其中扇出型封装从系统集成方式上进行创新,以功能应用和产品需求作为驱动,有效提高产品传输、功耗、尺寸和可靠性等方面的性能,不管从成本还是研发难度的角度考虑,扇出型封装都是一种不错的选择。
扇出型封装主要有两种:树脂型和硅基扇出。由于硅基工艺是当下应用最多的技术,硅基扇出也受到越来越多的重视。基于干法刻蚀工艺的TSV通孔技术可以实现三维扇出集成,例如专利CN201710608974.1给出了一种薄型3D扇出封装结构及晶圆级封装方法,这种方法将TSV和硅基凹槽同时刻蚀出来,由于开孔尺寸不一,将会导致TSV和凹槽刻蚀深度不一;另外在硅基表面有凹槽的情况下进行TSV填铜,具有较高难度。
发明内容
本发明的目的在于提供一种硅基三维扇出集成封装方法及其结构,以解决目前的封装方式集成度不高且性能较差,制作效率也低的问题。
为解决上述技术问题,本发明提供一种硅基三维扇出集成封装方法,包括:
步骤1、提供硅基,在所述硅基正面制作TSV盲孔并在表面沉积无机钝化层;
步骤2、在所述TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫;
步骤3、在所述硅基正面键合玻璃载板,减薄所述硅基背面;
步骤4、通过刻蚀使TSV盲孔露出,在硅基背面刻蚀出凹槽并通过粘结剂埋入第一芯片;其中凹槽刻蚀至无机钝化层;
步骤5、在硅基背面填充干膜材料,并在第一芯片的焊垫和TSV盲孔处开孔,开孔尺寸不小于1μm;
步骤6、将TSV盲孔表层的无机钝化层刻蚀干净并保持过刻蚀10%,在硅基背面依次制作钝化层、第二n层再布线和凸点;
步骤7、拆掉玻璃载板,在硅基正面焊接若干个第二芯片,所述第二芯片通过微凸点与第一n层再布线或金属焊垫连接。
可选的,在提供硅基后,将所述硅基正面精细研磨5~50μm。
可选的,所述无机钝化层的厚度为0.1μm以上,材质为无机材料的一种或多种;
其中,所述无机材料包括SiO2、SiC和SiN。
可选的,所述金属焊垫的材质包括Ti、W、Cu、Ni和Au。
可选的,所述玻璃载板通过临时键合层与所述硅基正面键合,键合方式为激光、热解或机械方法;
所述玻璃载板的厚度为50μm以上,所述临时键合层的厚度为1μm以上。
可选的,所述步骤3中,减薄所述硅基背面,使所述硅基背面到所述TSV盲孔底部的距离为1~50μm。
可选的,所述步骤4中,通过光刻,干法或湿法刻蚀工艺使TSV盲孔底部露出,露出高度不小于1μm。
可选的,所述步骤7中,拆掉玻璃载板后清洗干净临时键合层,通过倒装焊接技术在硅基正面焊接若干个第二芯片,所述第二芯片底部通过填充料填充。
本发明还提供了一种硅基三维扇出集成封装结构,包括硅基,
所述硅基正面制作有TSV盲孔并且表面沉积有无机钝化层;所述TSV盲孔中制作有铜柱并在表面制作有第一n层再布线和金属焊垫;
所述硅基背面刻蚀有凹槽,第一芯片通过粘结剂埋在所述凹槽中,所述第一芯片的焊垫朝外;
所述硅基背面填充有干膜材料,并且所述硅基背面依次制作有钝化层、第二n层再布线和凸点。
可选的,所述硅基三维扇出集成封装结构还包括若干个第二芯片,所述第二芯片通过微凸点与第一n层再布线或金属焊垫连接;所述第二芯片底部通过填充料填充。
在本发明中提供了一种硅基三维扇出集成封装方法及其结构,提供硅基,在所述硅基正面制作TSV盲孔并在表面沉积无机钝化层;在所述TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫;在所述硅基正面键合玻璃载板,减薄所述硅基背面;通过刻蚀使TSV盲孔露出,在硅基背面刻蚀出凹槽并通过粘结剂埋入第一芯片;其中凹槽刻蚀至无机钝化层;在硅基背面填充干膜材料,并在第一芯片的焊垫和TSV盲孔处开孔,开孔尺寸不小于1μm;将TSV盲孔表层的无机钝化层刻蚀干净并保持过刻蚀10%,在硅基背面依次制作钝化层、第二n层再布线和凸点;拆掉玻璃载板,在硅基正面焊接若干个第二芯片,所述第二芯片通过微凸点与第一n层再布线或金属焊垫连接。本发明通过使用硅基实现三维扇出型晶圆级封装,完成高密度异构芯片(如CPU、DSP、FPGA和HBM等)三维集成,其封装效率、集成度、性能大大提高。
附图说明
图1是本发明提供的硅基三维扇出集成封装方法流程示意图;
图2是提供的硅基示意图;
图3是在硅基正面制作TSV盲孔的示意图;
图4是在硅基正面的表面沉积无机钝化层的示意图;
图5是在TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫的示意图;
图6是在硅基正面通过临时键合层键合玻璃载板的示意图;
图7是减薄硅基背面的示意图;
图8是刻蚀使TSV盲孔露出的示意图;
图9是在硅基背面刻蚀出凹槽的示意图;
图10是在硅基背面填充干膜材料并开孔的示意图;
图11是将TSV盲孔表层的无机钝化层刻蚀干净的示意图;
图12是在硅基背面依次制作钝化层、第二n层再布线和凸点的示意图;
图13是硅基三维扇出集成封装结构的示意图。
具体实施方式
以下结合附图和具体实施例对本发明提出的一种硅基三维扇出集成封装方法及其结构作进一步详细说明。根据下面说明和权利要求书,本发明的优点和特征将更清楚。需说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。
实施例一
本发明提供了一种硅基三维扇出集成封装方法,封装方式为晶圆级封装,其步骤如图1所示,包括如下步骤:
步骤S11、提供硅基,在所述硅基正面制作TSV盲孔并在表面沉积无机钝化层;
步骤S12、在所述TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫;
步骤S13、在所述硅基正面键合玻璃载板,减薄所述硅基背面;
步骤S14、通过刻蚀使TSV盲孔露出,在硅基背面刻蚀出凹槽并通过粘结剂埋入第一芯片;其中凹槽刻蚀至无机钝化层;
步骤S15、在硅基背面填充干膜材料,并在第一芯片的焊垫和TSV盲孔处开孔,开孔尺寸不小于1μm;
步骤S16、将TSV盲孔表层的无机钝化层刻蚀干净并保持过刻蚀10%,在硅基背面依次制作钝化层、第二n层再布线和凸点;
步骤S17、拆掉玻璃载板,在硅基正面焊接若干个第二芯片,所述第二芯片通过微凸点与第一n层再布线或金属焊垫连接。
如图2所示,提供硅基101,将所述硅基101正面精细研磨5~50μm;
如图3所示,通过光刻和干法刻蚀技术,在所述硅基101正面制作TSV盲孔102;
如图4所示,在所述硅基101正面的表面沉积无机钝化层103;其中,所述无机钝化层103的厚度为0.1μm以上,材质为无机材料的一种或多种;所述无机材料包括SiO2、SiC和SiN;
如图5所示,在所述TSV盲孔102中制作铜柱104并在表面制作第一n层再布线105和金属焊垫106;所述金属焊垫106的材质包括Ti、W、Cu、Ni和Au;
如图6所示,在所述硅基101正面通过临时键合层107键合玻璃载板108,键合方式为激光、热解或机械方法;所述玻璃载板108的厚度为50μm以上,所述临时键合层107的厚度为1μm以上;
如图7所示,键合完毕后,通过机械研磨方式减薄所述硅基101背面,使所述硅基101背面到所述TSV盲孔102底部的距离H为1~50μm;
如图8所示,继续用干法刻蚀或湿法刻蚀的方式使TSV盲孔露出,露出高度T不小于1μm;
如图9所示,在硅基101背面刻蚀出凹槽109,所述凹槽109刻蚀至无机钝化层103,并且凹槽109尺寸大于待埋入第一芯片的尺寸;利用高精度装片技术在凹槽109中埋入第一芯片201,所述第一芯片201的焊垫202朝外,所述第一芯片201通过粘结剂203与无机钝化层103粘粘在一起;
如图10所示,在硅基101背面填充干膜材料110,并利用光刻技术在焊垫202和TSV盲孔102处开孔,开孔尺寸大于等于1μm,但小于焊垫202和TSV盲孔102孔径尺寸;
如图11所示,利用无机钝化层刻蚀技术将TSV盲孔102表层的无机钝化层103刻蚀干净,并保持过刻蚀10%;
如图12所示,利用光刻、物理气相沉积和电镀技术在硅基101背面依次制作钝化层111、第二n层再布线112和凸点113;
如图13所示,拆掉玻璃载板108并清洗干净临时键合层107,通过倒装焊接技术在硅基101正面焊接若干个第二芯片(包括第二芯片301、第二芯片302和第二芯片303),所述第二芯片通过微凸点304与第一n层再布线105或金属焊垫106连接;其中,第二芯片301和第二芯片303通过微凸点304与第一n层再布线105连接,第二芯片302通过微凸点304与金属焊垫106连接;所述第二芯片底部通过填充料305填充,所述填充料305为高分子类材料,最终切割完成最终封装。
实施例二
本发明提供了一种硅基三维扇出集成封装结构,通过实施例一的硅基三维扇出集成封装方法制作而成,其结构如图13所示,包括硅基101,所述硅基101正面制作有TSV盲孔并且表面沉积有无机钝化层103;所述TSV盲孔中制作有铜柱104并在表面制作有第一n层再布线105和金属焊垫106;
所述硅基101背面刻蚀有凹槽,第一芯片201通过粘结剂203埋在所述凹槽中,所述第一芯片201的焊垫202朝外;所述硅基101背面填充有干膜材料110,并且所述硅基101背面依次制作有钝化层111、第二n层再布线112和凸点113。
所述硅基三维扇出集成封装结构还包括若干个第二芯片(包括第二芯片301、第二芯片302和第二芯片303),所述第二芯片通过微凸点304与第一n层再布线105或金属焊垫106连接;其中,第二芯片301和第二芯片303通过微凸点304与第一n层再布线105连接,第二芯片302通过微凸点304与金属焊垫106连接;所述第二芯片底部通过填充料305填充。
上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。
Claims (10)
1.一种硅基三维扇出集成封装方法,其特征在于,包括:
步骤1、提供硅基,在所述硅基正面制作TSV盲孔并在表面沉积无机钝化层;
步骤2、在所述TSV盲孔中制作铜柱并在表面制作第一n层再布线和金属焊垫;
步骤3、在所述硅基正面键合玻璃载板,减薄所述硅基背面;
步骤4、通过刻蚀使TSV盲孔露出,在硅基背面刻蚀出凹槽并通过粘结剂埋入第一芯片;其中凹槽刻蚀至无机钝化层;
步骤5、在硅基背面填充干膜材料,并在第一芯片的焊垫和TSV盲孔处开孔,开孔尺寸不小于1μm;
步骤6、将TSV盲孔表层的无机钝化层刻蚀干净并保持过刻蚀10%,在硅基背面依次制作钝化层、第二n层再布线和凸点;
步骤7、拆掉玻璃载板,在硅基正面焊接若干个第二芯片,所述第二芯片通过微凸点与第一n层再布线或金属焊垫连接。
2.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,在提供硅基后,将所述硅基正面精细研磨5~50μm。
3.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,所述无机钝化层的厚度为0.1μm以上,材质为无机材料的一种或多种;
其中,所述无机材料包括SiO2、SiC和SiN。
4.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,所述金属焊垫的材质包括Ti、W、Cu、Ni和Au。
5.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,所述玻璃载板通过临时键合层与所述硅基正面键合,键合方式为激光、热解或机械方法;
所述玻璃载板的厚度为50μm以上,所述临时键合层的厚度为1μm以上。
6.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,所述步骤3中,减薄所述硅基背面,使所述硅基背面到所述TSV盲孔底部的距离为1~50μm。
7.如权利要求1所述的硅基三维扇出集成封装方法,其特征在于,所述步骤4中,通过光刻,干法或湿法刻蚀工艺使TSV盲孔底部露出,露出高度不小于1μm。
8.如权利要求5所述的硅基三维扇出集成封装方法,其特征在于,所述步骤7中,拆掉玻璃载板后清洗干净临时键合层,通过倒装焊接技术在硅基正面焊接若干个第二芯片,所述第二芯片底部通过填充料填充。
9.一种硅基三维扇出集成封装结构,包括硅基(101),其特征在于,
所述硅基(101)正面制作有TSV盲孔并且表面沉积有无机钝化层(103);所述TSV盲孔中制作有铜柱(104)并在表面制作有第一n层再布线(105)和金属焊垫(106);
所述硅基(101)背面刻蚀有凹槽,第一芯片(201)通过粘结剂(203)埋在所述凹槽中,所述第一芯片(201)的焊垫(202)朝外;
所述硅基(101)背面填充有干膜材料(110),并且所述硅基(101)背面依次制作有钝化层(111)、第二n层再布线(112)和凸点(113)。
10.如权利要求1所述的硅基三维扇出集成封装结构,其特征在于,所述硅基三维扇出集成封装结构还包括若干个第二芯片,所述第二芯片通过微凸点(304)与第一n层再布线(105)或金属焊垫(106)连接;所述第二芯片底部通过填充料(305)填充。
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